STMicroelectronics M40Z300W Datasheet
광고
광고
M40Z300
M40Z300W
5 V or 3 V NVRAM supervisor for up to 8 LPSRAMs
Not recommended for new design
Features
■
■
■
■
■
■
■
■
■
■
Converts low power SRAM into NVRAMs
Precision power monitoring and power switching circuitry
Automatic WRITE-protection when V
CC of-tolerance
is out-
Two-input decoder allows control for up to
8 SRAMs (with 2 devices active in parallel)
Choice of supply voltages and power-fail deselect voltages:
– M40Z300:
V
CC
= 4.5 V to 5.5 V
THS = V
SS
: 4.5 V ≤ V
PFD
≤ 4.75 V
THS = V
OUT
: 4.2 V ≤ V
PFD
≤ 4.5 V
– M40Z300W:
V
CC
= 3.0 V to 3.6 V
THS = V
SS
: 2.8 V ≤ V
PFD
≤ 3.0 V
V
CC
= 2.7 V to 3.3 V
THS = V
OUT
: 2.5 V ≤ V
PFD
≤ 2.7 V
Reset output (RST) for power on reset
Battery low pin (BL)
Less than 12 ns chip enable access propagation delay (for 5.0 V device)
Packaging includes a 28-lead SOIC and
SNAPHAT
®
top (to be ordered separately), or
A 16-lead SOIC
SOIC package provides direct connection for a
SNAPHAT top which contains the battery
2 8
16
1
SO16 (MQ)
SNAPHAT (SH) crystal/battery
1
SOH28 (MH)
■ RoHS compliant Obsolete Product(s) - Obsolete Product(s)
October 2010 Doc ID 5679 Rev 5
This is information on a product still in production but not recommended for new designs.
1/25 www.st.com
1
Contents
Contents
M40Z300, M40Z300W
Data retention lifetime calculation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
CC
noise and negative going transients . . . . . . . . . . . . . . . . . . . . . . . . . 12
DC and AC parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Obsolete Product(s) - Obsolete Product(s)
2/25 Doc ID 5679 Rev 5
M40Z300, M40Z300W
List of tables
List of tables
SOH28 – 28-lead plastic small outline, battery SNAPHAT, package mechanical data . . . 19
SH – 4-pin SNAPHAT housing for 48 mAh battery, package mechanical data . . . . . . . . . 20
SH – 4-pin SNAPHAT housing for 120 mAh battery, package mechanical data . . . . . . . . 21
SO16 – 16-lead plastic small outline, 150 mils body width, package mechanical data . . . 22
battery table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Obsolete Product(s) - Obsolete Product(s)
Doc ID 5679 Rev 5 3/25
List of figures
List of figures
M40Z300, M40Z300W
SOH28 – 28-lead plastic small outline, 4-socket battery SNAPHAT, package outline . . . . 19
SH – 4-pin SNAPHAT housing for 48 mAh battery, package outline . . . . . . . . . . . . . . . . . 20
SH – 4-pin SNAPHAT housing for 120mAh battery, package outline. . . . . . . . . . . . . . . . . 21
SO16 – 16-lead plastic small outline, 150 mils body width, package outline . . . . . . . . . . . 22
Obsolete Product(s) - Obsolete Product(s)
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M40Z300, M40Z300W
1 Description
Description
The M40Z300/W NVRAM supervisor is a self-contained device which converts a standard low-power SRAM into a non-volatile memory. A precision voltage reference and comparator monitors the V
CC
input for an out-of-tolerance condition.
When an invalid V
CC
condition occurs, the conditioned chip enable outputs (E1
CON
to
E4
CON
) are forced inactive to write-protect the stored data in the SRAM. During a power failure, the SRAM is switched from the V
CC
pin to the lithium cell within the SNAPHAT
®
to provide the energy required for data retention. On a subsequent power-up, the SRAM remains write protected until a valid power condition returns.
The 28-pin, 330 mil SOIC provides sockets with gold plated contacts for direct connection to a separate SNAPHAT housing containing the battery. The SNAPHAT housing has gold plated pins which mate with the sockets, ensuring reliable connection. The housing is keyed to prevent improper insertion. This unique design allows the SNAPHAT battery package to be mounted on top of the SOIC package after the completion of the surface mount process which greatly reduces the board manufacturing process complexity of either directly soldering or inserting a battery into a soldered holder. Providing non-volatility becomes a
“SNAP.” The 16-pin SOIC provides battery pins for an external user-supplied battery.
Insertion of the SNAPHAT housing after reflow prevents potential battery damage due to the high temperatures required for device surface-mounting. The SNAPHAT housing is also keyed to prevent reverse insertion.
The 28-pin SOIC and battery packages are shipped separately in plastic anti-static tubes or in tape & reel form. For the 28-lead SOIC, the battery/crystal package (e.g., SNAPHAT) part number is “M4ZXX-BR00SH”.
Caution: Do not place the SNAPHAT battery top in conductive foam, as this will drain the lithium button-cell battery.
Obsolete Product(s) - Obsolete Product(s)
Doc ID 5679 Rev 5 5/25
M40Z300, M40Z300W Description
Figure 1.
Logic diagram
VCC B +
(1)
THS
E
B
A
M40Z300
M40Z300W
VOUT
BL
E1CON
E2CON
E3CON
E4CON
RST
VSS
B –
(1)
AI02242
1.
For 16-pin SOIC package only.
Table 1.
THS
Signal names
E
E1
CON
- E4
CON
A, B
RST
BL
Threshold select input
Chip enable input
Conditioned chip enable output
Decoder inputs
Reset output (open drain)
Battery low output (open drain)
V
OUT
V
CC
V
SS
B +
Supply voltage output
Supply voltage
Ground
Positive battery pin
Negative battery pin
(1)
B – Obsolete Product(s) - Obsolete Product(s)
NC Not connected internally
1.
For M40Z300W, B– must be connected to the negative battery terminal only (not to pin 8, V
SS
).
6/25 Doc ID 5679 Rev 5
M40Z300, M40Z300W Description
Figure 2.
28-pin SOIC connections
VOUT
NC
NC
R S T
NC
A
NC
B
NC
BL
NC
NC
TH S
V
SS
1
2
3
2 8
27
6
7
4
5
26
25
24
2 3
8
9
10
11
12
1 3
14
M40Z 3 00 22
M40Z 3 00W
21
20
19
1 8
17
16
15
VCC
E
NC
NC
NC
E1CON
E2CON
NC
E 3
CON
NC
NC
NC
E4CON
NC
AI0224 3
Figure 3.
M40Z300 16-pin SOIC connections
VOUT
NC
RST
A
B
BL
THS
VSS
6
7
4
5
1
2
3
8
M40Z300
16
15
14
13
12
11
10
9
VCC
B +
E
E1CON
E2CON
E3CON
E4CON
B –
AI03624
Figure 4.
M40Z300W 16-pin SOIC connections
VOUT
NC
1
2
16
15
VCC
B –
(1)
RST 3 14 E
A 4 13 E1CON
B 5
M40Z300W
12 E2CON
BL
THS
VSS
6
7
11
10
9
E3CON
E4CON Obsolete Product(s) - Obsolete Product(s)
AI06350
1.
For M40Z300W, B– must be connected to the negative battery terminal only (not to pin 8, V
SS
).
Doc ID 5679 Rev 5 7/25
Description
Figure 5.
Hardware hookup
3.0V, 3.3V or 5V
M40Z300, M40Z300W
VCC VOUT
0.1µF
M40Z300
M40Z300W
A
B
E
Threshold THS
E1CON
E2CON
E3CON
E4CON
RST
VSS BL
0.1µF
VCC
E2
(1)
CMOS
SRAM
E
To Microprocessor
0.1µF
To Battery Monitor Circuit
VCC
E2
(1)
CMOS
SRAM
E
0.1µF
VCC
E2
(1)
CMOS
SRAM
E
0.1µF
VCC
E2
(1)
CMOS
SRAM
E
AI02395
1.
If the second chip enable pin (E2) is unused, it should be tied to V
OUT
.
Obsolete Product(s) - Obsolete Product(s)
8/25 Doc ID 5679 Rev 5
M40Z300, M40Z300W
2 Operation
Note:
Operation
The M40Z300/W, as shown in
Figure 5 on page 8 , can control up to four (eight, if placed in
parallel) standard low-power SRAMs. These SRAMs must be configured to have the chip enable input disable all other input signals. Most slow, low-power SRAMs are configured like this, however many fast SRAMs are not. During normal operating conditions, the conditioned chip enable (E1
CON
to E4
CON
) output pins follow the chip enable (E) input pin with timing shown in
and
Table 7 on page 17 . An internal switch
connects V
CC
to V
OUT
. This switch has a voltage drop of less than 0.3V (I
OUT1
).
When V
CC
degrades during a power failure, E1
CON
to E4
CON
are forced inactive independent of E. In this situation, the SRAM is unconditionally write protected as V
CC
falls below an out-of-tolerance threshold (V
PFD
). For the M40Z300 the power fail detection value associated with V
PFD
is selected by the Threshold Select (THS) pin and is shown in Table 6 on page 15
. For the M40Z300W, the THS pin selects both the supply voltage and V
PFD
(also
).
In either case, THS pin must be connected to either V
SS
or V
OUT
.
If chip enable access is in progress during a power fail detection, that memory cycle continues to completion before the memory is write protected. If the memory cycle is not terminated within time t
WPT
, E1
CON
to E4
CON
are unconditionally driven high, write protecting the SRAM. A power failure during a WRITE cycle may corrupt data at the currently addressed location, but does not jeopardize the rest of the SRAM's contents. At voltages below V
PFD
(min), the user can be assured the memory will be write protected within the Write Protect Time (t
WPT
) provided the V
CC
).
fall time exceeds t
F
(see
As V
CC
continues to degrade, the internal switch disconnects V
CC
and connects the internal battery to V
OUT
. This occurs at the switchover voltage (V
SO
). Below the V
SO
, the battery provides a voltage V
OHB
to the SRAM and can supply current I
OUT2
(see
).
When V
CC
rises above V
SO
, V
OUT
is switched back to the supply voltage. Outputs E1
CON
to
E4
CON
are held inactive for t
CER
(120ms maximum) after the power supply has reached
V
PFD
, independent of the E input, to allow for processor stabilization (see Figure 10 on page 16
).
Obsolete Product(s) - Obsolete Product(s)
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Operation
2.1
M40Z300, M40Z300W
Two to four decode
The M40Z300/W includes a 2 input (A, B) decoder which allows the control of up to 4 independent SRAMs. The truth table for these inputs is shown in
Table 2.
E
H
L
L
L
L
Truth table
Inputs
B
X
H
H
L
L
A
X
L
H
L
H
E1
CON
H
H
H
L
H
E2
CON
H
H
H
H
L
Outputs
E3
CON
H
L
H
H
H
E4
CON
H
H
L
H
H
Figure 6.
Address-decode time
Note:
A, B tAS
E tEDL tEDH
E1CON - E4CON
AI02551
During system design, compliance with the SRAM timing parameters must comprehend the propagation delay between E1
CON
- E4
CON
.
2.2 Data retention lifetime calculation
Most low power SRAMs on the market today can be used with the M40Z300/W NVRAM
SUPERVISOR. There are, however some criteria which should be used in making the final choice of which SRAM to use. The SRAM must be designed in a way where the chip enable input disables all other inputs to the SRAM. This allows inputs to the M40Z300/W and
SRAMs to be “Don't Care” once V
CC guarantee data retention down to V
falls below V
PFD
(min). The SRAM should also
CC
= 2.0 V. The chip enable access time must be Obsolete Product(s) - Obsolete Product(s)
SRAM includes a second chip enable pin (E2), this pin should be tied to V
OUT
.
If data retention lifetime is a critical parameter for the system, it is important to review the data retention current specifications for the particular SRAMs being evaluated. Most SRAMs specify a data retention current at 3.0 V. Manufacturers generally specify a typical condition for room temperature along with a worst case condition (generally at elevated temperatures). The system level requirements will determine the choice of which value to use.
10/25 Doc ID 5679 Rev 5
M40Z300, M40Z300W Operation
The data retention current value of the SRAMs can then be added to the I
BAT
value of the
M40Z300/W to determine the total current requirements for data retention. The available battery capacity for the SNAPHAT
®
of your choice can then be divided by this current to determine the amount of data retention available (see
Caution: Take care to avoid inadvertent discharge through V
OUT been attached.
and E1
CON
- E4
CON
after battery has
For a further more detailed review of lifetime calculations, please see application note
AN1012.
2.3 Power-on reset output
All microprocessors have a reset input which forces them to a known state when starting.
The M40Z300/W has a reset output (RST) pin which is guaranteed to be low within t
WPT
of
V
PFD
). This signal is an open drain configuration. An appropriate pull-up resistor should be chosen to control the rise time. This signal will be valid for all voltage conditions, even when V
CC
equals V
SS
.
Once V
CC
exceeds the power failure detect voltage V
PFD
, an internal timer keeps RST low for t
REC
to allow the power supply to stabilize.
2.4 Battery low pin
The M40Z300/W automatically performs battery voltage monitoring upon power-up, and at factory-programmed time intervals of at least 24 hours. The battery low (BL) pin will be asserted if the battery voltage is found to be less than approximately 2.5 V. The BL pin will remain asserted until completion of battery replacement and subsequent battery low monitoring tests, either during the next power-up sequence or the next scheduled 24-hour interval.
If a battery low is generated during a power-up sequence, this indicates that the battery is below 2.5 V and may not be able to maintain data integrity in the SRAM. Data should be considered suspect, and verified as correct. A fresh battery should be installed.
If a battery low indication is generated during the 24-hour interval check, this indicates that the battery is near end of life. However, data is not compromised due to the fact that a nominal V
CC
is supplied. In order to insure data integrity during subsequent periods of battery backup mode, the battery should be replaced. The SNAPHAT
®
top should be replaced with valid V
CC
applied to the device.
The M40Z300/W only monitors the battery when a nominal V
CC
is applied to the device.
Thus appli-cations which require extensive durations in the battery backup mode should be Obsolete Product(s) - Obsolete Product(s) beneficial. Additionally, if a battery low is indicated, data integrity should be verified upon power-up via a checksum or other technique. The BL pin is an open drain output and an appropriate pull-up resistor to V
CC
should be chosen to control the rise time.
Doc ID 5679 Rev 5 11/25
Operation M40Z300, M40Z300W
2.5 V
CC
noise and negative going transients
I
CC
transients, including those produced by output switching, can produce voltage fluctuations, resulting in spikes on the V
CC
bus. These transients can be reduced if capacitors are used to store energy which stabilizes the V
CC
bus. The energy stored in the bypass capacitors will be released as low going spikes are generated or energy will be absorbed when overshoots occur. A ceramic bypass capacitor value of 0.1 µF (as shown in
Figure 7 ) is recommended in order to provide the needed filtering.
In addition to transients that are caused by normal SRAM operation, power cycling can generate negative voltage spikes on V
CC
that drive it to values below V
SS
by as much as one volt. These negative spikes can cause data corruption in the SRAM while in battery backup mode. To protect from these voltage spikes, STMicroelectronics recommends connecting a Schottky diode from V
CC
to V
SS
(cathode connected to V
CC
, anode to V
SS
).
Schottky diode 1N5817 is recommended for through hole and MBRS120T3 is recommended for surface mount.
Figure 7.
Supply voltage protection
VCC
VCC
0.1
µ F DEVICE
V
SS
AI00622
Obsolete Product(s) - Obsolete Product(s)
12/25 Doc ID 5679 Rev 5
M40Z300, M40Z300W Maximum ratings
Stressing the device above the rating listed in the absolute maximum ratings table may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Table 3.
Symbol
Absolute maximum ratings
Parameter Value Unit
T
T
A
STG
Ambient operating temperature
Storage temperature
Grade 1
Grade 6
SNAPHAT
®
SOIC
0 to 70
–40 to 85
–40 to 85
–55 to 125
T
SLD
(1)
V
V
IO
CC
Lead solder temperature for 10 seconds
Input or output voltage
Supply voltage
M40Z300
M40Z300W
260
–0.3 to V
CC
+ 0.3
–0.3 to 7.0
–0.3 to 4.6
I
O
P
D
Output current
Power dissipation
20
1
1.
For SO package, Lead-free (Pb-free) lead finish: Reflow at peak temperature of 260°C (total thermal budget not to exceed 245°C for greater than 30 seconds).
Caution: Negative undershoots below –0.3 V are not allowed on any pin while in the battery backup mode.
Caution: Do NOT wave solder SOIC to avoid damaging SNAPHAT sockets.
°C
V
V
V
°C
°C
°C
°C mA
W
Obsolete Product(s) - Obsolete Product(s)
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DC and AC parameters
4 DC and AC parameters
Note:
M40Z300, M40Z300W
This section summarizes the operating and measurement conditions, as well as the DC and
AC characteristics of the device. The parameters in the following DC and AC characteristic
tables are derived from tests performed under the measurement conditions listed in Table 4:
DC and AC measurement conditions . Designers should check that the operating conditions
in their projects match the measurement conditions when using the quoted parameters.
Table 4.
DC and AC measurement conditions
Parameter
V
CC
supply voltage
Ambient operating temperature
Load capacitance (C
L
)
Input rise and fall times
Input pulse voltages
Input and output timing ref. voltages
Grade 1
Grade 6
M40Z300
4.5 to 5.5 V
0 to 70 °C
–40 to 85 °C
100 pF
≤ 5 ns
0 to 3 V
1.5 V
Output High Z is defined as the point where data is no longer driven.
Figure 8.
AC testing load circuit
M40Z300W
2.7 to 3.6 V
0 to 70 °C
–40 to 85 °C
50 pF
≤ 5 ns
0 to 3 V
1.5 V
333
Ω
DEVICE
UNDER
TEST
1.73V
CL = 100pF or 50pF
Note:
CL includes JIG capacitance
50 pF for M40Z300W.
Capacitance
Symbol
C
IN
C
OUT
(3)
Input capacitance
Input/output capacitance
1.
Sampled only, not 100% tested.
2.
At 25 °C, f = 1 MHz.
3.
Outputs deselected.
Min
-
-
Max
8
10
Unit pF pF
AI02393
14/25 Doc ID 5679 Rev 5
M40Z300, M40Z300W DC and AC parameters
Table 6.
DC characteristics
M40Z300 M40Z300W
Sym Parameter Test condition
(1)
Unit
Min Typ Max Min Typ Max
I
LI
(2)
I
CC
V
IL
V
V
IH
OL
V
OH
V
OHB
Input leakage current
Supply current
Input low voltage
Input high voltage
Output low voltage
Output low voltage
(open drain)
(3)
Output high voltage
V
OH
battery backup
(4)
0 V ≤ V
IN
≤ V
CC
Outputs open
I
I
OL
OL
= 4.0 mA
= 10 mA
–0.3
2.2
3
±1
6
0.8
0.4
0.4
–0.3
V
CC
+ 0.3
2.0
2
0.8
V
CC
±1
4
+ 0.3
0.4
0.4
V
I
OUT1
V
OUT
current (active)
I
OH
= –2.0 mA
I
OUT2
= –1.0 µA
V
OUT
> V
CC
–0.3
V
OUT
> V
CC
–0.2
2.4
2.0
2.9
3.6
250
150
2.4
2.0
2.9
3.6
150
100
I
OUT2
V
OUT
current (battery backup)
I
CCDR
Data retention mode current
(5)
THS
V
V
PFD
SO
Threshold select voltage
Power-fail deselect voltage (THS = V
SS
)
Power-fail deselect voltage (THS = V
OUT
)
Battery backup switchover voltage
V
OUT
> V
BAT
–0.3
V
SS
4.5
4.2
100
4.6
4.35
3.0
V
100
OUT
4.75
4.5
V
SS
2.8
2.5
100
2.9
2.6
2.5
100
V
OUT
3.0
2.7
µA nA
V
V
V
V
V
BAT
Battery voltage 2.0
2.9
3.6
2.0
2.9
3.6
V
1.
Valid for ambient operating temperature: T
A noted).
= 0 to 70 °C or –40 to 85 °C; V
CC
= 2.7 to 3.6 V or 4.5 to 5.5 V (except where
2.
Outputs deselected.
3.
For RST & BL pins (open drain).
4.
Chip enable outputs (E1
CON
- E4
CON
) can only sustain CMOS leakage currents in the battery backup mode.
Higher leakage currents will reduce battery life.
5.
Measured with V
OUT
and E1
CON
- E4
CON
open.
V
V mA mA
µA mA
V
V
V
Obsolete Product(s) - Obsolete Product(s)
Doc ID 5679 Rev 5 15/25
DC and AC parameters
Figure 9.
Power-down timing
VCC
VPFD (m a x)
VPFD
VPFD (min)
V
S O tF
E
E1CON-E4CON
R S T tWPT tFB
Figure 10.
Power-up timing
VCC
VPFD (max)
VPFD
VPFD (min)
VSO tR tCER
E tRB
VOHB
RST tREC
VOHB tEDH
M40Z300, M40Z300W
AI02 3 9 8 B tEDL
AI02399B
16/25 Doc ID 5679 Rev 5
M40Z300, M40Z300W DC and AC parameters
Table 7.
Symbol t
F
(2)
Power down/up mode AC characteristics
Parameter
(1)
Min Max Unit t
FB
(3)
V
V
PFD
PFD
(max) to V
(min) to V
PFD
SS
V
(min) V
CC
CC
fall time
fall time
M40Z300
M40Z300W
300
10
150
10 t
R
V
PFD
(min) to V
PFD
(max) V
CC
rise time t t
EDL
EDH
Chip enable propagation delay low
Chip enable propagation delay high
M40Z300
M40Z300W
M40Z300
M40Z300W
12
20
10
20 t
AS t
CER t
REC
(4) t
WPT t
RB
A, B set up to E
Chip enable recovery
V
PFD
(max) to RST high
Write protect time
V
SS
to V
PFD
(min) V
CC
rise time
M40Z300
M40Z300W
0
40
40
40
40
1
120
120
150
250
1.
Valid for ambient operating temperature: T
5.5 V(except where noted).
A
= 0 to 70 °C or –40 to 8 5°C; V
CC
= 2.7 to 3.6 V or 4.5 to
2.
V
PFD
(max) to V
PFD until 200 µs after V
(min) fall time of less than t
F
CC
passes V
PFD
(min).
may result in deselection/write protection not occurring
3.
V
PFD
(min) to V
SS
fall time of less than t
FB
may cause corruption of RAM data.
4.
t
REC
(min) = 20ms for industrial temperature Grade 6 device.
ns ms ms
µs
µs
µs ns ns ns ns
µs
µs
µs
µs
Obsolete Product(s) - Obsolete Product(s)
Doc ID 5679 Rev 5 17/25
Package mechanical data
5 Package mechanical data
M40Z300, M40Z300W
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
®
packages, depending on their level of environmental compliance. ECOPACK
® specifications, grade definitions and product status are available at: www.st.com
.
ECOPACK
®
is an ST trademark.
Obsolete Product(s) - Obsolete Product(s)
18/25 Doc ID 5679 Rev 5
M40Z300, M40Z300W Package mechanical data
Figure 11.
SOH28 – 28-lead plastic small outline, 4-socket battery SNAPHAT, package outline
A2 A
C eB B e
N
D
CP
E H
A1 L α
1
Note: Drawing is not to scale.
Table 8.
SOH28 – 28-lead plastic small outline, battery SNAPHAT, package mechanical data mm inches
Symbol
Typ Min Max Typ Min Max
E e
C
D
A
A1
A2
B eB
H
1.27
0.05
2.34
0.36
0.15
17.71
8.23
–
3.20
11.51
3.05
0.36
2.69
0.51
0.32
18.49
8.89
–
3.61
12.70
0.050
0.002
0.092
0.014
0.006
0.697
0.324
–
0.126
0.453
L 0.41
1.27
0.016
0.050
a
N
0°
28
8° 0°
28
8°
Obsolete Product(s) - Obsolete Product(s)
CP 0.10
0.004
0.120
0.014
0.106
0.020
0.012
0.728
0.350
–
0.142
0.500
S OH-A
Doc ID 5679 Rev 5 19/25
Package mechanical data M40Z300, M40Z300W
Figure 12.
SH – 4-pin SNAPHAT housing for 48 mAh battery, package outline eA
D
A1
A
B eB
A3
A2
L
E
Note:
SHZP-A
Drawing is not to scale.
A3
B
D
E
A
A1
A2 eA eB
L
Table 9.
Symbol
SH – 4-pin SNAPHAT housing for 48 mAh battery, package mechanical data mm inches
Typ Min Typ Min
6.73
6.48
0.46
21.21
14.22
15.55
3.20
2.03
Max
9.78
7.24
6.99
0.38
0.56
21.84
14.99
15.95
3.61
2.29
0.265
0.255
0.018
0.835
0.560
0.612
0.126
0.080
Max
0.385
0.285
0.275
0.015
0.022
0.860
0.590
0.628
0.142
0.090
Obsolete Product(s) - Obsolete Product(s)
20/25 Doc ID 5679 Rev 5
M40Z300, M40Z300W Package mechanical data
Figure 13.
SH – 4-pin SNAPHAT housing for 120mAh battery, package outline eA
D
A1
A
B eB
A3
A2
L
E
Note:
SHZP-A
Drawing is not to scale.
Table 10.
SH – 4-pin SNAPHAT housing for 120 mAh battery, package mechanical data mm inches
Symbol
Typ Min Max Typ Min Max
A3
B
D
E
A
A1
A2 eA eB
L
8.00
7.24
0.46
21.21
17.27
15.55
3.20
2.03
10.54
8.51
8.00
0.38
0.56
21.84
18.03
15.95
3.61
2.29
0.315
0.285
0.018
0.835
0.680
0.612
0.126
0.080
0.415
.0335
0.315
0.015
0.022
0.860
0.710
0.628
0.142
0.090
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Doc ID 5679 Rev 5 21/25
Package mechanical data M40Z300, M40Z300W
Figure 14.
SO16 – 16-lead plastic small outline, 150 mils body width, package outline
A
B e
D
A2
CP
C
N
E H
1
A1 L α
Note: Drawing is not to scale.
Table 11.
SO16 – 16-lead plastic small outline, 150 mils body width, package mechanical data mm inches
Symbol
Typ.
Min.
Max.
Typ.
Min.
Max.
E e
C
D
A
A1
A2
B
H
L
1.27
0.10
0.35
0.19
9.80
3.80
–
5.80
0.40
1.75
0.25
1.60
0.46
0.25
10.00
4.00
–
6.20
1.27
0.050
0.004
0.014
0.007
0.386
0.150
–
0.228
0.016
0.069
0.010
0.063
0.018
0.010
0.394
0.158
–
0.244
0.050
a 0° 8° 0° 8°
N
CP
16
0.10
16
0.004
S Ob
22/25 Doc ID 5679 Rev 5
M40Z300, M40Z300W Part numbering
Table 12.
Ordering information example
M40Z Example:
Device type
M40Z
300W MH 1 E
Supply and write protect voltage
300
(1)
= V
CC
= 4.5 to 5.5 V
THS = V
SS
= 4.5 V ≤ V
PFD
≤ 4.75 V
THS = V
OUT
= 4.2 V ≤ V
PFD
≤ 4.5 V
300W
CC
= 3.0 to 3.6 V
THS = V
SS
= 2.8 V ≤ V
PFD
≤ 3.0 V
V
CC
= 2.7 V to 3.3 V
THS = V
OUT
= 2.5 V ≤ V
PFD
≤ 2.7 V
Package
MH
(2)
= SOH28
MQ = SO16
Temperature range
1 = 0 to 70 °C
6 = –40 to 85 °C
Shipping method for SOIC
E = Lead-free package (ECOPACK
®)
, tubes
F = Lead-free package (ECOPACK
®)
, tape & reel
1.
Not recommended for new design. Contact ST sales office for availability.
2.
The SOIC package (SOH28) requires the battery package (SNAPHAT
®
) which is ordered separately under the part number “M4Zxx-BR00SH” in plastic tubes or “M4Zxx-BR00SHTR” in tape & reel form.
drain the lithium button-cell battery.
For other options, or for more information on any aspect of this device, please contact the
ST sales office nearest you
Table 13.
SNAPHAT
®
battery table
Part number
M4Z28-BR00SH1
M4Z32-BR00SH1
Description
Lithium battery (48 mAh) SNAPHAT
Lithium battery (120 mAh) SNAPHAT
Package
SH
SH
Doc ID 5679 Rev 5 23/25
Revision history M40Z300, M40Z300W
Table 14.
Document revision history
Date
Mar-1999
08-Mar-2000
22-Sep-2000
23-Feb-2001
30-May-2001
10-Jul-2001
01-Aug-2001
15-Jan-2002
13-May-2002
31-Oct-2003
04-Nov-2003
23-Feb-2005
05-Nov-2007
19-Oct-2010
Revision
1.0
1.1
1.2
1.3
1.4
2.0
2.1
2.2
2.3
2.4
2.5
3.0
4.0
5
Changes
First issue
Document layout changed; SO16 package added; battery capacity
SO16 package measures change
Added information for industrial temperature (
)
Change “Controller” references to “SUPERVISOR”
Reformatted; added temp/voltage info. to tables (
,
,
,
,
)
E2 connections added to hookup (
16-pin SOIC connections split, graphic added (
Modify reflow time and temperature footnote ( Table 3
)
Update DC characteristics (
Correct DC characteristics (
Reformatted; IR reflow, SO package updates ( Table 3
)
Reformatted; added lead-free second level interconnect to cover page
and Section 5: Package mechanical data ; updated
and
,
.
Devices not recommended for new design, updated document status;
®
text in
Section 5: Package mechanical data
; reformatted document.
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24/25 Doc ID 5679 Rev 5
M40Z300, M40Z300W
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Doc ID 5679 Rev 5 25/25
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