STMicroelectronics RF4L10700CB4 Datasheet
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RF4L10700CB4
Datasheet
700 W, 40 V, HF to 1 GHz RF power LDMOS transistor
1
3
4
5
Pin
1
2
2
5
4
3
D4E
Pin connection
Connection
Drain A
Drain B
Source (bottom side)
Gate B
Gate A
Features
Order code
RF4L10700CB4
Frequency
915 MHz
V
DD
40 V
P
OUT
700 W
Gain
15 dB
Efficiency
70%
• High efficiency and linear gain operations
• Integrated ESD protection
• Internally matched pair transistors in push-pull configuration
• Large positive and negative gate-source voltage range for improved class C operation
• Optimized for Doherty applications
• Excellent thermal stability, low HCI drift
• In compliance with the European directive 2002/95/EC
Applications
• ISM
• RF energy
Description
The RF4L10700CB4 is a 700 W, 40 V, high performance, internally matched LDMOS
FET, designed for multiple ISM and RF energy applications up to 1 GHz frequency range. It can be used in class AB, B or C for both CW and pulse applications in narrow-band operation. It is qualified up to 40 V operation.
Product status link
RF4L10700CB4
Product summary
Order code RF4L10700CB4
Marking
Package
4L10700
D4E
Packing
Base/bulk quantity
Tray
20/100
DS13741 - Rev 2 - September 2021
For further information contact your local STMicroelectronics sales office.
www.st.com
1
RF4L10700CB4
Electrical ratings
Electrical ratings
Symbol
V
DS
V
GS
V
DD
T
STG
T
J
Table 1. Absolute maximum ratings (T
C
= 25 °C)
Parameter
Drain-source voltage
Gate-source voltage
Maximum operating voltage
Storage temperature range
Maximum junction temperature
Table 2. Thermal data
Symbol
R thJC
1. T
C
= 85 °C , T
J
= 200 °C, DC test.
Parameter
Thermal resistance, junction-to-case
Symbol
HBM
CDM
Table 3. ESD protection
Test methodology
Human body model (according to ANSI/ESDA/JEDEC JS001-2017)
Charge device model (according to ANSI/ESDA/JEDEC JS002-2014)
Value
90
-8 to 10
42
-65 to 150
200
V
°C
°C
Unit
V
V
Value
0.16
Class
2
C3
Unit
°C/W
DS13741 - Rev 2 page 2/11
RF4L10700CB4
Electrical characteristics
2
Note:
Electrical characteristics
Symbol
V
(BR)DSS
I
DSS
I
GSS
V
GS(th)
V
GS(Q)
V
DS(on)
I
DS(on)
R
DS(on)
Table 4. Static (per side)
Parameter Test conditions
Drain-source breakdown voltage V
GS
= 0 V, I
DS
= 100 µA
Zero gate voltage drain leakage current
V
GS
= 0 V, V
DS
= 42 V
V
GS
= 0 V, V
DS
= 75 V
Gate-source leakage current
Gate threshold voltage
V
GS
= -8/10 V, V
DS
= 0 V
V
DS
= 40 V, I
DS
= 600 µA
Gate quiescent voltage
Static drain-source on-voltage
V
DS
= 1 V, I
DS
= 100 mA
V
GS
= 10 V, I
DS
= 5 A
Static drain-source on-current V
GS
= 10 V, V
DS
= 100 mV
Drain-source on-state resistance V
GS
= 10 V, V
DS
= 100 mV
Symbol
P
OUT
G
PS
η
D
VSWR
Parameter
Output power
Power gain
Drain efficiency
Load mismatch
Table 5. Dynamic
Test conditions f = 915 MHz, pulsed CW,
1 dB compression
P
OUT
= 700 W, all phases
V
DD
= 40 V, I
DQ
= 100 mA, pulse width = 100 μs, duty cycle = 10%.
Min.
Typ.
Max.
Unit
90 V
-
-
1 μA
-
1.75
2
-
-
-
±100
2.50
5 nA
V
V
-
-
-
0.5
2.5
1
V
A
Ω
Min.
Typ.
Max.
Unit
-
700
15
W dB
-
70
10:1
%
DS13741 - Rev 2 page 3/11
3
Note:
RF4L10700CB4
Typical performances
Typical performances
20
19
18
17
16
15
14
Figure 1. Power gain and drain efficiency vs output power
GADG220920210951GT
85
75
65
55
13
48 49 50
G
PS
η
D
51 52
910 MHz
53 54
P
OUT
(dbm)
55
915 MHz
V
DD
= 40 V, I
DQ
= 40 V, pulse width = 100 μs, duty cycle = 10%.
56 57 58
920 MHz
59
45
35
25
60
15
DS13741 - Rev 2 page 4/11
4
Test circuits
Figure 2. Test circuit layout
RF4L10700CB4
Test circuits
Component
C1, C2, C3, C4, C5
C6, C7
C8
C9
C10, C11
C11, C12
L1
R1, R2, R3
PCB
GADG120520210908GT
Value
56 pF
47 pF
1 pF
18 pF (3x)
10 μF
1000 μF
0.5 turns
10 Ω
Table 6. Components list
Size
0805
Reference
ATC800B
ATC800B
ATC800B
ATC800B
1210 Ceramic multilayer capacitor
50V electrolytic capacitor
0603
Taconic RF-60TC 25 mils
Φ 1 mm varnished wire chip resistor
DS13741 - Rev 2 page 5/11
5
5.1
RF4L10700CB4
Package information
Package information
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com
. ECOPACK is an ST trademark.
D4E package information
Figure 3. D4E package outline
DS13741 - Rev 2
DM00666713_2 page 6/11
DS13741 - Rev 2
Symbol
P
Q
R
S
T
V
R1
CH1
G
H
L
M
N
A
B
C
E
F
Min.
10.04
5.72
16.11
1.51
0.10
35.44
11.56
1.92
3.06
9.25
4.17
30.96
1.55
2.09
41.08
13.60
Table 7. D4E package mechanical data
Millimeters
Typ.
4.55
31.24
1.62
2.16
41.22
13.72
1.59
1.19
10.16
5.85
16.62
1.78
0.13
35.56
11.68
2.04
3.18
9.40
RF4L10700CB4
D4E package information
Max.
10.28
3.48
17.13
2.05
0.16
35.68
11.80
2.16
3.30
9.50
4.93
31.52
1.69
2.23
13.84
page 7/11
5.2
RF4L10700CB4
Marking information
Marking information
PACKAGE FACE : TOP
C
E
D
A B
F G H
Figure 4. Marking composition
LEGEND
Unmarkable Surface
Marking Composition Field
A - STANDARD ST LOGO
B - ECO level
(e4)
C
D
- MARKING AREA
- ADDITIONAL
INFORMATION
(MAX CHAR ALLOWED = 7)
E - COUNTRY OF ORIGIN
(MAX CHAR ALLOWED = 3)
F - Assy Plant
(PP)
G - Assy Year
(Y)
H - Assy Week
(WW)
GADG040220211644GT
DS13741 - Rev 2 page 8/11
Revision history
Date
17-May-2021
22-Sep-2021
Revision
1
2
Table 8. Document revision history
Changes
First release.
Updated Features in cover page.
Updated Table 1. Absolute maximum ratings (T
.
Updated Section 2 Electrical characteristics
.
Added
Section 3 Typical performances .
RF4L10700CB4
DS13741 - Rev 2 page 9/11
RF4L10700CB4
Contents
Contents
DS13741 - Rev 2 page 10/11
RF4L10700CB4
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DS13741 - Rev 2 page 11/11
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