STD12N60DM2AG
Datasheet
Automotive-grade N-channel 600 V, 380 mΩ typ., 10 A MDmesh DM2
Power MOSFET in a DPAK package
G(1)
TAB
DPAK
1
2 3
D(2, TAB)
S(3)
NG1D2TS3Z
Features
Order code
STD12N60DM2AG
V
DS
@ T
Jmax
650 V
R
DS(on )
max.
430 mΩ
I
D
10 A
• AEC-Q101 qualified
• Fast-recovery body diode
• Extremely low gate charge and input capacitance
• Low on-resistance
• 100% avalanche tested
• Extremely high dv/dt ruggedness
• Zener-protected
Applications
• Switching applications
Description
This high-voltage N-channel Power MOSFET is part of the MDmesh DM2 fastrecovery diode series. It offers very low recovery charge (Q rr
) and time (t rr
) combined with low R
DS(on)
, rendering it suitable for the most demanding high-efficiency converters and ideal for bridge topologies and ZVS phase-shift converters.
Product status
STD12N60DM2AG
Product summary
Order code
Marking
Package
Packing
STD12N60DM2AG
12N60DM2
DPAK
Tape and reel
DS12209 - Rev 4 - November 2019
For further information contact your local STMicroelectronics sales office.
www.st.com
STD12N60DM2AG
Electrical ratings
1
Electrical ratings
Table 1. Absolute maximum ratings
Symbol
V
I
GS
D
Parameter
Gate-source voltage
Drain current (continuous) at T case
= 25 °C
Drain current (continuous) at T case
= 100 °C
I
DM
(1)
P
TOT dv/dt
(2)
dv/dt
(3)
T stg
T j
Drain current (pulsed)
Total power dissipation at T case
= 25 °C
Peak diode recovery voltage slope
MOSFET dv/dt ruggedness
Storage temperature range
Operating junction temperature range
1. Pulse width is limited by safe operating area.
2. I
SD
≤ 10 A, di/dt= 800 A/μs; V
DS
peak < V
(BR)DSS
,V
DD
= 400 V
3. V
DS
≤ 480 V.
Table 2. Thermal data
Symbol
R thj-case
R thj-pcb
(1)
Parameter
Thermal resistance junction-case
Thermal resistance junction-pcb
1. When mounted on 1 inch² FR-4 board, 2oz Cu.
Table 3. Avalanche characteristics
Symbol
I
AR
(1)
E
AS
(2)
Parameter
Avalanche current, repetitive or not repetitive
Single pulse avalanche energy
1. pulse width limited by T jmax
2. starting T j
= 25 °C, I
D
= I
AR
, V
DD
= 50 V.
Value
±25
10
6.3
25
110
50
50
-55 to 150
Unit
V
A
A
W
V/ns
°C
Value
1.14
50
Unit
°C/W
Value
2
250
Unit
A mJ
DS12209 - Rev 4 page 2/15
2
STD12N60DM2AG
Electrical characteristics
Electrical characteristics
(T case
= 25 °C unless otherwise specified)
Table 4. Static
Symbol
V
(BR)DSS
Parameter
Drain-source breakdown voltage
V
GS
Test conditions
= 0 V, I
D
= 1 mA
I
DSS
I
GSS
V
GS(th)
Zero gate voltage drain current
Gate-body leakage current
Gate threshold voltage
V
GS
= 0 V, V
DS
= 600 V
V
GS
= 0 V, V
DS
= 600 V,
T case
= 125 °C (1)
V
DS
= 0 V, V
GS
= ±25 V
V
DS
= V
GS
, I
D
= 250 µA
R
DS(on)
Static drain-source onresistance
V
1. Defined by design, not subject to production test.
GS
= 10 V, I
D
= 5 A
Min.
600
3
Typ.
4
380
Max.
1
100
±5
5
430
Unit
V
µA
µA
V mΩ
Table 5. Dynamic
Symbol
C iss
C oss
C rss
C oss eq.
(1)
R
G
Q g
Q gs
Q gd
Parameter
Input capacitance
Output capacitance
Reverse transfer capacitance
V
V
DS
GS
Test conditions
= 100 V, f = 1 MHz,
= 0 V
Equivalent output capacitance V
DS
= 0 to 480 V, V
GS
= 0 V
Intrinsic gate resistance f = 1 MHz, I
D
= 0 A
Total gate charge
Gate-source charge
Gate-drain charge
V
DD
= 480 V, I
D
= 10 A,
V
GS
= 0 to 10 V (see
Figure 14. Test circuit for gate charge behavior
)
Min.
-
-
-
-
-
-
-
-
Typ.
614
32
3.7
57
7
14.5
3.8
6.2
Max.
-
-
-
-
-
-
-
-
Unit pF pF
Ω nC
1. C oss eq.
is defined as a constant equivalent capacitance giving the same charging time as C oss to 80% V
DSS
.
when V
DS
increases from 0
Symbol t d(on) t r t d(off) t f
Parameter
Turn-on delay time
Rise time
Turn-off delay time
Fall time
Table 6. Switching times
Test conditions
V
DD
= 300 V, I
D
= 5 A,
R
G
= 4.7 Ω, V
GS
= 10 V
(see
Figure 13. Test circuit for resistive load switching times and Figure 18. Switching time waveform )
Min.
-
-
-
-
Typ.
15
8
30
9.5
Max.
-
-
-
-
Unit ns
DS12209 - Rev 4 page 3/15
DS12209 - Rev 4
STD12N60DM2AG
Electrical characteristics
Table 7. Source-drain diode
Symbol
I
SD
I
SDM
(1)
V
SD
I
I
Q rr
RRM t t rr
Q rr rr
(2)
RRM
Parameter
Source-drain current
Source-drain current (pulsed)
Forward on voltage
Reverse recovery time
Reverse recovery charge
Reverse recovery current
Reverse recovery time
Reverse recovery charge
Reverse recovery current
Test conditions
V
GS
= 0 V, I
SD
= 10 A
I
SD
= 10 A, di/dt = 100 A/µs,
V
DD
= 60 V
(see
Figure 15. Test circuit for inductive load switching and diode recovery times )
I
SD
= 10 A, di/dt = 100 A/µs,
V
DD
= 60 V, T j
= 150 °C
(see
Figure 15. Test circuit for inductive load switching and diode recovery times )
1. Pulse width is limited by safe operating area.
2. Pulse test: pulse duration = 300 µs, duty cycle 1.5%.
-
-
-
Min.
-
-
-
-
-
-
Symbol
V
(BR)GSO
Parameter
Gate-source breakdown voltage
Table 8. Gate-source Zener diode
Test conditions
I
GS
= ±250 µA, I
D
= 0 A
Min.
±30
Typ.
Typ.
-
110
460
8.1
70
210
5.9
Max.
10
25
1.6
Max.
-
V ns nC
Unit
A
A
A ns nC
A
Unit
V
The built-in back-to-back Zener diodes are specifically designed to enhance the ESD performance of the device.
The Zener voltage facilitates efficient and cost-effective device integrity protection, thus eliminating the need for additional external componentry.
page 4/15
STD12N60DM2AG
Electrical characteristics (curves)
2.1
Electrical characteristics (curves)
Figure 1. Safe operating area
I
D
(A) Operation in this area is limited by R
DS(on)
GIPG120420181248SOA t p
=10 µs
10 1
Figure 2. Normalized transient thermal impedance
K
GC20460
10 0
10 0
10 -1
10 -1 10 0
T
J
T
C
V
≤150 °C
=25 °C
GS
=10 V single pulse
10 1 t p
=10 ms
10 2 t p
=100 µs t p
V
DS
=1 ms
(V)
16
12
8
4
0
0
Figure 3. Typical output characteristics
I
D
(A)
24
GIPG120420181034OCH
V
GS
= 8, 9, 10 V
20
V
GS
= 7 V
4 8
V
GS
=6 V
12
V
GS
=5 V
16 V
DS
(V)
Figure 5. Typical gate charge characteristics
V
DS
(V)
400
V
DS
GIPG120420181035QVG V
GS
(V)
V
DD
= 480 V
I
D
= 10 A 16
12 300
200
Q gs
Q g
Q gd 8
100
0
0 4 8
4
12 16 20 Q
0 g
(nC)
10 -1
10 -2
10 -5 10 -4 10 -3 10 -2 10 -1 t p
(s)
Figure 4. Typical transfer characteristics
I
D
(A)
24
GIPG120420181034TCH
V
DS
= 15 V
20
16
12
8
4
0
4.5
5.0
5.5
6.0
6.5
7.0
7.5
V
GS
(V)
Figure 6. Typical drain-source on-resistance
R
DS(on)
(mΩ)
440
V
GS
= 10 V
GIPG120420181043RID
420
400
380
360
340
320
0 2 4 6 8 10 I
D
(A)
DS12209 - Rev 4 page 5/15
STD12N60DM2AG
Electrical characteristics (curves)
Figure 7. Typical capacitance characteristics
C
(pF)
IGIPG120420181145CVR
10 3
C
ISS
10 2
10 1 f = 1 MHz
C
OSS
C
RSS
10 0
10 -1 10 0 10 1 10 2
V
DS
(V)
Figure 8. Normalized gate threshold vs temperature
V
GS(th)
(norm.)
GIPG120420181044VTH
I
D
=250 μA
1.2
1.0
0.8
0.6
0.4
-75 -25 25 75 125 T j
(°C)
Figure 9. Normalized on-resistance vs temperature
R
DS(on)
(norm.)
2.5
GIPG120420181045RON
V
GS
= 10 V
2.0
1.5
1.0
0.5
0.0
-75 -25 25 75 125 T j
(°C)
Figure 10. Normalized breakdown voltage vs temperature
V
(BR)DSS
(norm.)
1.10
I
D
= 1 mA
GIPG120420181045BDV
1.05
1.00
0.95
0.90
0.85
-75 -25 25 75 125 T j
(°C)
Figure 11. Typical output capacitance stored energy
Eoss
(µJ )
GIPG270516FQ6F01FEOS
4
3
2
1
0
0 100 200 300 400 500 600 V
DS
(V)
Figure 12. Typical reverse diode forward characteristics
V
SD
(V)
GIPG120420181046SDF
1.2
T j
= -50 ℃
1.0
T j
=25 ℃
0.8
T j
=150 ℃
0.6
0.4
0 2 4 6 8 10 I
SD
(A)
DS12209 - Rev 4 page 6/15
STD12N60DM2AG
Test circuits
3
Test circuits
Figure 13. Test circuit for resistive load switching times
V
GS pulse width
V
D
R
G
R
L
+
2200
μF
3.3
μF V
DD
D.U.T.
Figure 14. Test circuit for gate charge behavior
V
DD
RL
V
GS pulse width
2200
μF
+
1 kΩ
I
G
= CONST
2.7 kΩ
47 kΩ
100 Ω D.U.T.
V
G
AM01469v10
AM01468v1
Figure 15. Test circuit for inductive load switching and diode recovery times
Figure 16. Unclamped inductive load test circuit
G
25 Ω
D
A
D.U.T.
S
B
A A fast diode
B
B
G
+
_
R
G
100 µH
D
D.U.T.
S
3.3
µF +
1000
µF
V
DD
AM01470v1
Figure 17. Unclamped inductive waveform
V
(BR)DSS
V
D
I
DM
I
D
V
DD
V
DD
AM01472v1
V i pulse width
V
D
L
I
D
+
2200
µF
3.3
µF V
DD
D.U.T.
AM01471v1
0
Figure 18. Switching time waveform t d(on) t on t r t d(off) t off t f
90% 90%
10%
V
GS
V
DS
90%
10%
0 10%
AM01473v1
DS12209 - Rev 4 page 7/15
4
4.1
STD12N60DM2AG
Package information
Package information
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com
. ECOPACK is an ST trademark.
DPAK (TO-252) type A2 package information
Figure 19. DPAK (TO-252) type A2 package outline
DS12209 - Rev 4
0068772_type-A2_rev26 page 8/15
DS12209 - Rev 4
Dim.
c2
D
D1
E
E1 e e1
A
A1
A2 b b4 c
L2
L4
R
V2
H
L
L1
STD12N60DM2AG
DPAK (TO-252) type A2 package information
Table 9. DPAK (TO-252) type A2 mechanical data mm
Typ.
9.35
1.00
2.60
0.65
0.60
4.95
6.40
5.10
2.159
4.445
0.64
5.20
0.45
0.48
6.00
Min.
2.20
0.90
0.03
5.10
5.20
2.286
4.572
2.80
0.80
0.20
0°
10.10
1.50
3.00
0.95
1.00
5.25
6.60
5.30
2.413
4.699
0.90
5.40
0.60
0.60
6.20
Max.
2.40
1.10
0.23
8° page 9/15
DS12209 - Rev 4
STD12N60DM2AG
DPAK (TO-252) type A2 package information
Figure 20. DPAK (TO-252) recommended footprint (dimensions are in mm)
FP_0068772_26 page 10/15
4.2
DPAK (TO-252) packing information
Figure 21. DPAK (TO-252) tape outline
T
Top cover tape
10 pitches cumulative tolerance on tape +/- 0.2 mm
P0 D P2
B1
K0
For machine ref. only including draft and radii concentric around B0
B0
A0 P1
User direction of feed
D1
STD12N60DM2AG
DPAK (TO-252) packing information
F
E
W
User direction of feed
R
Bending radius
AM08852v1
DS12209 - Rev 4 page 11/15
DS12209 - Rev 4
A
D
B
Figure 22. DPAK (TO-252) reel outline
STD12N60DM2AG
DPAK (TO-252) packing information
T
40mm min. access hole at slot location
C
N
G measured at hub
Full radius
Tape slot in core for tape start
2.5mm min.width
Dim.
E
F
K0
P0
P1
P2
R
T
W
A0
B0
B1
D
D1
AM06038v1
1.5
1.5
1.65
7.4
2.55
3.9
7.9
1.9
40
0.25
15.7
Table 10. DPAK (TO-252) tape and reel mechanical data
Tape Reel mm
Dim.
Min.
6.8
10.4
Max.
7
10.6
12.1
1.6
N
T
D
G
A
B
C
Min.
1.5
12.8
20.2
16.4
50 1.85
7.6
2.75
4.1
8.1
2.1
0.35
16.3
Base qty.
Bulk qty.
mm
Max.
330
13.2
18.4
22.4
2500
2500 page 12/15
STD12N60DM2AG
Revision history
Date
23-Jun-2017
16-Apr-2018
27-Jun-2018
11-Nov-2019
Table 11. Document revision history
Revision Changes
1 First release.
2
3
4
Removed maturity status indication from cover page. The document status is production data.
Modified features table on cover page.
Modified Table 1. Absolute maximum ratings , Table 3. Avalanche characteristics ,
Table 4. Static , Table 5. Dynamic , Table 6. Switching times and Table 7. Source-drain diode .
Updated Section 2.1 Electrical characteristics (curves) .
Minor text changes.
Updated Section 4 Package information.
Updated title and features in cover page.
Updated
Table 4. Static
,
Section 2.1 Electrical characteristics (curves)
and
Section
3 Test circuits
.
Minor text changes.
DS12209 - Rev 4 page 13/15
STD12N60DM2AG
Contents
Contents
1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2
2 Electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3
2.1
Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
4 Package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
4.1
DPAK package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
4.2
DPAK packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13
DS12209 - Rev 4 page 14/15
STD12N60DM2AG
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DS12209 - Rev 4 page 15/15
