STD9N60M6
Datasheet
N
‑
channel 600 V 670 mΩ typ., 6 A
MDmesh M6 Power MOSFET in a DPAK package
G(1)
TAB
DPAK
1
2 3
D(2, TAB)
S(3)
AM01476v1_tab
Features
Order code
STD9N60M6
V
DS
600 V
• Reduced switching losses
• Lower R
DS(on)
per area vs previous generation
• Low gate input resistance
• 100% avalanche tested
• Zener-protected
R
DS(on)
max.
750 mΩ
I
D
6 A
Applications
• Switching applications
• LLC converters, resonant converters
• Boost PFC converters
Description
The new MDmesh M6 technology incorporates the most recent advancements to the well-known and consolidated MDmesh family of SJ MOSFETs. STMicroelectronics builds on the previous generation of MDmesh devices through its new M6 technology, which combines excellent R
DS(on)
per area improvement with one of the most effective switching behaviors available, as well as a user-friendly experience for maximum end-application efficiency.
Product status link
STD9N60M6
Product summary
Order code STD9N60M6
Marking
Package
Packing
9N60M6
DPAK
Tape and reel
DS13558 - Rev 1 - November 2020
For further information contact your local STMicroelectronics sales office.
www.st.com
STD9N60M6
Electrical ratings
1
Electrical ratings
Table 1. Absolute maximum ratings
Symbol
V
I
GS
D
Parameter
Gate-source voltage
Drain current (continuous) at T
C
= 25 °C
Drain current (continuous) at T
C
= 100 °C
I
DM
(1)
P
TOT
dv/dt (2) dv/dt (3)
T j
T stg
Drain current (pulsed)
Total power dissipation at T
C
= 25 °C
Peak diode recovery voltage slope
MOSFET dv/dt ruggedness
Operating junction temperature range
Storage temperature range
1. Pulse width limited by package.
2. I
SD
≤ 6 A, di/dt ≤ 400 A/μs, V
DD
= 400 V, V
DS(peak)
< V
(BR)DSS.
3. V
DS
≤ 480 V.
Table 2. Thermal data
Symbol
R thj-case
R thj-pcb
(1)
Parameter
Thermal resistance junction-case
Thermal resistance junction-pcb
1. When mounted on an 1 inch² FR-4, 2 Oz copper board.
Symbol
I
AR
E
AS
Table 3. Avalanche characteristics
Parameter
Avalanche current, repetitive or non-repetitive
(pulse width limited by T jmax
)
Single pulse avalanche energy
(starting T j
= 25 °C, I
D
= I
AR
, V
DD
= 50 V)
Value
±25
6
4
13.4
76
15
100
-55 to 150
Unit
V
A
A
A
W
V/ns
V/ns
°C
Value
1.65
50
Unit
°C/W
°C/W
Value
1.1
95
Unit
A mJ
DS13558 - Rev 1 page 2/15
2
STD9N60M6
Electrical characteristics
Electrical characteristics
(T
C
= 25 °C unless otherwise specified)
Table 4. On /off states
Symbol
V
(BR)DSS
Parameter
Drain-source breakdown voltage
V
GS
= 0 V, I
Test conditions
D
= 1 mA
V
R
I
I
DSS
GSS
GS(th)
DS(on)
Zero gate voltage drain current
Gate-body leakage current
Gate threshold voltage
Static drain-source onresistance
1. Defined by design, not subject to production test.
V
GS
= 0 V, V
DS
= 600 V
V
GS
= 0 V, V
DS
= 600 V, T
C
=125 °C (1)
V
DS
V
DS
= 0 V, V
= V
GS
GS
, I
D
= ±25 V
= 250 µA
V
GS
= 10 V, I
D
= 3 A
Min.
Typ.
Max.
Unit
600 V
3.25
4
670
1
100
±5
4.75
750
µA
µA
µA
V mΩ
Table 5. Dynamic
Symbol
C iss
C oss
C rss
C oss eq.
(1)
R
G
Q g
Q gs
Q gd
Parameter
Input capacitance
Output capacitance
Test conditions
V
DS
= 100 V, f = 1 MHz, V
GS
= 0 V
Reverse transfer capacitance
Equivalent output capacitance V
DS
= 0 to 480 V, V
GS
= 0 V
Intrinsic gate resistance f = 1 MHz, I
D
=0 A
Total gate charge
Gate-source charge
V
DD
= 480 V, I
D
= 6 A, V
GS
= 0 to 10
V (see
Figure 13. Test circuit for gate charge behavior )
Gate-drain charge
Min.
-
-
-
-
-
-
-
-
Typ.
273
24
0.65
49
5.5
10.0
1.9
5.4
Max.
-
-
-
-
-
-
-
-
Unit pF pF pF pF
Ω nC nC nC
1. C oss eq.
is defined as a constant equivalent capacitance giving the same charging time as C oss
when V to 80% V
DSS
DS
increases from 0
Symbol t d(on) t r t d(off) t f
Parameter
Turn-on delay time
Rise time
Turn-off delay time
Fall time
Table 6. Switching times
Test conditions
V
DD
= 300 V, I
D
= 3 A, R
G
= 4.7 Ω,
V
GS
= 10 V (see Figure 12. Test circuit for resistive load switching times and
Figure 17. Switching time waveform )
Min.
Typ.
Max.
Unit
-
7
4.1
-
ns ns
-
16.5
8.8
-
ns ns
DS13558 - Rev 1 page 3/15
STD9N60M6
Electrical characteristics
Table 7. Source-drain diode
Symbol
I
SD
I
SDM
(1)
V
SD
I
I t
Q
RRM t
Q rr rr rr rr
(2)
RRM
Parameter
Source-drain current
Source-drain current (pulsed)
Forward on voltage
Reverse recovery time
Reverse recovery charge
Reverse recovery current
Reverse recovery time
Reverse recovery charge
Reverse recovery current
1. Pulse width limited by safe operating area.
2. Pulsed: pulse duration = 300 µs, duty cycle 1.5%.
Test conditions
I
SD
= 6 A, V
GS
= 0 V
I
SD
= 6 A, di/dt = 100 A/µs
V
DD
= 60 V (see
Figure 14. Test circuit for inductive load switching and diode recovery times )
I
SD
= 6 A, di/dt = 100 A/µs
V
DD
= 60 V, T j
= 150 °C
(see Figure 14. Test circuit for inductive load switching and diode recovery times
)
-
-
-
-
Min.
Typ.
Max.
Unit
6 A
13.4
A
1.6
153
0.813
10.3
V ns
µC
A
-
248
1.33
ns
µC
10.7
A
DS13558 - Rev 1 page 4/15
STD9N60M6
Electrical characteristics (curves)
2.1
Electrical characteristics (curves)
I
D
(A)
Figure 1. Safe operating area
GADG021120201058SOA
I
DM
10 1 Operation in this area is limited by R
DS(on)
10 0
10 -1
10 -1 10 0 t p
=1 µs t p
=10 µs
R
DS(on) max.
t p
=100 µs
T
J
T
C
≤150 °C
=25 °C
V
GS
=10 V single pulse
10 1 10 2 t p
=1 ms t p
=10 ms
V
DS
(V)
V
(BR)DSS
4
2
0
0
8
6
Figure 3. Typical output characteristics
I
D
(A)
12
GADG021120201059OCH
V
GS
= 9, 10 V
V
GS
=8 V
10
4 8 12 16
V
GS
=7 V
V
GS
=6 V
V
DS
(V)
Figure 5. Typical gate charge characteristics
V
DS
(V)
600
500
400 Q gs
Q g
GADG021120201100QVG
V
V
DD
I
D
= 480 V
= 6 A
GS
(V)
12
V
GS
10
Q gd
8
300
200
100
0
0 2
V
DS
4 6 8
6
4
10 12
2
Q
0 g
(nC)
Figure 2. Maximum transient thermal impedance
Z thJ-C
(°C/W)
GADG021120201058ZTH
0.4 0.3
10 0 duty = 0.5
10 -1
0.2
0.1
0.05
Single pulse
R thJ-C
= 1.65 °C/W
10 -2
10 -6 10 -5 10 -4 10 -3 10 -2 10 -1 t p
(s)
Figure 4. Typical transfer characteristics
I
D
(A)
12
GADG021120201059TCH
6
4
10
8
2
0
4 5
V
DS
= 19 V
6 7 8 9 V
GS
(V)
Figure 6. Typical capacitance characteristics
C
(pF)
GADG021120201216CVR
10 3
C
ISS
10 2
10 1 f = 1 MHz
10 0
C
OSS
C
RSS
10 -1
10 -1 10 0 10 1 10 2
V
DS
(V)
DS13558 - Rev 1 page 5/15
STD9N60M6
Electrical characteristics (curves)
Figure 7. Typical drain-source on-resistance
R
DS(on)
(mΩ)
GADG021120201217RID
710
V
GS
= 10 V
690
670
650
630
0 1 2 3 4 5 6 I
D
(A)
Figure 8. Normalized on-resistance vs temperature
R
DS(on)
(norm.)
2.5
GADG021120201218RON
2.0
1.5
1.0
0.5
0.0
-75 -25 25 75 125 T
J
(°C)
Figure 9. Normalized gate threshold vs temperature
GADG021120201219BDV V
GS(th)
(norm.)
1.1
1.0
0.9
0.8
0.7
0.6
-75 -25
I
D
= 250 µA
25 75 125 T
J
(°C)
Figure 10. Normalized breakdown voltage vs temperature
V
(BR)DSS
(norm.)
1.10
GADG021120201722BDV
1.05
1.00
0.95
0.90
0.85
-75 -25 25
I
D
= 1 mA
75 125 T
J
(°C)
Figure 11. Typical reverse diode forward characteristics
V
SD
(V)
1.1
GADG021120201220SDF
T
J
= -50°C
1.0
0.9
0.8
0.7
T
J
= 25°C
T
J
= 150°C
0.6
0.5
0 1 2 3 4 5 6 I
SD
(A)
DS13558 - Rev 1 page 6/15
STD9N60M6
Test circuits
3
Test circuits
Figure 12. Test circuit for resistive load switching times
V
GS pulse width
V
D
R
G
R
L
+
2200
μF
3.3
μF
D.U.T.
V
DD
Figure 13. Test circuit for gate charge behavior
V
DD
RL
V
GS pulse width
2200
μF
+
1 kΩ
I
G
= CONST
2.7 kΩ
47 kΩ
100 Ω D.U.T.
V
G
AM01469v10 AM01468v1
Figure 14. Test circuit for inductive load switching and diode recovery times
G
25 Ω
A
D
S
D.U.T.
B
+
_
R
G
A A fast diode
B
B
G
100 µH
D
D.U.T.
3.3
µF
S
+
1000
µF
V
DD
Figure 15. Unclamped inductive load test circuit
V i pulse width
V
D
L
I
D
+
2200
µF
3.3
µF V
DD
D.U.T.
AM01471v1
AM01470v1
Figure 16. Unclamped inductive waveform
V
(BR)DSS
V
D
I
DM
I
D
V
DD
V
DD
0
Figure 17. Switching time waveform t d(on) t on t r t d(off) t off t f
90% 90%
10%
V
GS
V
DS
90%
10%
0 10%
AM01473v1
AM01472v1
DS13558 - Rev 1 page 7/15
4
4.1
STD9N60M6
Package information
Package information
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com
. ECOPACK is an ST trademark.
DPAK (TO-252) type C package information
Figure 18. DPAK (TO-252) type C package outline
DS13558 - Rev 1
0068772_C_29 page 8/15
DS13558 - Rev 1
Dim.
L
L1
L2
L3
L4
L6
θ1
θ2
V2 c2
D
D1
E
E1 e
H
A
A1
A2 b b4 c
STD9N60M6
DPAK (TO-252) type C package information
Table 8. DPAK (TO-252) type C mechanical data
0.72
5.13
0.47
0.47
6.00
Min.
2.20
0.90
0.00
5.25
6.50
4.70
2.186
9.80
1.40
mm
Typ.
2.30
1.01
5.33
6.10
6.60
2.286
10.10
1.50
2.90 REF
0.90
0.60
5°
5°
0°
0.51 BSC
0.80
1.80 BSC
7°
7°
6.70
2.386
10.40
1.70
1.25
0.85
5.46
0.60
0.60
6.20
Max.
2.38
1.10
0.10
1.00
9°
9°
8° page 9/15
DS13558 - Rev 1
STD9N60M6
DPAK (TO-252) type C package information
Figure 19. DPAK (TO-252) recommended footprint (dimensions are in mm)
FP_0068772_30 page 10/15
4.2
DPAK (TO-252) packing information
Figure 20. DPAK (TO-252) tape outline
T
Top cover tape
10 pitches cumulative tolerance on tape +/- 0.2 mm
P0 D P2
B1
K0
For machine ref. only including draft and radii concentric around B0
B0
A0 P1
User direction of feed
D1
STD9N60M6
DPAK (TO-252) packing information
F
E
W
User direction of feed
R
Bending radius
AM08852v1
DS13558 - Rev 1 page 11/15
DS13558 - Rev 1
A
D
B
Figure 21. DPAK (TO-252) reel outline
STD9N60M6
DPAK (TO-252) packing information
T
40mm min. access hole at slot location
C
N
G measured at hub
Full radius
Tape slot in core for tape start
2.5mm min.width
Dim.
E
F
K0
P0
P1
P2
R
T
W
A0
B0
B1
D
D1
AM06038v1
1.5
1.5
1.65
7.4
2.55
3.9
7.9
1.9
40
0.25
15.7
Table 9. DPAK (TO-252) tape and reel mechanical data
Tape Reel mm
Dim.
Min.
6.8
10.4
Max.
7
10.6
12.1
1.6
N
T
D
G
A
B
C
Min.
1.5
12.8
20.2
16.4
50 1.85
7.6
2.75
4.1
8.1
2.1
0.35
16.3
Base qty.
Bulk qty.
mm
Max.
330
13.2
18.4
22.4
2500
2500 page 12/15
Revision history
Date
02-Nov-2020
Revision
1
Table 10. Document revision history
Changes
First release.
STD9N60M6
DS13558 - Rev 1 page 13/15
STD9N60M6
Contents
Contents
1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2
2 Electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3
2.1
Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
4 Package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
4.1
DPAK (TO-252) type C package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
4.2
DPAK (TO-252) packing information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13
DS13558 - Rev 1 page 14/15
STD9N60M6
IMPORTANT NOTICE – PLEASE READ CAREFULLY
STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement.
Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of
Purchasers’ products.
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Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product.
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Information in this document supersedes and replaces information previously supplied in any prior versions of this document.
© 2020 STMicroelectronics – All rights reserved
DS13558 - Rev 1 page 15/15
