STF3N65M6
Datasheet
N-channel 650 V, 1.4 Ω typ., 3.5 A MDmesh M6
Power MOSFET in a TO-220FP package
G(1)
TO-220FP
D(2)
S(3)
1
2
3
Features
Order code
STF3N65M6
V
DS
650 V
R
DS(on)
max.
1.5 Ω
• Reduced switching losses
• Lower R
DS(on)
per area vs previous generation
• Low gate input resistance
• 100% avalanche tested
• Zener-protected
Applications
• Switching applications
I
D
3.5 A
AM15572v1_no_tab
Description
The new MDmesh M6 technology incorporates the most recent advancements to the well-known and consolidated MDmesh family of SJ MOSFETs. STMicroelectronics builds on the previous generation of MDmesh devices through its new M6 technology, which combines excellent R
DS(on)
per area improvement with one of the most effective switching behaviors available, as well as a user-friendly experience for maximum end-application efficiency.
Product status link
STF3N65M6
Device summary
Order code STF3N65M6
Marking
Package
Packing
3N65M6
TO-220FP
Tube
DS11614 - Rev 2 - April 2019
For further information contact your local STMicroelectronics sales office.
www.st.com
1
Electrical ratings
Table 1. Absolute maximum ratings
Symbol
V
GS
I
D
(1)
I
D
(1)
I
DM
(2)
P
TOT dv/dt
(3)
Gate-source voltage
Drain current (continuous) at T
C
= 25 °C
Drain current (continuous) at T
C
= 100 °C
Drain current (pulsed)
Parameter
Total power dissipation at T
C
= 25 °C
Peak diode recovery voltage slope dv/dt
V
(4)
ISO
MOSFET dv/dt ruggedness
Insulation withstand voltage (RMS) from all three leads to external heat sink (t = 1 s; T
C
= 25 °C)
Storage temperature range T stg
T j
Operating junction temperature range
1. Limited by maximum junction temperature.
2. Pulse width limited by safe operating area.
3. I
SD
≤ 3.5 A, di/dt ≤ 400 A/μs; V
DS(peak)
< V
(BR)DSS
, V
DD
= 400 V
4. V
DS
≤ 520 V
Table 2. Thermal data
Symbol
R thj-case
R thj-amb
(1)
Parameter
Thermal resistance junction-case
Thermal resistance junction-ambient
1. When mounted on FR-4 board of inch², 2oz Cu.
Symbol
I
AR
E
AS
Table 3. Avalanche characteristics
Parameter
Avalanche current, repetitive or not repetitive
(pulse width limited by T jmax
)
Single pulse avalanche energy
(starting T j
= 25 °C, I
D
= I
AR
, V
DD
= 50 V)
Value
±25
3.5
2.2
14
20
5
100
2.5
-55 to 150
Value
6.25
62.5
Value
1
78
STF3N65M6
Electrical ratings
Unit
°C/W
°C/W
Unit
A mJ
Unit
V
A
A
A
W
V/ns
V/ns kV
°C
DS11614 - Rev 2 page 2/13
2
STF3N65M6
Electrical characteristics
Electrical characteristics
T
C
= 25 °C unless otherwise specified
Table 4. On/off state
Symbol
V
(BR)DSS
Parameter
Drain-source breakdown voltage
V
GS
= 0, I
D
Test conditions
= 1 mA
V
R
I
I
DSS
GSS
GS(th)
DS(on)
Zero gate voltage drain current
Gate body leakage current
Gate threshold voltage
Static drain-source onresistance
1. Defined by design, not subject to production test.
V
GS
= 0 V, V
DS
= 650 V
V
GS
= 0 V, V
DS
= 650 V,
T
C
= 125 °C (1)
V
DS
V
DS
= 0 V, V
= V
GS
GS
, I
D
= ±25 V
= 250 µA
V
GS
= 10 V, I
D
= 1.75 A
Min.
Typ.
Max.
Unit
650 V
1 µA
2.25
3
1.4
100
±5
3.75
1.5
µA
µA
V
Ω
Table 5. Dynamic
Symbol
C iss
C oss
C rss
C oss eq.
(1)
R
G
Q g
Q
Q gs gd
Parameter
Input capacitance
Output capacitance
Reverse transfer capacitance
V
DS
Test conditions
= 100 V, f = 1 MHz, V
GS
= 0 V
Equivalent output capacitance V
DS
= 0 to 520 V, V
GS
= 0 V
Intrinsic gate resistance
Total gate charge
Gate-source charge
Gate-drain charge f = 1 MHz, I
D
= 0 A
V
DD
= 520 V, I
D
= 3.5 A,
V
GS
= 0 to 10 V
(see Figure 14. Test circuit for gate charge behavior )
Min.
-
-
-
-
-
-
-
-
Typ.
150
13
0.7
31
5.2
6
1
3.2
Max.
-
-
-
-
-
-
-
-
Unit pF pF pF pF
Ω nC nC nC
1. C oss eq.
is defined as a constant equivalent capacitance giving the same charging time as C oss to 80% V
DSS
.
when V
DS
increases from 0
Symbol t d(on) t r t d(off) t f
Parameter
Turn-on delay time
Rise time
Turn-off delay time
Fall time
Table 6. Switching times
Test conditions
V
DD
= 325 V, I
D
= 1.75 A,
R
G
= 4.7 Ω, V
GS
= 10 V
(see Figure 13. Test circuit for resistive load switching times
and
Figure 18. Switching time waveform )
Min.
Typ.
Max.
Unit
5.2
ns
5.4
ns
-
14.1
17.1
-
ns ns
DS11614 - Rev 2 page 3/13
STF3N65M6
Electrical characteristics
Table 7. Source-drain diode
Symbol
I
SD
I
SDM
(1)
V
I
I
SD
Q rr
RRM t t rr
Q rr rr
(2)
RRM
Parameter
Source-drain current
Source-drain current (pulsed)
Forward on voltage
Reverse recovery time
Reverse recovery charge
Reverse recovery current
Reverse recovery time
Reverse recovery charge
Reverse recovery current
1. Pulse width limited by safe operating area.
2. Pulsed: pulse duration = 300 µs, duty cycle 1.5%.
Test conditions
I
SD
= 3.5 A, V
GS
= 0 V
I
SD
= 3.5 A, di/dt = 100 A/µs,
V
DD
= 60 V
(see Figure 15. Test circuit for inductive load switching and diode recovery times
)
I
SD
= 3.5 A, di/dt = 100 A/µs,
V
DD
= 60 V, T j
= 150 °C
(see Figure 15. Test circuit for inductive load switching and diode recovery times
)
-
-
-
Min.
Typ.
Max.
Unit
3.5
A
14 A
1.6
159
0.7
V ns
µC
-
-
-
8.9
190
0.8
8.5
A ns
µC
A
DS11614 - Rev 2 page 4/13
STF3N65M6
Electrical characteristics (curves)
2.1
Electrical characteristics (curves)
Figure 1. Safe operating area
I
D
(A)
GIPG210420161016SOA
Operation in this area is limited by R
DS(on)
10 1
10 0
10 -1 t p
=10 µs t p
=100 µs t p
=1 ms t p
=10 ms
10 -2
10 -1 10 0
T
T j
≤150 °C c
= 25°C single pulse
10 1 10 2
V
DS
(V)
3
2
1
0
0
5
4
I
D
(A)
6
Figure 3. Output characteristics
GIPG040420161030OCH
V
GS
= 7, 8, 9, 10 V
4 8 12
V
GS
= 6 V
V
GS
= 5 V
V
GS
= 4 V
16 V
DS
(V)
Figure 5. Gate charge vs gate-source voltage
V
GS
(V)
12
V
DS
GIPG040420161032QVG V
DS
(V)
600
10 500
V
DD
= 520 V
I
D
= 3.5 A
8 400
6
4
2
0
0 1 2 3 4 5 6
300
200
100
Q
0 g
(nC)
10 -1
10 -2
K
Figure 2. Thermal impedance
GC20940
10 -3
10 -4 10 -3 10 -2 10 -1 10 0 t p
(s)
2
1
0
2
4
3
Figure 4. Transfer characteristics
I
D
(A)
6
V
DS
= 17 V
GIPG040420161031TCH
5
3 4 5 6 7 V
GS
(V)
Figure 6. Static drain-source on-resistance
R
DS(on)
(Ω)
GIPG040420161025RID
V
GS
= 10 V
1.48
1.44
1.40
1.36
1.32
0.5
1 1.5
2 2.5
3 3.5
I
D
(A)
DS11614 - Rev 2 page 5/13
STF3N65M6
Electrical characteristics (curves)
C
(pF)
Figure 7. Capacitance variations
GIPG040420161029CVR
10 3
C
ISS
10 2
10 1
10 0
10 -1
10 -1 f = 1 MHz
10 0 10 1 10 2
C
OSS
C
RSS
V
DS
(V)
Figure 9. Normalized on-resistance vs temperature
R
DS(on)
(norm.)
2.2
GIPG040420161025RON
V
GS
= 10 V
1.8
1.4
1.0
0.6
0.2
-75 -25 25 75 125 T j
(°C)
Figure 11. Output capacitance stored energy
E
OSS
(µJ)
GIPG040420161032EOS
1.6
1.2
0.8
0.4
0.0
0 100 200 300 400 500 600 V
DS
(V)
Figure 8. Normalized gate threshold voltage vs temperature
V
GS(th)
(norm.)
1.1
GIPG040420161025VTH
I
D
= 250 µA
1.0
0.9
0.8
0.7
0.6
-75 -25 25 75 125 T j
(°C)
Figure 10. Normalized V
(BR)DSS
vs temperature
V
(BR)DSS
(norm.)
1.08
GIPG040420161027BDV
I
D
= 1 mA
1.04
1.00
0.96
0.92
0.88
-75 -25 25 75 125 T j
(°C)
Figure 12. Source-drain diode forward characteristics
V
SD
(V)
1.1
GIPG040420161029SDF
T j
= -50 °C
1.0
T j
= 25 °C
0.9
0.8
0.7
T j
= 150 °C
0.6
0.5
0.5
1.0
1.5
2.0
2.5
3.0
3.5
I
SD
(A)
DS11614 - Rev 2 page 6/13
STF3N65M6
Test circuits
3
Test circuits
Figure 13. Test circuit for resistive load switching times
V
GS pulse width
V
D
R
G
R
L
+
2200
μF
3.3
μF
D.U.T.
V
DD
AM01468v1
Figure 15. Test circuit for inductive load switching and diode recovery times
Figure 14. Test circuit for gate charge behavior
12 V
V
GS pulse width
2200
μF
+
I
G
= CONST
2.7 kΩ
47 kΩ
1 kΩ
47 kΩ
100 nF
100 Ω
V
DD
1 kΩ
D.U.T.
V
G
AM01469v1
Figure 16. Unclamped inductive load test circuit
G
25 Ω
D
A
D.U.T.
S
B
+
_
R
G
A A fast diode
B
B
G
100 µH
D
D.U.T.
S
3.3
µF +
1000
µF
V
DD
AM01470v1
Figure 17. Unclamped inductive waveform
V (BR)DSS
V D
I DM
I D
V DD V
DD
AM01472v1
V i pulse width
V
D
L
I
D
+
2200
µF
3.3
µF
V
DD
D.U.T.
AM01471v1
0
Figure 18. Switching time waveform t d(on) t on t r t d(off) t off t f
90% 90%
10%
V
GS
V
DS
90%
10%
0 10%
AM01473v1
DS11614 - Rev 2 page 7/13
4
STF3N65M6
Package information
Package information
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com
. ECOPACK is an ST trademark.
DS11614 - Rev 2 page 8/13
4.1
TO-220FP package information
Figure 19. TO-220FP package outline
STF3N65M6
TO-220FP package information
DS11614 - Rev 2
7012510_Rev_12_B page 9/13
DS11614 - Rev 2
Dim.
F2
G
G1
H
L2
L3
L4
L5
L6
L7
Dia
D
E
A
B
F
F1
Table 8. TO-220FP package mechanical data mm
Typ.
Min.
4.4
2.5
2.5
0.45
0.75
1.15
1.15
4.95
2.4
10
16
28.6
9.8
2.9
15.9
9
3
STF3N65M6
TO-220FP package information
Max.
4.6
2.7
2.75
0.7
1
1.70
1.70
5.2
2.7
10.4
30.6
10.6
3.6
16.4
9.3
3.2
page 10/13
STF3N65M6
Revision history
Date
02-May-2016
12-Apr-2019
Revision
1
2
Table 9. Document revision history
Changes
First release.
Updated dv/dt MOSFET dv/dt ruggedness values in
Table 1. Absolute maximum ratings
.
Minor text changes.
DS11614 - Rev 2 page 11/13
STF3N65M6
Contents
Contents
1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2
2 Electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3
2.1
Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
4 Package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
4.1
TO-220FP package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
DS11614 - Rev 2 page 12/13
STF3N65M6
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DS11614 - Rev 2 page 13/13
