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STB20N95DK5 N-channel 950 V, 0.275 Ω typ., 18 A, MDmesh™ DK5 Power MOSFET in a D²PAK package Datasheet - preliminary data Features TAB 2 3 Prerelease product(s) 1 D²PAK Figure 1: Internal schematic diagram Order code VDS RDS(on) max. ID STB20N95DK5 950 V 0.330 Ω 18 A Fast-recovery body diode Best RDS(on) x area Low gate charge, input capacitance and resistance 100% avalanche tested Extremely high dv/dt ruggedness Applications Switching applications Description D(2, TAB) This very high voltage N-channel Power MOSFET is part of the MDmesh™ DK5 fast recovery diode series. The MDmesh™ DK5 combines very low recovery charge (Qrr) and recovery time (trr) with an excellent improvement in RDS(on) * area and one of the most effective switching behaviors, ideal for half bridge and full bridge converters. G(1) S(3) AM01475v1_noZen Table 1: Device summary Order code Marking Package Packing STB20N95DK5 20N95DK5 D²PAK Tape and reel December 2017 DocID031343 Rev 1 This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice. 1/16 www.st.com Contents STB20N95DK5 Contents 1 Electrical ratings ............................................................................. 3 2 Electrical characteristics ................................................................ 4 2.1 Electrical characteristics (curves) ...................................................... 6 3 Test circuits ..................................................................................... 9 4 Package information ..................................................................... 10 D²PAK (TO-263) type A2 package information ............................... 10 4.2 D²PAK (TO-263) packing information .............................................. 13 Revision history ............................................................................ 15 Prerelease product(s) 5 4.1 2/16 DocID031343 Rev 1 STB20N95DK5 1 Electrical ratings Electrical ratings Table 2: Absolute maximum ratings Symbol VGS Parameter Value Unit Gate-source voltage ±30 V ID Drain current (continuous) at TC = 25 °C 18 V ID Drain current (continuous) at TC = 100 °C 11 A IDM(1) Drain current (pulsed) 72 A PTOT Total dissipation at TC = 25 °C 250 W dv/dt(2) Peak diode recovery voltage slope 50 V/ns dv/dt(3) MOSFET dv/dt ruggedness 50 V/ns Tstg Storage temperature range -55 to 150 °C Value Unit Thermal resistance junction-case 0.5 °C/W Thermal resistance junction-pcb 30 °C/W Value Unit 6 A 520 mJ Tj Operating junction temperature range Notes: Prerelease product(s) (1)Pulse (2)I SD (3)V width limited by safe operating area ≤ 8.5 A, di/dt ≤ 400 A/μs, VDS peak ≤ V(BR)DSS, VDD = 475 V DS ≤ 760 V Table 3: Avalanche characteristics Symbol Rthj-case Rthj-pcb (1) Parameter Notes: (1)When mounted on 1 inch² FR-4 board, 2 Oz Cu. Table 4: Thermal data Symbol Parameter IAR Maximum current during repetitive or single pulse avalanche EAS Single pulse avalanche energy (starting TJ = 25 °C, ID = IAR ,VDD = 50 V) DocID031343 Rev 1 3/16 Electrical characteristics 2 STB20N95DK5 Electrical characteristics (TCASE = 25 °C unless otherwise specified) Table 5: On/off states Symbol V(BR)DSS Parameter Test conditions Drain-source breakdown voltage ID = 1 mA, VGS= 0 V Min. Typ. Max. 950 Unit V VGS = 0 V, VDS = 950 V 1 µA VGS = 0 V, VDS = 950 V, TC= 125 °C (1) 100 µA Gate source leakage current VDS = 0 V, VGS = ±20 V ±10 µA VGS(th) Gate threshold voltage VDD = VGS, ID = 100 µA 4 5 V RDS(on) Static drain-source on-resistance VGS = 10 V, ID = 9 A 0.275 0.330 Ω Min. Typ. Max. Unit - 1600 - pF - 76 - pF - 5 - pF - 169 - pF - 60 - pF IDSS IGSS Zero gate voltage drain current 3 Prerelease product(s) Notes: (1)Defined by design, not subject to production test Table 6: Dynamic Symbol Parameter Ciss Input capacitance Coss Output capacitance Crss Reverse transfer capacitance Co(tr)(1) Co(er)(2) Test conditions VDS = 100 V, f = 1 MHz, VGS= 0 V Time- related equivalent capacitance Energy-related equivalent capacitance VGS = 0 V, VDS= 0 to 760 V Rg Intrinsic gate resistance f =1 MHz, ID= 0 A - 4 - Ω Qg Total gate charge - 50.7 - nC Qgs Gate source charge - 7.8 - nC Qgd Gate drain charge VDD = 760 V, ID = 18 A, VGS = 0 to 10 V (see Figure 16: "Test circuit for gate charge behavior") - 34.2 - nC Notes: (1)C o(tr) is defined as the constant equivalent capacitance giving the same charging time as Coss when V DS increases from 0 to 80% VDSS. (2)C o(er) is defined as the constant equivalent capacitance giving the same stored energy as Coss when V DS increases from 0 to 80% VDSS. 4/16 DocID031343 Rev 1 STB20N95DK5 Electrical characteristics Table 7: Switching times Symbol td(on) Parameter tr Turn-on delay time Rise time td(off) Turn-off delay time Fall time tf Test conditions Min. Typ. Max. Unit VDS = 475 V, ID= 9 A, RG = 4.7 Ω, VGS = 10 V (see Figure 15: "Test circuit for resistive load switching times" and Figure 20: "Switching time waveform") - 23 - ns - 23 - ns - 74 - ns - 25.4 - ns Min. Typ. Max. Unit Table 8: Source-drain diode Prerelease product(s) Symbol Parameter Test conditions ISD Source-drain current - 18 A ISDM(1) Source-drain current (pulsed) - 72 A VSD(2) Forward on voltage ISD = 18 A, VGS = 0 V - 1.5 V trr Reverse recovery time - 150 ns Qrr Reverse recovery charge - 1 µC IRRM Reverse recovery current ISD = 9 A, di/dt = 100 A/µs, VDD = 60 V (see Figure 17: "Test circuit for inductive load switching and diode recovery times") - 13.5 A ISD = 9 A, di/dt = 100 A/µs, VDD = 60 V, Tj = 150 °C (see Figure 17: "Test circuit for inductive load switching and diode recovery times") - 264 ns - 2.9 µC - 22 A trr Reverse recovery time Qrr Reverse recovery charge IRRM Reverse recovery current Notes: (1)Pulse width limited by safe operating area (2)Pulsed: pulse duration = 300 µs, duty cycle 1.5%. DocID031343 Rev 1 5/16 Electrical characteristics Prerelease product(s) 2.1 STB20N95DK5 Electrical characteristics (curves) Figure 2: Safe operating area Figure 3: Thermal impedance Figure 4: Output characteristics Figure 5: Transfer characteristics Figure 6: Gate charge vs gate-source voltage Figure 7: Static drain-source on-resistance 6/16 DocID031343 Rev 1 Prerelease product(s) STB20N95DK5 Electrical characteristics Figure 8: Capacitance variations Figure 9: Output capacitance stored energy Figure 10: Normalized gate threshold voltage vs temperature Figure 11: Normalized on-resistance vs temperature Figure 12: Normalized V(BR)DSS vs temperature Figure 13: Source-drain diode forward characteristics DocID031343 Rev 1 7/16 Electrical characteristics STB20N95DK5 Prerelease product(s) Figure 14: Maximum avalanche energy vs starting TJ 8/16 DocID031343 Rev 1 STB20N95DK5 Prerelease product(s) 3 Test circuits Test circuits Figure 15: Test circuit for resistive load switching times Figure 16: Test circuit for gate charge behavior Figure 17: Test circuit for inductive load switching and diode recovery times Figure 18: Unclamped inductive load test circuit Figure 19: Unclamped inductive waveform Figure 20: Switching time waveform DocID031343 Rev 1 9/16 Package information 4 STB20N95DK5 Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK ® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. 4.1 D²PAK (TO-263) type A2 package information Prerelease product(s) Figure 21: D²PAK (TO-263) type A2 package outline 10/16 DocID031343 Rev 1 STB20N95DK5 Package information Table 9: D²PAK (TO-263) type A2 package mechanical data mm Dim. Min. Max. A 4.40 4.60 A1 0.03 0.23 b 0.70 0.93 b2 1.14 1.70 c 0.45 0.60 c2 1.23 1.36 D 8.95 9.35 D1 7.50 7.75 8.00 D2 1.10 1.30 1.50 E 10.00 E1 8.70 8.90 9.10 E2 7.30 7.50 7.70 e Prerelease product(s) Typ. 10.40 2.54 e1 4.88 5.28 H 15.00 15.85 J1 2.49 2.69 L 2.29 2.79 L1 1.27 1.40 L2 1.30 1.75 R V2 0.40 0° DocID031343 Rev 1 8° 11/16 Package information STB20N95DK5 Prerelease product(s) Figure 22: D²PAK (TO-263) recommended footprint (dimensions are in mm) 12/16 DocID031343 Rev 1 STB20N95DK5 4.2 Package information D²PAK (TO-263) packing information Prerelease product(s) Figure 23: D²PAK tape outline DocID031343 Rev 1 13/16 Package information STB20N95DK5 Prerelease product(s) Figure 24: D²PAK reel outline Table 10: D²PAK tape and reel mechanical data Tape Reel mm mm Dim. 14/16 Dim. Min. Max. A0 10.5 10.7 A B0 15.7 15.9 B 1.5 D 1.5 1.6 C 12.8 D1 1.59 1.61 D 20.2 E 1.65 1.85 G 24.4 F 11.4 11.6 N 100 K0 4.8 5.0 T P0 3.9 4.1 P1 11.9 12.1 Base quantity 1000 P2 1.9 2.1 Bulk quantity 1000 R 50 T 0.25 0.35 W 23.7 24.3 DocID031343 Rev 1 Min. Max. 330 13.2 26.4 30.4 STB20N95DK5 5 Revision history Revision history Table 11: Document revision history Revision 01-Dec-2017 1 Changes Initial release Prerelease product(s) Date DocID031343 Rev 1 15/16 STB20N95DK5 IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. Prerelease product(s) ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2017 STMicroelectronics – All rights reserved 16/16 DocID031343 Rev 1 ">
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