STF7N80K5,
STFI7N80K5
Nchannel 800 V, 0.95 Ω typ., 6 A MDmesh™ K5
Power MOSFETs in TO-220FP and I²PAKFP packages
Datasheet - production data
TO-220FP I
2
PAKFP (TO-281)
Features
Order code V
DS
R
DS(on)
max. I
D
P
TOT
STF7N80K5
800 V
1.2 Ω
6 A 25 W
STFI7N80K5
Industry’s lowest R
DS(on)
x area
Industry’s best FoM (figure of merit)
Ultra-low gate charge
100% avalanche tested
Zener-protected
Figure 1: Internal schematic diagram
D(2)
G(1)
Order code
STF7N80K5
STFI7N80K5
S(3)
Applications
Switching applications
Description
These very high voltage N-channel Power
MO SFETs are designed using MDmesh™ K5 technology based on an innovative proprietary vertical structure. The result is a dramatic reduction in on-resistance and ultra-low gate charge for applications requiring superior power density and high efficiency.
AM01476v1_No_tab
Table 1: Device summary
Marking Package Packing
7N80K5
TO-220FP
I²PAKFP (TO-281)
Tube
July 2017 DocID025377 Rev 2
This is information on a product in full production.
1/16 www.st.com
Contents
Contents
STF7N80K5, STFI7N80K5
1 Electrical ratings ............................................................................. 3
2 Electrical characteristics ................................................................ 4
2.1
Electrical characteristics (curves) ...................................................... 6
3 Test circuits ..................................................................................... 9
4 Package information ..................................................................... 10
4.1
4.2
TO-220FP package information ...................................................... 11
I²PAKFP (TO-281) package information ......................................... 13
5 Revision history ............................................................................ 15
2/16 DocID025377 Rev 2
STF7N80K5, STFI7N80K5
1 Electrical ratings
Symbol
Table 2: Absolute maximum ratings
Parameter
V
GS
Gate-source voltage
I
D
(1)
Drain current (continuous) at T
C
= 25 °C
I
D
(1)
Drain current (continuous) at T
C
= 100 °C
I
DM
(2)
Drain current (pulsed)
P
TOT
Total dissipation at T
C
= 25 °C
dv/dt (3)
Peak diode recovery voltage slope
dv/dt (4)
MOSFET dv/dt ruggedness
V
T
ISO
T j stg
Insulation withstand voltage (RMS) from all three leads to external heat sink (t=1 s; T
C
= 25 °C)
Operating junction temperature range
Storage temperature range
Notes:
(1)
Limited by package.
(2)
Pulse width limited by safe operating area
(3)
I
SD
≤6 A, di/dt ≤100 A/μs, V
DS(peak)
≤V
(BR)DSS
(4)
V
DS
≤ 640 V
Symbol
Table 3: Thermal data
Parameter
R thj-case
Thermal resistance junction-case
R thj-amb
Thermal resistance junction-ambient
Symbol
Table 4: Avalanche characteristics
Parameter
I
AR
E
AS
Avalanche current, repetitive or not repetitive
(pulse width limited by T jmax
)
Single pulse avalanche energy
(starting T j
= 25 °C, I
D
= I
AR
, V
DD
= 50 V)
Electrical ratings
Value
±30
6
3.8
24
25
4.5
50
2500
- 55 to 150
Value
5
62.5
Value
2
88
Unit
V
A
A
A
W
V/ns
V
°C
Unit
°C/W
°C/W
Unit
A mJ
DocID025377 Rev 2 3/16
Electrical characteristics
2 Electrical characteristics
T
C
= 25 °C unless otherwise specified
Symbol Parameter
Table 5: On/off-state
Test conditions
V
(BR)DSS
I
DSS
Drain-source breakdown voltage
V
GS
= 0 V, I
D
= 1 mA
V
GS
= 0 V, V
DS
= 800 V
Zero gate voltage drain current
V
GS
= 0 V, V
DS
= 800 V
T
C
= 125 °C (1)
Gate body leakage current V
DS
= 0 V, V
GS
= ±20 V I
GSS
V
GS(th)
Gate threshold voltage
R
DS(on)
Static drain-source on-resistance
V
V
DD
GS
= V
GS
, I
D
= 10 V, I
D
= 100 µA
= 3 A
Notes:
(1)
Defined by design, not subject to production test.
Symbol Parameter
Table 6: Dynamic
Test conditions
C iss
C oss
C rss
C
o(tr)
(1)
C
o(er)
(2)
R g
Q g
Q gs
Q gd
Input capacitance
Output capacitance
Reverse transfer capacitance
Equivalent capacitance time related
Equivalent capacitance energy related
Intrinsic gate resistance
Total gate charge
Gate-source charge
Gate-drain charge
V
DS
= 100 V, f = 1 MHz,
V
GS
= 0 V
V
DS
= 0 to 640 V, V
GS
= 0 V f = 1 MHz, I
D
=0 A
V
DD
= 640 V, I
D
= 6 A
V
GS
= 0 to 10 V
(see Figure 16: "Test circuit for gate charge behavior" )
STF7N80K5, STFI7N80K5
Min. Typ. Max. Unit
800 V
1 µA
50 µA
4
0.95
±10 µA
5 V
1.2 Ω
3
Min. Typ. Max. Unit
-
-
360
30
-
- pF pF
- 1 - pF
-
-
-
-
-
-
47
20
6
13.4
3.7
7.5
-
-
-
-
-
-
Notes:
(1)
C o(tr)
is a constant capacitance value that gives the same charging time as C oss
while V
DS
is rising from 0 to
80% V
DSS
.
(2)
C o(er)
is a constant capacitance value that gives the same stored energy as C oss
while V
DS
is rising from 0 to
80% V
DSS
.
pf pf
Ω nC nC nC
4/16 DocID025377 Rev 2
STF7N80K5, STFI7N80K5
Symbol Parameter t d(on)
Turn-on delay time t r
Rise time t d(off)
Turn-off delay time t f
Fall time
Table 7: Switching times
Test conditions
V
DD
= 400 V, I
D
= 3 A,
R
G
= 4.7 Ω
V
GS
= 10 V
(see Figure 15: "Test circuit for resistive load switching times" and Figure 20:
"Switching time waveform" )
Symbol Parameter
I
SD
Source-drain current
I
SDM
(1)
Source-drain current
(pulsed)
V
SD
(2)
Forward on voltage t rr
Q rr
Reverse recovery time
Reverrse recovery charge
I
RRM
Table 8: Source-drain diode
Test conditions
Reverse recovery current
I
SD
= 6 A, V
GS
= 0 V
I
SD
= 6 A, di/dt = 100
A/µs,V
DD
= 60 V
(see Figure 17: "Test circuit for inductive load switching and diode recovery times" )
Electrical characteristics
Min. Typ. Max. Unit
-
-
-
11.3
8.3
23.7
-
-
- ns ns ns
- 20.2 - ns
Min. Typ. Max. Unit
- 6 A
- 24 A
-
-
-
-
315
2.8
17.5
1.5 V ns
µC
A t rr
Q rr
I
RRM
Reverse recovery time
Reverse recovery charge
Reverse recovery current
I
SD
= 6 A, di/dt = 100 A/µs,
V
DD
= 60 V, T j
= 150 °C
(see Figure 17: "Test circuit for inductive load switching and diode recovery times" )
-
-
-
480
3.8
16 ns
µC
A
Notes:
(1)
Pulse width limited by safe operating area
(2)
Pulsed: pulse duration = 300 µs, duty cycle 1.5%
Symbol Parameter
Table 9: Gate-source Zener diode
Test conditions Min. Typ. Max. Unit
V
(BR)GSO
Gate-source breakdown voltage
I
GS
= ±1 mA, I
D
= 0 A ±30 - - V
The built-in back-to-back Zener diodes are specifically designed to enhance the ESD performance of the device. The Zener voltage facilitates efficient and cost-effective device integrity protection, thus eliminating the need for additional external componentry.
DocID025377 Rev 2 5/16
Electrical characteristics
2.1 Electrical characteristics (curves)
Figure 2: Safe operating area
STF7N80K5, STFI7N80K5
Figure 3: Thermal impedance
Figure 4: Output characteristics Figure 5: Transfer characteristics
Figure 6: Gate charge vs gate-source voltage Figure 7: Static drain-source on-resistance
6/16 DocID025377 Rev 2
STF7N80K5, STFI7N80K5
Figure 8: Capacitance variations
Electrical characteristics
Figure 9: Output capacitance stored energy
Figure 10: Normalized gate threshold voltage vs temperature
Figure 11: Normalized on-resistance vs temperature
Figure 12: Normalized V
(BR)DSS
vs temperature Figure 13: Maximum avalanche energy vs starting T
J
DocID025377 Rev 2 7/16
Electrical characteristics STF7N80K5, STFI7N80K5
Figure 14: Source-drain diode forward characteristics
8/16 DocID025377 Rev 2
STF7N80K5, STFI7N80K5
3 Test circuits
Figure 15: Test circuit for resistive load switching times
Test circuits
Figure 16: Test circuit for gate charge behavior
Figure 17: Test circuit for inductive load switching and diode recovery times
Figure 18: Unclamped inductive load test circuit
Figure 19: Unclamped inductive waveform Figure 20: Switching time waveform
DocID025377 Rev 2 9/16
Package information
4 Package information
STF7N80K5, STFI7N80K5
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK ® packages, depending on their level of environmental compliance. ECOPACK ® specifications, grade definitions and product status are available at: www.st.com
.
ECOPACK ® is an ST trademark.
10/16 DocID025377 Rev 2
STF7N80K5, STFI7N80K5
4.1 TO-220FP package information
Figure 21: TO-220FP package outline
Package information
DocID025377 Rev 2
7012510_Rev_12_B
11/16
Package information
Dim.
G1
H
L2
L3
L4
L5
L6
L7
Dia
F
F1
F2
G
A
B
D
E
STF7N80K5, STFI7N80K5
Table 10: TO-220FP package mechanical data mm
Min. Typ. Max.
4.4
2.5
2.5
0.45
0.75
1.15
1.15
4.95
2.4
10
16
4.6
2.7
2.75
0.7
1
1.70
1.70
5.2
2.7
10.4
28.6
9.8
2.9
15.9
9
3
30.6
10.6
3.6
16.4
9.3
3.2
12/16 DocID025377 Rev 2
STF7N80K5, STFI7N80K5
4.2 I²PAKFP (TO-281) package information
Figure 22: I²PAKFP (TO-281) package outline
Package information
8291506 Re v. C
DocID025377 Rev 2 13/16
Package information
Dim.
H
L1
L2
L3
L4
L5
L6
E
F
F1
G
A
B
D
D1
STF7N80K5, STFI7N80K5
Table 11: I²PAKFP (TO-281) mechanical data mm
Min. Typ. Max.
4.95
10.00
21.00
13.20
10.55
2.70
0.85
7.50
4.40
2.50
2.50
0.65
0.45
0.75
7.60
10.40
23.00
14.10
10.85
3.20
1.25
7.70
4.60
2.70
2.75
0.85
0.70
1.00
1.20
5.20
14/16 DocID025377 Rev 2
STF7N80K5, STFI7N80K5
5
Revision history
Revision history
Date Revision
Table 12: Document revision history
Changes
11-Oct-2013
05-Jul-2017
1
2
First release. Part numbers previously included in datasheet
DocID023448
Modified features on cover page.
Modified Table 2: "Absolute maximum ratings" ,
Table 7: "Switching times" and Table 9: "Gate-source Zener diode" .
Minor text changes.
DocID025377 Rev 2 15/16
STF7N80K5, STFI7N80K5
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16/16 DocID025377 Rev 2
