STP12NK30Z
N-CHANNEL 300V - 0.36
Ω
- 9A - TO-220
Zener-Protected SuperMESH™Power MOSFET
TYPE V
DSS
R
DS(on)
I
D
(1) Pw (1)
■
■
STP12NK30Z 300 V < 0.4
Ω
9 A
TYPICAL R
DS
(on) = 0.36
Ω
EXTREMELY HIGH dv/dt CAPABILITY
■
■
■
■
■
IMPROVED ESD CAPABILITY
100% AVALANCHE RATED
GATE CHARGE MINIMIZED
VERY LOW INTRINSIC CAPACITANCES
VERY GOOD MANUFACTURING
REPEATIBILITY
90 W
TO-220
1
2
3
DESCRIPTION
The SuperMESH™ series is obtained through an extreme optimization of ST’s well established stripbased PowerMESH™ layout. In addition to pushing on-resistance significantly down, special care is taken to ensure a very good dv/dt capability for the most demanding applications. Such series complements ST full range of high voltage MOSFETs including revolutionary MDmesh™ products.
APPLICATIONS
■
LIGHTING
■
IDEAL FOR OFF-LINE POWER SUPPLIES,
■
ADAPTORS AND PFC
HIGH CURRENT, HIGH SPEED SWITCHING
INTERNAL SCHEMATIC DIAGRAM
ORDERING INFORMATION
SALES TYPE
STP12NK30Z
MARKING
P12NK30Z
PACKAGE
TO-220
PACKAGING
TUBE
December 2002 1/8
STP12NK30Z
ABSOLUTE MAXIMUM RATINGS
Symbol
V
DS
V
DGR
V
GS
I
D
Parameter
Drain-source Voltage (V
GS
= 0)
Drain-gate Voltage (R
GS
= 20 k
Ω
)
Gate- source Voltage
I
DM
(1)
P
TOT
Drain Current (continuous) at T
C
Drain Current (continuous) at T
C
= 25°C
= 100°C
Drain Current (pulsed)
V
ESD(G-S) dv/dt (2)
Total Dissipation at T
C
= 25°C
Derating Factor
Gate source ESD(HBM-C=100pF, R=1.5K
Ω)
Peak Diode Recovery voltage slope
T stg
T j
Storage Temperature
Max. Operating Junction Temperature
THERMAL DATA
Rthj-case Thermal Resistance Junction-case
Rthj-amb
T l
Thermal Resistance Junction-ambient
Max
Max
Maximum Lead Temperature For Soldering Purpose
Note: 1. Pulse width limited by safe operating area
2. I
SD
< 9A, di/dt<300A/µs, V
DD
<V
(BR)DSS
, T
J
<T
JMAX
AVALANCHE CHARACTERISTICS
Symbol
I
AR
E
AS
Parameter
Avalanche Current, Repetitive or Not-Repetitive
(pulse width limited by T j max)
Single Pulse Avalanche Energy
(starting T j
= 25 °C, I
D
= I
AR
, V
DD
= 50 V)
GATE-SOURCE ZENER DIODE
Symbol Parameter
BV
GSO
Gate-Source Breakdown
Voltage
Test Conditions
Igs=± 1mA (Open Drain)
Value
300
300
± 30
9
5.6
36
90
0.72
3000
4.5
–55 to 150
1.38
62.5
300
Max Value
9
155
A
W
W/°C
V/ns
V/ns
Unit
V
V
V
A
A
°C
°C/W
°C/W
°C
Unit
A mJ
Min.
30
Typ.
Max.
Unit
V
PROTECTION FEATURES OF GATE-TO-SOURCE ZENER DIODES
The built-in back-to-back Zener diodes have specifically been designed to enhance not only the device’s
ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be applied from gate to source. In this respect the Zener voltage is appropriate to achieve an efficient and cost-effective intervention to protect the device’s integrity. These integrated Zener diodes thus avoid the usage of external components.
2/8
STP12NK30Z
ELECTRICAL CHARACTERISTICS (TCASE =25°C UNLESS OTHERWISE SPECIFIED)
ON/OFF
Symbol
V
(BR)DSS
Parameter
Drain-source
Breakdown Voltage
Test Conditions
I
D
= 1 mA, V
GS
= 0
Min.
300
Typ.
Max.
I
DSS
I
GSS
Zero Gate Voltage
Drain Current (V
GS
= 0)
V
DS
= Max Rating
V
DS
= Max Rating, T
C
= 125 °C
V
GS
= ± 20V
1
50
±10
V
GS(th)
R
DS(on)
Gate-body Leakage
Current (V
DS
= 0)
Gate Threshold Voltage
Static Drain-source On
Resistance
V
DS
= V
GS
, I
D
= 50µA
V
GS
= 10V, I
D
= 4.5 A
3 3.75
0.36
4.5
0.4
DYNAMIC
Symbol g fs
(1)
C
C
C iss oss rss
Parameter
Forward Transconductance
Input Capacitance
Output Capacitance
Reverse Transfer
Capacitance
C oss eq.
(3) Equivalent Output
Capacitance
R
G
Gate Input Resistance
Test Conditions
V
DS
= 10 V
,
I
D
= 4.5 A
V
DS
= 25V, f = 1 MHz, V
GS
= 0
V
GS
= 0V, V
DS
= 0V to 440 V f=1 MHz Gate DC Bias = 0
Test Signal Level = 20mV
Open Drain
Min.
Typ.
5.4
670
125
28
70
3.6
Max.
SWITCHING
Symbol t d(on) t r t d(off) t f
Q g
Q gs
Q gd
Parameter
Turn-on Delay Time
Rise time
Turn-off Delay Time
Fall Time
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Test Conditions
V
DD
= 150 V, I
D
= 4.5 A
R
G
= 4.7
Ω
V
GS
= 10 V
(Resistive Load see, Figure 3)
V
DD
= 240V, I
D
= 9 A,
V
GS
= 10V
Min.
Typ.
16
20
36
10
25
5.5
13.4
Max.
35
Unit ns ns ns ns nC nC nC
Unit
S pF pF pF pF
Ω
Unit
V
µA
µA
µA
V
Ω
SOURCE DRAIN DIODE
Symbol
I
I
SD
SDM
(2)
V
SD
(1) t rr
Q rr
I
RRM
Parameter
Source-drain Current
Source-drain Current (pulsed)
Forward On Voltage
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
I
SD
I
SD
V
DD
Test Conditions
= 9 A, V
GS
= 40V, T j
= 0
= 9 A, di/dt = 100A/µs
= 150°C
(see test circuit, Figure 5)
Min.
Typ.
165
0.9
11.2
Max.
9
36
1.6
Unit
A
A
V ns
µC
A
Note: 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %.
2. Pulse width limited by safe operating area.
3. C oss eq.
V
DSS
.
is defined as a constant equivalent capacitance giving the same charging time as C oss when V
DS increases from 0 to 80%
3/8
STP12NK30Z
Safe Operating Area For TO-220 Thermal Impedance For TO-220
Output Characteristics Transfer Characteristics
Transconductance Static Drain-source On Resistance
4/8
Gate Charge vs Gate-source Voltage Capacitance Variations
STP12NK30Z
Normalized Gate Thereshold Voltage vs Temp.
Normalized On Resistance vs Temperature
Source-drain Diode Forward Characteristics Normalized BVDSS vs Temperature
5/8
STP12NK30Z
Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform
Fig. 3: Switching Times Test Circuit For
Resistive Load
Fig. 4: Gate Charge test Circuit
Fig. 5: Test Circuit For Inductive Load Switching
And Diode Recovery Times
6/8
STP12NK30Z
DIM.
L4
L5
L6
L7
F2
G
G1
H2
L2
L9
DIA.
D1
E
F
F1
A
C
D
TO-220 MECHANICAL DATA
MIN.
4.40
1.23
2.40
mm
TYP.
MAX.
4.60
1.32
2.72
MIN.
0.173
0.048
0.094
inch
TYP.
MAX.
0.181
0.051
0.107
1.27
0.49
0.050
0.70
0.019
0.027
0.61
1.14
0.88
1.70
0.024
0.044
0.034
0.067
1.14
4.95
2.4
10.0
1.70
5.15
2.7
10.40
16.4
0.044
0.194
0.094
0.393
0.067
0.203
0.106
0.409
0.645
13.0
2.65
15.25
6.2
3.5
3.75
14.0
2.95
15.75
6.6
3.93
3.85
0.511
0.104
0.600
0.244
0.137
0.147
0.551
0.116
0.620
0.260
0.154
0.151
L2
Dia.
L5
L7
L6
L9
L4
P011C
7/8
STP12NK30Z
8/8
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
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