Electrical characteristics STM32L162VC, STM32L162RC
Figure 17. Recommended NRST pin protection
External reset circuit(1)
NRST
(2)
V
DD
RPU
0.1 μF
Filter
Internal reset
STM32L1xx ai17854b
1. The reset network protects the device against parasitic resets. 0.1 uF capacitor must be placed as close as possible to the chip.
2. The user must ensure that the level on the NRST pin can go below the V
Table 46 . Otherwise the reset is not taken into account by the device.
IL(NRST)
max level specified in
6.3.15 TIM timer characteristics
The parameters given in the
Table 47 are guaranteed by design.
Refer to Section 6.3.13: I/O port characteristics for details on the input/output ction
characteristics (output compare, input capture, external clock, PWM output).
Symbol
Table 47. TIMx (1) characteristics
Parameter Conditions Min t res(TIM) f
EXT
Timer resolution time
Timer external clock frequency on CH1 to CH4 f
f
TIMxCLK
= 32 MHz 31.25
0
TIMxCLK
-
= 32 MHz
-
1
0
t
Res
TIM
COUNTER
Timer resolution
16-bit counter clock period when internal clock is selected (timer’s prescaler disabled)
1
f
TIMxCLK
= 32 MHz 0.0312
t
MAX_COUNT
-
Maximum possible count
f
TIMxCLK
= 32 MHz -
1. TIMx is used as a general term to refer to the TIM2, TIM3 and TIM4 timers.
Max
-
f
TIMxCLK
/2
16
16
65536
2048 µs
65536 × 65536 t
TIMxCLK
134.2
s
Unit t
TIMxCLK ns
MHz
MHz bit t
TIMxCLK
84/123
DS8928 Rev 12
