L6391
7
Smart shutdown function
Smart shutdown function
The L6391 device integrates a comparator committed to the fault sensing function. Both comparator's inputs are available on pins 8 and 9. For example, applying a voltage reference to CP- and connecting the CP+ to an external shunt resistor, a simple overcurrent detection function can be implemented.
The output signal of the comparator is fed to an integrated MOSFET with the open-drain output available on the pin 2, shared with the SD input. When the comparator triggers, the device is set in shutdown state and both its outputs are set to low level leaving the halfbridge in tristate.
Figure 6. Smart shutdown timing waveforms
CP-
CP+
HIN/LIN
HVG/LVG
SD/OD
PROTECTION open-drain gate
(internal) disable time
Fast shutdown : the driver outputs are set in SD state immediately after the comparator triggering even if the SD signal has not yet reached the lower input threshold
An approximation of the disable time is given by:
V
BIAS
SHUTDOWN CIRCUIT
FROM/TO
CONTROLLER
R
SD
SD/OD
C
SD
R
ON_OD
R
PD_SD
SMART
SD
LOGIC where:
AM16755v1
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Smart shutdown function L6391
In common overcurrent protection architectures, the comparator output is usually connected to the SD input and an RC network is connected to this SD/OD line in order to provide a monostable circuit, which implements a protection time following the fault condition.
Differently from the common fault detection systems, the L6391 smart shutdown architecture allows immediate turn-off of the output gate driver in case of fault, by minimizing the propagation delay between the fault detection event and the current output switch-off. In fact the time delay between the fault and the output turn-off is no longer dependent on the
RC value of the external network connected to the SD/OD pin. In the smart shutdown circuitry, the fault signal has a preferential path which directly switches off the outputs after the comparator triggering. At the same time, the internal logic turns on the open-drain output and holds it on until the SD voltage goes below the SD logic input lower threshold. When such threshold is reached, the open-drain output is turned off, allowing the external pull-up to recharge the capacitor. The driver outputs restart following the input pins as soon as the voltage at the SD/OD pin reaches the higher threshold of the SD logic input. The smart shutdown system gives the possibility to increase the time constant of the external RC network (that determines the disable time after the fault event) up to very large values without increasing the delay time of the protection.
Any external signal provided to the SD pin is not latched and can be used as control signal in order to perform, for instance, PWM chopping through this pin. In fact when a PWM signal is applied to the SD input and the logic inputs of the gate driver are stable, the outputs switch from the low level to the state defined by the logic inputs and vice versa.
In some applications, it may be useful to latch the driver in the shutdown condition for an arbitrary time, until the controller decides to reset it to normal operation. This may, for
example, be achieved by a circuit as the one shown in Figure 7
. When the open-drain starts pulling down the SD/OD pin, the external latch turns on and keeps the pin to GND, preventing it from being pulled up again once the SD logic input lower threshold is reached and the internal open-drain turns off. One pin of the controller is used to release the external latch, and one to externally force a shutdown condition and also to read the status of the
SD/OD pin.
Figure 7. Protection latching circuit
HV BUS
VDD
μC
SD_force
VCC
+
VCC
-
+
R1
9*R
R2
R
R3
2*R
C1
HIN
LIN
VCC
L6391
VBOOT
HVG
GND OUT
DT
SD/OD
OPOUT
LVG
CP+
CP-
V
BIAS
C2
SD/OD
C3
SD/OD
VDD
GND
SD_sense
C1: disable time setting capacitor
C2, C3: small noise filtering capacitors AM16756v1
In applications using only one L6391 for the protection of different legs (such as a single-
shunt inverter, for example), the resistor divider, shown in Figure 8
, can be implemented.
This simple network allows the SD pins of the other devices to reach a voltage lower than
L6391 V il
, so that each device can get its low logic level regardless of part to part variations of the thresholds.
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L6391
7
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Smart shutdown function
Figure 8. SD level shifting circuit
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