Chapter 4 TNT4882 Programming Considerations
D. Enable Interrupts
Clear or set the desired Interrupt Enable bits in Interrupt Mask Register 0 (IMR0),
Interrupt Mask Register 1 (IMR1), Interrupt Mask Register 2 (IMR2), and Interrupt Mask
Register 3 (IMR3).
If you are using the ISA pin configuration, you must set or clear the INTEN bit in the
INTR register in order to enable or disable ISA interrupts. See the Hardware Interrupts section, which is located later in this chapter.
E. Set the GPIB Handshake Parameters
Set Deglitching bit A (DGA) and Deglitching bit B (DGB) in the High-Speed Enable
Register (HIER) in order to select the deglitching circuit for the TNT4882.
6. Clear the Local Power-On Message to Begin GPIB Operation
Write the pon auxiliary command (0 hex) to the AUXMR.
GPIB Talker or Listener Considerations
GPIB Addressing
Logical and Physical Devices
The TNT4882 is one physical GPIB device. The internal IEEE 488.1 transceiver places a single physical device load on the GPIB. The IEEE 488.1 standard specifies that a GPIB system contain no more than 15 physical devices.
A single physical GPIB device can implement more than one logical GPIB device. Each logical device must have a unique GPIB address. The TNT4882 can implement any number of logical GPIB devices.
Normal and Extended Addressing
Logical GPIB devices use either normal or extended addressing. With normal addressing, a GPIB device has a single address; valid addresses are 0 through 30
(decimal), inclusive. To address a device to become a Talker or Listener, a Controller sends the talk or listen address of the device. If a device's address is 6, for example, a
Controller sends the My Talk Address 6 (MTA6) message to address that device to become a Talker.
© National Instruments Corp.
4-3 TNT4882 Programmer Reference
