Chapter 6
Hardware Considerations: ISA Pin
Configuration
The information in this chapter supplements the information contained in the TNT4882
Single-Chip IEEE 488.2 Talker/Listener ASIC data sheet.
CPU Interface Pins
NDACN
NRFDN
GND
DAVN
EOIN
GND
VDD
DIO4N
DIO3N
GND
DIO2N
DIO1N
GND
VDD
XTAL0
XTAL1
GND
KEYCLKN
KEYDQ
KEYRSTN
80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51
89
90
91
85
86
87
88
81
82
83
84
92
93
94
95
TNT4882
ISA Pin Configuration
96
97
98
99
100
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17
32
31
18 19 20 21 22 23 24 25 26 27 28 29 30
35
34
33
46
45
44
43
42
41
40
39
38
37
36
50 DATA7
49 DATA6
48 GND
47 DATA5
DATA4
GND
DATA3
DATA2
DATA1
GND
VDD
DATA0
IOCHRDY
AEN_N
VDD
GND
INTR
DACKN
DRQ
ADDR9
Figure 6-1. TNT4882 ISA Pin Configuration
Data Buses
DATA15–8
DATA15–8 are the upper 8 bits of the bidirectional, 3-state data bus. DATA15–8 transfer commands, data, and status between the TNT4882 and the host interface.
© National Instruments Corp.
6-1 TNT4882 Programmer Reference
