STMicroelectronics VND5E025BK-E Datasheet
โฆษณา
โฆษณา
VND5E025BK-E
Double channel high-side driver with analog current sense for automotive applications
Features
Max transient supply voltage
Operating voltage range
V
CC
V
CC
Max on-state resistance (per ch.) R
ON
Current limitation (typ) I
LIMH
Off-state supply current I
S
1.
Typical value with all loads connected.
41 V
4.5 to 28 V
25 m Ω
60 A
2 µA
(1)
■
■
■
General
– Inrush current active management by power limitation
– Very low standby current
– 3.0V CMOS compatible inputs
Diagnostic functions
– High current sense precision for wide currents range
– Current sense ratio drift for single point calibration
– Current sense disable
– Overload and short to ground (power limitation) indication
– Thermal shutdown indication
Protections
– Undervoltage shutdown
– Overvoltage clamp
– Load current limitation
– Self limiting of fast thermal transients
– Protection against loss of ground and loss of V
CC
– Overtemperature shutdown with auto restart (thermal shutdown)
– Reverse battery protected
– Electrostatic discharge protection
Applications
■ Especially intended for blinkers
PowerSSO-24
■ All types of resistive, inductive and capacitive loads and suitable as LED driver
Description
The VND5E025BK-E is a double channel highside driver manufactured in the ST proprietary
VIPower™ M0-5 technology and housed in the tiny PowerSSO-24 package. The VND5E025BK-E is designed to drive 12V automotive grounded loads delivering protection, diagnostics and easy
3V and 5V CMOS compatible interface with any microcontroller.
The device integrates advanced protective functions such as load current limitation, inrush and overload active management by power limitation, overtemperature shut-off with auto restart and overvoltage active clamp.
A dedicated analog current sense pin is associated with every output channel in order to provide Enhanced diagnostic functions including fast detection of overload and short circuit to ground through power limitation indication and overtemperature indication.
An improved current sense circuitry and the introduction of a new current sense ratio drift, dK/K(tot), allow the "single-point" calibration and ensure a very high accuracy in case of "doublepoint" calibration.
The current sensing and diagnostic feedback of the whole device can be disabled by pulling the
CS_DIS pin high to allow sharing of the external sense resistor with other similar devices.
September 2013 Doc ID 16273 Rev 8 1/34 www.st.com
1
Contents
Contents
VND5E025BK-E
Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 22
Solution 1: resistor in the ground line (RGND only) . . . . . . . . . . . . . . . . 22
Solution 2: diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . . . 23
Current sense and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Maximum demagnetization energy (VCC = 13.5V) . . . . . . . . . . . . . . . . . 25
Package and thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
PowerSSO-24 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
®
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
2/34 Doc ID 16273 Rev 8
VND5E025BK-E
List of tables
List of tables
Doc ID 16273 Rev 8 3/34
List of figures
List of figures
VND5E025BK-E
Delay response time between rising edge of output current and rising edge of current sense
/I
SENSE
vs I
OUT
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
evolution in overload or short to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Rthj-amb vs PCB copper area in open box free air condition (one channel on) . . . . . . . . . 26
PowerSSO-24 thermal impedance junction to ambient single pulse (one channel on) . . . 27
4/34 Doc ID 16273 Rev 8
VND5E025BK-E
1
Block diagram and pin description
Block diagram and pin description
Figure 1.
Block diagram
Signal Clamp
Undervoltage
IN1
IN2
Control & Diagnostic 1
Power
Clamp
DRIVER
V
ON
Limitation
Over temp.
Current
Limitation
CH 1
V
CC
CS_
DIS
CS1
CS2
LOGIC
V
SENSEH
Current
Sense
OVERLOAD PROTECTION
(ACTIVE POWER LIMITATION)
CH 2
OUT2
OUT1
GND
Table 1.
Pin functions
Name Function
V
CC
Battery connection.
OUTPUT
1,2
Power output.
GND
INPUT
1,2
CURRENT SENSE
1,2
Ground connection. Must be reverse battery protected by an external diode / resistor network.
Voltage controlled input pin with hysteresis, CMOS compatible. Controls output switch state.
Analog current sense pin; delivers a current proportional to the load current.
CS_DIS Active high CMOS compatible pin to disable the current sense pin.
Doc ID 16273 Rev 8 5/34
Block diagram and pin description
Figure 2.
Configuration diagram (top view)
V
CC
GND
N.C.
INPUT2
N.C.
INPUT1
N.C.
CURRENT SENSE1
N.C.
CURRENT SENSE2
CS_DIS.
V
CC
7
8
9
10
11
12
3
4
5
6
1
2
18
17
16
15
14
13
24
23
22
21
20
19
OUTPUT2
OUTPUT2
OUTPUT2
OUTPUT2
OUTPUT2
OUTPUT2
OUTPUT1
OUTPUT1
OUTPUT1
OUTPUT1
OUTPUT1
OUTPUT1
TAB = V
CC
VND5E025BK-E
Table 2.
Suggested connections for unused and not connected pins
Connection / pin Current sense N.C.
Output Input
Floating
To ground
Not allowed
Through 1 k
Ω resistor
X
X
CS_DIS
X X
Through 22 k
Ω resistor
Through 10 k
Ω resistor
X
Through 10 k
Ω resistor
6/34 Doc ID 16273 Rev 8
VND5E025BK-E Electrical specification
Figure 3.
Current and voltage conventions
V
CSD
V
IN1
V
IN2
I
CSD
I
IN1
I
IN2
CS_DIS
INPUT1
INPUT2
I
S
GND
V
CC
V
Fn
I
OUT1
OUTPUT1
I
SENSE1
CURRENT
SENSE1
I
OUT2
V
SENSE1
OUTPUT2
CURRENT
SENSE2
I
SENSE2
V
SENSE2
V
OUT2
V
OUT1
I
GND
V
CC
Note:
V
Fn
= V
OUTn
- V
CC
during reverse battery condition.
Stressing the device above the rating listed in the “Absolute maximum ratings” table may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied. Exposure to the conditions in table below for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality document.
Table 3.
Symbol
Absolute maximum ratings
Parameter
V
CC
-V
CC
-I
GND
I
OUT
- I
OUT
I
IN
I
CSD
-I
CSENSE
V
CSENSE
DC supply voltage
Reverse DC supply voltage
DC reverse ground pin current
DC output current
Reverse DC output current
DC input current
DC current sense disable input current
DC reverse CS pin current
Current sense maximum voltage
Value
41
0.3
200
Internally limited
24
Unit
V mA
A
-1 to 10
200
V
CC
- 41 to +V
CC mA
V
Doc ID 16273 Rev 8 7/34
Electrical specification
Table 3.
Symbol
E
MAX
V
ESD
V
ESD
T j
T stg
Absolute maximum ratings (continued)
Parameter
Maximum switching energy (single pulse)
(L = 0.8 mH; R
L
= 0 Ω ; V bat
= 13.5 V; T jstart
= 150 °C;
I
OUT
= I limL
(Typ.))
Electrostatic discharge
(Human Body Model: R = 1.5 k
Ω
; C = 100 pF)
– Input
– Current sense
– CS_DIS
– Output
– V
CC
Charge device model (CDM-AEC-Q100-011)
Junction operating temperature
Storage temperature
VND5E025BK-E
Value
140
Unit mJ
4000
2000
4000
5000
5000
750
- 40 to 150
- 55 to 150
V
V
V
V
V
V
°C
Table 4.
Symbol
Thermal data
Parameter
R thj-case
Thermal resistance junction-case (with one channel on)
R thj-amb
Thermal resistance junction-ambient
Max. value
1.35
Unit
°C/W
8/34 Doc ID 16273 Rev 8
VND5E025BK-E Electrical specification
Values specified in this section are for 8V<V
CC
<28V; -40°C<T j
<150°C, unless otherwise stated.
Table 5.
Symbol
Power section
Parameter
V
CC
Operating supply voltage
V
USD
Undervoltage shutdown
V
USDhyst
Undervoltage shutdown hysteresis
Test conditions Min.
Typ.
Max.
Unit
4.5
13
0.5
28
3.5
4.5
V
R
ON
I
S
On-state resistance
(1)
V clamp
Clamp voltage
Supply current
I
L(off1)
Off-state output current
(1)
V
F
Output - V
CC voltage
(1)
diode
1.
For each channel.
2.
PowerMOS leakage included.
I
OUT
= 3A; T j
= 25°C
I
OUT
= 3A; T j
= 150°C
I
OUT
= 3A; V
CC
= 5V; T j
= 25°C
I
S
= 20 mA
Off-state; V
CC
V
IN
= V
OUT
= 13V; T
= V
SENSE j
= 25°C;
= V
CSD
= 0V
Off-state; V
CC
V
IN
= V
OUT
= 13V; T
= V
SENSE j
= 125°C;
= V
CSD
= 0V
I
On-state; V
CC
OUT
= 0A
= 13V; V
IN
= 5V;
V
IN
T j
= V
OUT
= 25°C
= 0V; V
CC
= 13V;
V
IN
T j
= V
OUT
= 125°C
= 0V; V
CC
= 13V;
-I
OUT
= 4 A; T j
= 150°C
41
0
46
2
(2)
5
(2)
3
0 0.01
25
50
35
52
9
6
3
5
0.7
m Ω
V
µA
µA mA
µA
V
Table 6.
Symbol
Switching (V
CC
= 13V; T j
= 25°C)
Parameter Test conditions Min.
t d(on) t d(off)
Turn-on delay time
Turn-off delay time
R
L
= 4.3
Ω
-
-
(dV
OUT
/dt) on
Turn-on voltage slope -
R
L
= 4.3 Ω
(dV
OUT
/dt) off
Turn-off voltage slope
W
W
ON
OFF
Switching energy losses during t
W
ON
Switching energy losses during t
W OFF
R
L
= 4.3 Ω
-
-
-
Typ.
20
30
See
See
0.6
Max.
Unit
-
-
µs
-
V/µs
-
mJ
0.35
-
Doc ID 16273 Rev 8 9/34
Electrical specification VND5E025BK-E
Table 7.
Symbol
V
IL
I
IL
V
IH
I
IH
V
I(hyst)
Logic inputs
Parameter
Input low level voltage
Low level input current
Input high level voltage
High level input current
Input hysteresis voltage
V
ICL
Input clamp voltage
V
CSDL
I
CSDL
V
CSDH
I
CSDH
V
CSD(hyst)
CS_DIS low level voltage
Low level CS_DIS current
CS_DIS high level voltage
High level CS_DIS current
CS_DIS hysteresis voltage
V
CSCL
CS_DIS clamp voltage
Test conditions
I
V
V
I
I
V
V
I
IN
IN
IN
IN
= 1mA
= -1mA
CSD
CSD
CSD
CSD
= 0.9V
= 2.1V
= 0.9V
= 2.1V
= 1mA
= -1mA
Min.
Typ.
Max.
Unit
0.9
1
2.1
10
V
µA
V
µA
0.25
5.5
7
V
-0.7
0.9
1
2.1
10
µA
V
µA
0.25
5.5
7 V
-0.7
Table 8.
Symbol
Protections and diagnostics
(1)
Parameter Test conditions Min.
Typ.
Max.
Unit
T
T
I
I
LIMH
LIML
T
TSD
T
R
RS
HYST
DC short circuit current
Short circuit current during thermal cycling
Shutdown temperature
Reset temperature
Thermal reset of STATUS
Thermal hysteresis
(T
TSD
-T
R
)
Turn-Off output voltage clamp
V
CC
= 13V
5V < V
CC
< 28V
V
T
CC
R
= 13V;
< T j
< T
TSD
43
150 175
T
RS
+ 1 T
RS
+ 5
135
60
15
7
85
200
A
°C
V
DEMAG
V
ON
Output voltage drop limitation
I
OUT
= 2A; V
IN
L = 6 mH
= 0;
I
OUT
= 0.1A;
T j
= -40°C to +150°C
V
CC
- 41 V
CC
- 46 V
CC
- 52 V
25 mV
1.
To ensure long term reliability under heavy overload or short circuit conditions, protection and related diagnostic signals must be used together with a proper software strategy. If the device is subjected to abnormal conditions, this software must limit the duration and number of activation cycles.
10/34 Doc ID 16273 Rev 8
VND5E025BK-E Electrical specification
Table 9.
Symbol
K
LED
K
1
K4
K
5
Current sense (8V < V
CC
< 18V)
Parameter
I
OUT
/I
SENSE
I
OUT
/I
SENSE dK
1
/K
1
(1)(2)
Current sense ratio drift
K
2
I
OUT
/I
SENSE dK
2
/K
2
Current sense ratio drift
K
3
I
OUT
/I
SENSE dK
3
/K
3
Current sense ratio drift
I
OUT
/I
SENSE dK
4
/K
4
Current sense ratio drift dK
5
/K
5
Current sense ratio drift
K
6
I
OUT
/I
SENSE
I
OUT
/I
SENSE dK
6
/K
6
Current sense ratio drift dK/K
(tot)
(1)(3)
Current sense ratio drift for single point calibration
Test conditions Min. Typ. Max. Unit
I
OUT
T j
= 0.05A; V
SENSE
= -40°C to 150°C
= 0.5V; V
CSD
= 0V;
1922 5046 9218
I
OUT
= 1.5 A; V
SENSE
= 4 V;
V
CSD
= 0V;
T j
= -40°C to 150°C
I
OUT
= 1.5 A; V
SENSE
= 4 V;
V
CSD
= 0V;
T j
= -40°C to 150°C
2460 3363 4050
-9 9
I
OUT
= 2 A; V
SENSE
= 4V;
V
CSD
= 0V;
T j
= -40°C to 150°C
I
OUT
T j
= 2 A; V
SENSE
= -40°C to 150°C
= 4V; V
CSD
= 0V;
I
OUT
= 2.4 A; V
SENSE
= 4V;
V
CSD
= 0V;
T j
= -40°C to 150°C
I
OUT
T j
= 2.4 A; V
SENSE
= -40°C to 150°C
= 4V; V
CSD
= 0V;
I
OUT
= 3 A; V
SENSE
= 4V;
V
CSD
= 0V;
T j
= -40°C to 150°C
I
OUT
= 3 A; V
SENSE
= 4V; V
CSD
= 0V;
T j
= -40°C to 150°C
I
OUT
= 4 A; V
SENSE
= 4V;
V
CSD
= 0V;
T j
= -40°C to 150°C
2550 3405 4108
-7 7
2635 3384 4117
-6 +6
2752 3368 3975
-5 5
2860 3341 3805
I
OUT
T j
= 4 A; V
SENSE
= -40°C to 150°C
= 4V; V
CSD
= 0V;
I
OUT
= 10 A; V
SENSE
= 4V;
V
CSD
= 0V;
T j
= -40°C to 150°C
I
OUT
= 10 A; V
SENSE
= 4V; V
CSD
= 0V;
T j
= -40°C to 150°C
Measurement point: I
OUT
T j
= 25°C; V
CC
= 13.5V
= 2.4 A;
I
OUT
= 1.5 A
I
OUT
= 2.0 A
I
OUT
= 2.4 A
I
OUT
= 3.0 A
I
OUT
= 4.0 A
-4
2965 3307 3570
-3
-9.5
-7
-6
-7
-8
4
3
9.5
7
6
7
8
%
%
%
%
%
%
%
%
%
%
%
Doc ID 16273 Rev 8 11/34
Electrical specification VND5E025BK-E
Table 9.
Symbol
Current sense (8V < V
CC
< 18V) (continued)
Parameter Test conditions Min. Typ. Max. Unit t t t
I
I
SENSE 0
V
V
I
OL
SENSE
SENSEH
SENSEH
DSENSE1H
DSENSE1L
DSENSE2H
I
OUT
= 0A; V
SENSE
= 0V;
V
CSD
= 5V; V
IN
= 0V; T j
= -40°C to 150°C
V
CSD
= 0V; V
IN
= 5V; T j
= -40°C to 150°C Analog sense leakage current
I
OUT
= 2A; V
SENSE
= 0V;
V
CSD
= 5V; V
IN
= 5V; T j
= -40°C to 150°C 0
Openload onstate current detection threshold
Max analog sense output voltage
I
I
V
IN
= 5V, 8V<V
SENSE
OUT
= 5 µA
= 3 A; V
CC
CSD
<18V
Analog sense output voltage in fault condition
(4)
V
CC
= 13V; R
SENSE
= 3.9k
Ω
Analog sense output current in fault condition
(2)
V
CC
= 13V; V
SENSE
= 5V
Delay response time from falling edge of CS_DIS pin
V
SENSE
I
SENSE
< 4V, 0.5 < I
OUT
< 10A
= 90% of I
SENSEMAX
(see
)
Delay response time from rising edge of CS_DIS pin
V
SENSE
I
SENSE
< 4V, 0.5 < I
OUT
< 10A
= 10% of I
SENSEMAX
(see
)
Delay response time from rising edge of INPUT pin
V
SENSE
I
SENSE
(see
< 4V, 0.5 < I
OUT
< 10A
= 90% of I
SENSEMAX
)
5
= 0V 5
6
0
0
8
9
30
5
80
1
2
1
70
12
100
20
300
Δ t
DSENSE2H
Delay response time between rising edge of output current and rising edge of current sense
V
SENSE
< 4V,
I
SENSE
= 90% of I
SENSEMAX,
I
OUT
= 90% of I
(see
)
OUTMAX
, I
OUTMAX
= 3A
110 t
DSENSE2L
Delay response time from falling edge of INPUT pin
V
SENSE
I
SENSE
< 4V, 0.5 < I
OUT
< 10A
= 10% of I
SENSEMAX
(see
)
5
1.
Parameter guaranteed by design; it is not tested.
2.
Analog sense current drift (dK/K) is deviation of factor K for a given device over (-40 °C to 150 °C,
Vbatt: 8 V...16 V) with respect to its value measured at Tj = 25 °C, V
CC
= 13 V .
3.
Total current drift over -40 °C to 150 °C, Vbatt: 8 V...16 V and output current variation, respect to a calibration point measured at Tj = 25 °C and V
CC
= 13.5 V .
4.
Fault condition includes: power limitation and overtemperature.
20
µA
µA
µA mA
V mA
µs
12/34 Doc ID 16273 Rev 8
VND5E025BK-E
Figure 4.
Current sense delay characteristics
INPUT
CS_DIS
LOAD CURRENT
SENSE CURRENT t
DSENSE2H t
DSENSE1L
Figure 5.
Switching characteristics
V
OUT t
Won
80% dV
OUT
/dt
(on) t r
10%
Electrical specification t
DSENSE1H t
DSENSE2L t
Woff
90% t f dV
OUT
/dt
(off) t
INPUT t d(on) t d(off) t
Figure 6.
Output voltage drop limitation
V
CC
- V
OUT
T j
= 150 o
C
T j
= 25 o
C
T j
= -40 o
C
V on
V on
/R on(T)
Doc ID 16273 Rev 8
I
OUT
13/34
Electrical specification VND5E025BK-E
Figure 7.
Delay response time between rising edge of output current and rising edge of current sense (CS enabled)
V
IN
Δ t
DSENSE2H t
I
OUT
90% I
OUTMAX
I
OUTMAX t
I
SENSE I
SENSEMAX
90% I
SENSEMAX t
Figure 8.
I
OUT
/I
SENSE
vs I
OUT
K
4200
4000
3800
3600
3400
3200
3000
2800
2600
2400
2200
1.5
2.5
3.5
4.5
5.5
Iout (A)
6.5
7.5
8.5
9.5
K(min)
K(max)
14/34 Doc ID 16273 Rev 8
VND5E025BK-E
Figure 9.
Maximum current sense ratio drift vs load current dK/K
10%
8%
6%
4%
2%
0%
-2%
-4%
-6%
-8%
-10%
1.5
2.5
3.5
4.5
5.5
Iout (A)
6.5
7.5
8.5
Note:
Parameter guaranteed by design; it is not tested.
Electrical specification
9.5
dK/K(min) dK/K(max)
Table 10.
Truth table
Conditions
Normal operation
Overtemperature
Undervoltage
Overload
Input
L
H
L
H
L
H
H
H
Output
L
L
L
H
L
L
X
(no power limitation)
Cycling
(power limitation)
L
L
Sense (V
CSD
=0V)
(1)
0
Nominal
0
V
SENSEH
0
0
Nominal
V
SENSEH
Short circuit to GND
(Power limitation)
Negative output voltage clamp
L
H
L L
V
0
SENSEH
0
1.
If the V
CSD
is high, the SENSE output is at a high impedance, its potential depends on leakage currents and external circuit.
Doc ID 16273 Rev 8 15/34
Electrical specification VND5E025BK-E
Table 11.
Electrical transient requirements (part 1/3)
ISO 7637-2:
2004(E) Test pulse
III
Test levels
(1)
IV
Number of pulses or test times
Burst cycle / pulse repetition time
Min.
Max.
1
2a
3a
3b
4
5b
(2)
-75V
+37V
-100V
+75V
-6V
+65V
-100V
+50V
-150V
+100V
-7V
+87V
5000 pulses
5000 pulses
1h
1h
1 pulse
1 pulse
0.5s
0.2s
90ms
90ms
5s
5s
100ms
100ms
1.
The above test levels must be considered referred to V
CC
= 13.5V except for pulse 5b.
2.
Valid in case of external load dump clamp: 40V maximum referred to ground.
Delays and
Impedance
2 ms, 10 Ω
50µs, 2 Ω
0.1µs, 50
Ω
0.1µs, 50 Ω
100ms, 0.01
Ω
400ms, 2 Ω
Table 12.
Electrical transient requirements (part 2/3)
Test level results ISO 7637-2:
2004E
Test pulse III
1
2a
3a
3b
4
5b
(1)
C
C
C
C
C
C
1.
Valid in case of external load dump clamp: 40V maximum referred to ground.
VI
C
C
C
C
C
C
Table 13.
Electrical transient requirements (part 3/3)
Class Contents
C
E
All functions of the device performed as designed after exposure to disturbance.
One or more functions of the device did not perform as designed after exposure to disturbance and cannot be returned to proper operation without replacing the device.
16/34 Doc ID 16273 Rev 8
VND5E025BK-E
2.4 Waveforms
Figure 10.
Normal operation
Electrical specification
Normal operation
INPUT
Nominal load Nominal load
I
OUT
V
SENSE
V
CS_DIS
Figure 11.
Overload or short to GND
Overload or Short to GND
INPUT
I
LimH
>
I
OUT
Power Limitation
I
LimL
>
Thermal cycling
V
SENSE
V
CS_DIS
Doc ID 16273 Rev 8 17/34
Electrical specification
Figure 12.
Intermittent overload
Intermittent Overload
VND5E025BK-E
INPUT
I
LimH
>
I
OUT
V
SENSEH
>
V
SENSE
V
CS_DIS
Overload
I
LimL
>
Nominal load
Figure 13.
T
J
evolution in overload or short to GND
T
J
evolution in
Overload or Short to GND
INPUT
Self-limitation of fast thermal transients T
TSD
T
R
T
J
I
LimH
>
T
J_START
Power Limitation
T
HYST
< I
LimL
I
OUT
18/34 Doc ID 16273 Rev 8
VND5E025BK-E Electrical specification
1,8
1,6
1,4
1,2
1
0,8
0,6
0,4
0,2
0
-50
Figure 14.
Off-state output current
Iloff (nA)
1000
600
500
400
300
200
100
900
800
700
Off State
Vcc=13V
Vin=Vout=0V
6,8
6,6
6,4
6,2
6
5,8
5,6
5,4
5,2
0
-50 -25 0 25 50 75
Tc (°C)
100 125 150 175
Figure 16.
Input clamp voltage
Vicl (V)
7 lin=1mA
5
-50 -25 0 25 50 75
Tc (°C)
Figure 18.
Input low level
Vil (V)
2
100 125 150 175
-25 0 25 50 75
Tc (°C)
100 125 150 175
Figure 15.
High level input current
Iih (µA)
5
4,5
4
3,5
3
2,5
2
1,5
1
0,5
Vin = 2.1V
V
CC
= 8 V
0
-50 -25 0 25 50 75
Tc (°C)
100
Figure 17.
Input high level
Vih (V)
4
125 150 175
3,5
3
2,5
2
1,5
1
0,5
0
-50 -25 0 25 50 75
Tc (°C)
100 125 150 175
Figure 19.
Input hysteresis voltage
Vihyst (V)
1
0,9
0,8
0,7
0,6
0,5
0,4
0,3
0,2
0,1
0
-50 -25 0 25 50 75
Tc (°C)
100 125 150 175
Doc ID 16273 Rev 8 19/34
Electrical specification VND5E025BK-E
Figure 20.
On-state resistance vs T case
Ron (mOhm)
70
Figure 21.
On-state resistance vs V
CC
Ron (mOhm)
60
60
Iout= 3A
Vcc=13V
50
50
40
40
Tc=150°C
Tc=125°C
30
30
20
20
Tc=25°C
Tc=-40°C
10
0
-50 -25 0 25 50 75
Tc (°C)
100 125 150 175
10
14
12
10
8
6
4
2
0
-50 -25 0 25 50 75
Tc (°C)
100 125 150
Figure 22.
Undervoltage shutdown
175
Vusd (V)
16
0
-50 -25 0 25 50 75
Tc (°C)
100 125 150 175
Figure 24.
Turn-on voltage slope
(dVout/dt )On (V/ms)
700
0
0 5 10 15 20
Vcc (V)
25
Figure 23.
I
LIMH
vs T case
Ilimh (A)
70
65
60
55
50
45
Vcc=13V
30 35 40
40
-50 -25 0 25 50 75
Tc (°C)
100 125
Figure 25.
Turn-off voltage slope
150 175
(dVout/dt )Off (V/ms)
600
600
Vcc=13V
RI=4.3 Ohm
500 Vcc=13V
RI= 4.3 Ohm
500
400
400
300
300
200
200
100
100
0
-50 -25 0 25 50 75
Tc (°C)
100 125 150 175
20/34 Doc ID 16273 Rev 8
VND5E025BK-E Electrical specification
Figure 26.
CS_DIS high level voltage
Vcsdh (V)
4
3,5
3
2,5
2
1,5
1
0,5
0
-50 -25 0 25 50 75
Tc (°C)
100 125
Figure 28.
CS_DIS clamp voltage
Vcsdcl(V)
10
150 175
7
6
5
9
8
4
3
2
1
0
-50 -25 0 25
Icsd = 1 mA
50 75
Tc (°C)
100 125 150 175
Figure 27.
CS_DIS low level voltage
Vcsdl (V)
3
2,5
2
1,5
1
0,5
0
-50 -25 0 25 50 75
Tc (°C)
100 125 150 175
Doc ID 16273 Rev 8 21/34
Application information VND5E025BK-E
Figure 29.
Application schematic
+5V
Μ
CU
V
CC
R prot CS_DIS
R prot
R prot
INPUT
C
EXT
R
SENSE
CURRENT SENSE
GND
V
GND
R
GND
D
GND
OUTPUT
D ld
Note:
Channel 2 has the same internal circuit as channel 1.
3.1
3.1.1
GND protection network against reverse battery
This section provides two solutions for implementing a ground protection network against reverse battery.
Solution 1: resistor in the ground line (R
GND
only)
This can be used with any type of load.
The following is an indication on how to dimension the R
GND resistor.
1.
R
GND
≤
600 mV / (I
S(on)max
)
2. R
GND
≥ (− V
CC
) / (-I
GND
) where -I
GND
is the DC reverse ground pin current and can be found in the absolute maximum rating section of the device datasheet.
Power dissipation in R
GND
(when V
CC
<0: during reverse battery situations) is:
P
D
= (-V
CC
)
2
/R
GND
This resistor can be shared amongst several different HSDs. Please note that the value of this resistor should be calculated with formula (1) where I
S(on)max
becomes the sum of the maximum On-state currents of the different devices.
Please note that if the microprocessor ground is not shared by the device ground then the
R
GND will produce a shift (I
S(on)max
* R
GND
) in the input thresholds and the status output
22/34 Doc ID 16273 Rev 8
VND5E025BK-E
3.1.2
Application information values. This shift will vary depending on how many devices are On in the case of several high-side drivers sharing the same R
GND
.
If the calculated power dissipation leads to a large resistor or several devices have to share the same resistor then ST suggests to utilize Solution 2 (see below).
Solution 2: diode (D
GND
) in the ground line
A resistor (R
GND
=1 k
Ω) should be inserted in parallel to D
GND
if the device drives an inductive load.
This small signal diode can be safely shared amongst several different HSDs. Also in this case, the presence of the ground network will produce a shift (
≈
600mV) in the input threshold and in the status output values if the microprocessor ground is not common to the device ground. This shift will not vary if more than one HSD shares the same diode/resistor network.
3.2 Load dump protection
D ld
is necessary (voltage transient suppressor) if the load dump peak voltage exceeds the
V
CC
max DC rating. The same applies if the device is subject to transients on the V
CC
line that are greater than the ones shown in the ISO 7637-2: 2004(E) table.
3.3 MCU I/Os protection
If a ground protection network is used and negative transient are present on the V
CC
line, the control pins will be pulled negative. ST suggests to insert a resistor (R prot
) in line to prevent the MCU I/Os pins to latch-up.
The value of these resistors is a compromise between the leakage current of MCU and the current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of MCU
I/Os:
-V
CCpeak
/I latchup
≤
R prot
≤
(V
OH
μ
C
-V
IH
-V
GND
) / I
IHmax
Calculation example:
For V
CCpeak
= - 100 V and I latchup
≥
20 mA; V
OHµC
≥
4.5 V
5 k
Ω ≤
R prot
≤
180 k
Ω
Recommended values: R prot
=10 k
Ω
, C
EXT
=10 nF.
Doc ID 16273 Rev 8 23/34
Application information
3.4
VND5E025BK-E
Current sense and diagnostic
The current sense pin performs a double function (see
Figure 30: Current sense and diagnostic
):
● Current mirror of the load current in normal operation, delivering a current proportional to the load one according to a known ratio K
X
.
The current I
SENSE
can be easily converted to a voltage V
SENSE
by means of an external resistor R
SENSE
. Linearity between I
OUT
and V
SENSE
is ensured up to 5V minimum (see parameter V
SENSE
in Table 9: Current sense (8V < VCC < 18V) ). The
current sense accuracy depends on the output current (refer to current sense electrical characteristics
Table 9: Current sense (8V < VCC < 18V) ).
● Diagnostic flag in fault conditions, delivering a fixed voltage V
SENSEH
up to a maximum current I
SENSEH
in case of the following fault conditions (refer to
):
– Power limitation activation
– Overtemperature
A logic level high on CS_DIS pin sets at the same time all the current sense pins of the device in a high impedance state, thus disabling the current monitoring and diagnostic detection. This feature allows multiplexing of the microcontroller analog inputs by sharing of sense resistance and ADC line among different devices.
Figure 30.
Current sense and diagnostic
V
CC
Signal Clamp
IN1
IN2
Undervoltage Control & Diagnostic 1
Power
Clamp
DRIVER
V
ON
Limitation
Over temp.
Current
Limitation
CH 1
CH 2
CS_
DIS
CS1
CS2
LOGIC
V
SENSEH
Current
Sense
OVERLOAD PROTECTION
(ACTIVE POWER LIMITATION)
OUT2
OUT1
GND
24/34 Doc ID 16273 Rev 8
VND5E025BK-E
3.5 Maximum demagnetization energy (V
CC
Application information
= 13.5V)
Figure 31.
Maximum turn-off current versus inductance (for each channel)
100
B
C
A
10
1
0,1 1 L (mH) 10 100
A: T jstart
= 150°C single pulse
B: T jstart
= 100°C repetitive pulse
C: T jstart
= 125°C repetitive pulse
V
IN
, I
L
Demagnetization Demagnetization Demagnetization
Note:
Values are generated with R
L
= 0
In case of repetitive pulses, T jstart
Ω.
(at beginning of each demagnetization) of every pulse must not exceed the temperature specified above for curves A and B.
t
Doc ID 16273 Rev 8 25/34
Package and thermal data
4 Package and thermal data
4.1 PowerSSO-24 thermal data
Figure 32.
PowerSSO-24 PC board
VND5E025BK-E
26/34
Note:
Layout condition of R th
and Z th
measurements (PCB: Double layer, Thermal Vias, FR4 area = 77mm x 86mm, PCB thickness = 1.6mm, Cu thickness = 70µm (front and back side), Copper areas: from minimum pad layout to 8cm
2
).
Figure 33.
R thj-amb
vs PCB copper area in open box free air condition (one channel on)
RTHj_amb(°C/W)
55
50
45
40
35
30
0 2 4 6
PCB Cu heatsink area (cm^2)
8 10
Doc ID 16273 Rev 8
VND5E025BK-E Package and thermal data
Figure 34.
PowerSSO-24 thermal impedance junction to ambient single pulse (one channel on)
ZTH (°C/W)
1000
100
10
1
Footprint
2 cm
2
8 cm
2
0.1
0.0001
0.001
0.01
0.1
Time (s)
1 10 100 1000
Equation 1: pulse calculation formula
Z
TH δ
= R
TH where δ = t
P
/T
⋅ δ
+ Z
THtp
(
1 –
δ )
Figure 35.
Thermal fitting model of a double channel HSD in PowerSSO-24
Note:
The fitting model is a simplified thermal tool and is valid for transient evolutions where the embedded protections (power limitation or thermal cycling during thermal shutdown) are not triggered.
Doc ID 16273 Rev 8 27/34
Package and thermal data
Table 14.
Thermal parameters
Area/Island (cm
2
) Footprint
R1 (°C/W)
R2 (°C/W)
R3 (°C/W)
R4 (°C/W)
R5 (°C/W)
R6 (°C/W)
R7 (°C/W)
R8 (°C/W)
C1 (W.s/°C)
C2 (W.s/°C)
C3 (W.s/°C)
C4 (W.s/°C)
C5 (W.s/°C)
C6 (W.s/°C)
C7 (W.s/°C)
C8 (W.s/°C)
0.28
0.9
0.001
0.003
0.025
0.75
1
0.28
0.9
6
7.7
9
28
2.2
0.001
0.003
2
9
17
4
5
VND5E025BK-E
8
8
10
9
17
28/34 Doc ID 16273 Rev 8
VND5E025BK-E
5
Package and packing information
Package and packing information
5.1 ECOPACK
®
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
®
packages, depending on their level of environmental compliance. ECOPACK
® specifications, grade definitions and product status are available at: www.st.com
.
ECOPACK
®
is an ST trademark.
Figure 36.
PowerSSO-24 package dimensions
Doc ID 16273 Rev 8 29/34
Package and packing information
G1
H h k e e3
G
L
N
X
Y
A
A2 a1 b c
D
E
Table 15.
PowerSSO-24 mechanical data
Symbol
Min.
2.15
2.15
0
0.33
0.23
10.10
7.4
10.1
0.55
4.1
6.5
Millimeters
Typ.
0.8
8.8
5°
VND5E025BK-E
0.85
10°
4.7
7.1
0.1
0.06
10.5
0.4
Max.
2.47
2.40
0.075
0.51
0.32
10.50
7.6
Figure 37.
PowerSSO-24 tube shipment (no suffix)
C
B
Base Qty
Bulk Qty
Tube length (±0.5)
A
B
C (±0.1)
All dimensions are in mm.
49
1225
532
3.5
13.8
0.6
A
30/34 Doc ID 16273 Rev 8
VND5E025BK-E Package and packing information
Figure 38.
PowerSSO-24 tape and reel shipment (suffix “TR”)
REEL DIMENSIONS
Base Qty
Bulk Qty
A (max)
B (min)
C (±0.2)
F
G (+2 / -0)
N (min)
T (max)
1000
1000
330
1.5
13
20.2
24.4
100
30.4
TAPE DIMENSIONS
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb. 1986
Tape width
Tape Hole Spacing
Component Spacing
Hole Diameter
Hole Diameter
Hole Position
Compartment Depth
Hole Spacing
W
P0 (±0.1)
D1 (min)
F (±0.1)
K (max)
P1 (±0.1)
24
4
P 12
D (±0.05) 1.55
1.5
11.5
2.85
2
All dimensions are in mm.
End
Top cover tape
No components Components No components
500mm min 500mm min
Empty components pockets sealed with cover tape.
Start
User direction of feed
Doc ID 16273 Rev 8 31/34
Order codes VND5E025BK-E
Table 16.
Device summary
Package
PowerSSO-24
Tube
VND5E025BK-E
Order codes
Tape and reel
VND5E025BKTR-E
32/34 Doc ID 16273 Rev 8
VND5E025BK-E Revision history
Table 17.
Document revision history
Date Revision
17-Sep-2009
02-Nov-2009
30-Nov-2009
21-Jan-2010
03-Feb-2010
19-Feb-2010
11-Oct-2010
19-Sep-2013
6
7
8
1
2
3
4
5
Changes
Initial release.
Updated Table 5: Power section
.
Updated Table 9: Current sense (8V < VCC < 18V) .
Updated Figure 9: Maximum current sense ratio drift vs load current
Updated Table 9: Current sense (8V < VCC < 18V)
Updated following tables:
–
Table 6: Switching (VCC = 13V; Tj = 25°C)
–
Table 9: Current sense (8V < VCC < 18V)
Updated following figures:
–
–
Figure 9: Maximum current sense ratio drift vs load current
Updated Table 6: Switching (VCC = 13V; Tj = 25°C) .
Changed document status from target specification to datasheet.
Updated Disclaimer.
Doc ID 16273 Rev 8 33/34
VND5E025BK-E
Please Read Carefully:
Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice.
All ST products are sold pursuant to ST’s terms and conditions of sale.
Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein.
No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such third party products or services or any intellectual property contained therein.
UNLESS OTHERWISE SET FORTH IN ST’S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR IMPLIED
WARRANTY WITH RESPECT TO THE USE AND/OR SALE OF ST PRODUCTS INCLUDING WITHOUT LIMITATION IMPLIED
WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS
OF ANY JURISDICTION), OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT.
ST PRODUCTS ARE NOT DESIGNED OR AUTHORIZED FOR USE IN: (A) SAFETY CRITICAL APPLICATIONS SUCH AS LIFE
SUPPORTING, ACTIVE IMPLANTED DEVICES OR SYSTEMS WITH PRODUCT FUNCTIONAL SAFETY REQUIREMENTS; (B)
AERONAUTIC APPLICATIONS; (C) AUTOMOTIVE APPLICATIONS OR ENVIRONMENTS, AND/OR (D) AEROSPACE APPLICATIONS
OR ENVIRONMENTS. WHERE ST PRODUCTS ARE NOT DESIGNED FOR SUCH USE, THE PURCHASER SHALL USE PRODUCTS AT
PURCHASER’S SOLE RISK, EVEN IF ST HAS BEEN INFORMED IN WRITING OF SUCH USAGE, UNLESS A PRODUCT IS
EXPRESSLY DESIGNATED BY ST AS BEING INTENDED FOR “AUTOMOTIVE, AUTOMOTIVE SAFETY OR MEDICAL” INDUSTRY
DOMAINS ACCORDING TO ST PRODUCT DESIGN SPECIFICATIONS. PRODUCTS FORMALLY ESCC, QML OR JAN QUALIFIED ARE
DEEMED SUITABLE FOR USE IN AEROSPACE BY THE CORRESPONDING GOVERNMENTAL AGENCY.
Resale of ST products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever, any liability of ST.
ST and the ST logo are trademarks or registered trademarks of ST in various countries.
Information in this document supersedes and replaces all information previously supplied.
The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners.
© 2013 STMicroelectronics - All rights reserved
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34/34 Doc ID 16273 Rev 8
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