STMicroelectronics VNQ5E160AK-E Datasheet
Reklamë
Reklamë
VNQ5E160AK-E
Quad channel high side driver with analog current sense for automotive applications
Features
Max supply voltage
Operating voltage range
V
CC
V
CC
Max on-state resistance (per ch.) R
ON
Current limitation (typ) I
LIMH
Off state supply current I
S
41V
4.5 to 28 V
160 m
10 A
2 µA
(1)
1.
Typical value with all loads connected.
■ General
– Inrush current active management by power limitation
– Very low stand-by current
– 3.0 V CMOS compatible inputs
– Optimized electromagnetic emissions
– Very low electromagnetic susceptibility
– In compliance with the 2002/95/EC european directive
– Very low current sense leakage
■
■
Diagnostic functions
– Proportional load current sense
– High current sense precision for wide currents range
– Current sense disable
– Off state openload detection
– Output short to Vcc detection
– Thermal shutdown indication
– Overload and short to ground (power limitation) indication
Protections
– Undervoltage shutdown
– Overvoltage clamp
– Load current limitation
– Self limiting of fast thermal transients
– Protection against loss of ground and loss of V
CC
– Over-temperature shutdown with autorestart (thermal shutdown)
– Reverse battery protected (see
Figure 32
)
September 2013 Rev 3
PowerSSO-24
– Electrostatic discharge protection
Application
■
■
All types of resistive, inductive and capacitive loads
Suitable as LED driver
Description
The VNQ5E160AK-E is a double channel highside driver manufactured in the ST proprietary
VIPower M0-5 technology and housed in the tiny
PowerSSO-24 package. The VNQ5E160AK-E is designed to drive 12V automotive grounded loads delivering protection, diagnostics and easy 3V and 5V CMOS compatible interface with any microcontroller.
The device integrates advanced protective functions such as load current limitation, inrush and overload active management by power limitation, over-temperature shut-off with auto-restart and over-voltage active clamp. A dedicated analog current sense pin is associated with every output channel in order to provide
Ehnanced diagnostic functions including fast detection of overload and short-circuit to ground through power limitation indication, overtemperature indication, short-circuit to Vcc diagnosis and on & off state open load detection.
The current sensing and diagnostic feedback of the whole device can be disabled by pulling the
CS_DIS pin high to allow sharing of the external sense resistor with other similar devices.
1/37
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1
Contents
Contents
VNQ5E160AK-E
Block diagram and pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 24
Solution 1 : resistor in the ground line (RGND only) . . . . . . . . . . . . . . . 24
Solution 2 : diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . . 25
Current sense and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Short to VCC and off state open load detection . . . . . . . . . . . . . . . . . . 27
Maximum demagnetization energy (VCC = 13.5V) . . . . . . . . . . . . . . . . . 28
Package and PC board thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
PowerSSO-24 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
®
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
PowerSSO-24 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
2/37
VNQ5E160AK-E
List of tables
List of tables
CC
<18V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
CC
<18V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
3/37
List of figures
List of figures
VNQ5E160AK-E
Delay response time between rising edge of ouput current and rising edge of current sense
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
J
evolution in overload or short to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
On state resistance vs. T case
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
LIMH
vs. T case
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Rthj-amb vs. PCB copper area in open box free air condition (one channel ON). . . . . . . . 29
PowerSSO-24 thermal impedance junction ambient single pulse (one channel ON). . . . . 30
4/37
VNQ5E160AK-E
1
Block diagram and pin configuration
Block diagram and pin configuration
Figure 1.
Block diagram
V
CC
Signal Clamp
CS_
DIS
CS1
CS2
CS3
CS4
IN1
IN2
IN3
IN4
Undervoltage
LOGIC
Control & Diagnostic 1
Power
Clamp
DRIVER
V
ON
Limitation
Over temp.
Current
Limitation
OFF State
Open load
V
SENSEH
Current
Sense
OVERLOAD PROTECTION
(ACTIVE POWER LIMITATION)
CH 1
CH 2
CH 3
CH 4
OUT4
OUT3
OUT2
OUT1
GND
Table 1.
Name
Pin functions
V
CC
OUTPUT n
GND
INPUT n
Function
Battery connection
Power output
Ground connection. Must be reverse battery protected by an external diode/resistor network
Voltage controlled input pin with hysteresis, CMOS compatible. Controls output switch state
CURRENT
SENSE n
CS_DIS
Analog current sense pin, delivers a current proportional to the load current
Active high CMOS compatible pin, to disable the current sense pin
5/37
Block diagram and pin configuration
Figure 2.
Configuration diagram (top view)
V
CC
GND
INPUT1
CURRENT SENSE1
INPUT2
CURRENT SENSE2
INPUT3
CURRENT SENSE3
INPUT4
CURRENT SENSE4
CS_DIS.
V
CC
OUTPUT1
OUTPUT1
OUTPUT1
OUTPUT2
OUTPUT2
OUTPUT2
OUTPUT3
OUTPUT3
OUTPUT3
OUTPUT4
OUTPUT4
OUTPUT4
TAB = V
CC
VNQ5E160AK-E
Table 2.
Suggested connections for unused and not connected pins
Connection / pin
Floating
To ground
Current Sense
Not allowed
Through 1 k
resistor
N.C.
X
X
Output
X
Not allowed
Input CS_DIS
X
Through 10 k
resistor
X
Through 10 k
resistor
6/37
VNQ5E160AK-E Electrical specifications
Figure 3.
Current and voltage conventions
V
CSD
V
CC
OUTPUTn
I
S
V
Fn
I
OUTn
V
I
CSD
CS_DIS
I
INn
INn
INPUTn
GND
CURRENT
SENSEn
I
GND
I
SENSEn
V
SENSEn
V
OUTn
V
CC
Note:
2.1
V
Fn
= V
OUTn
- V
CC
during reverse battery condition.
Absolute maximum ratings
Stressing the device above the rating listed in the “Absolute maximum ratings” table may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. Exposure to the conditions in table below for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality document.
Table 3.
Symbol
Absolute maximum ratings
Parameter
V
CC
-V
CC
-I
GND
DC supply voltage
Reverse DC supply voltage
DC reverse ground pin current
I
OUT
-I
OUT
I
IN
I
CSD
DC output current
Reverse DC output current
DC input current
DC current sense disable input current
-I
CSENSE
DC reverse CS pin current
V
CSENSE
Current sense maximum voltage
Value Unit
41
0.3
200
V
V mA
Internally limited A
6 A
-1 to 10
-1 to 10 mA mA
200
V
CC
-41
+V
CC mA
V
V
E
MAX
Maximum switching energy (single pulse)
(L= 12 mH; R
L
=0
; V bat
=13.5V; T jstart
=150ºC; I
OUT
= I limL
(Typ.) )
34 mJ
7/37
Electrical specifications
Table 3.
Symbol
V
ESD
V
ESD
T j
T stg
Absolute maximum ratings (continued)
Parameter
Electrostatic discharge
(human body model: R= 1.5 K
C= 100 pF)
- Input
- Current sense
- CS_DIS
- Output
- V
CC
Charge device model (CDM-AEC-Q100-011)
Junction operating temperature
Storage temperature
VNQ5E160AK-E
Value Unit
4000
2000
4000
5000
5000
750
-40 to 150
-55 to 150
V
V
V
V
V
V
°C
°C
Table 4.
Symbol
R thj-case
Thermal data
Parameter
Thermal resistance junction-case (max)
(with one channel ON)
R thj-amb
Thermal resistance junction-ambient (max)
Max. value Unit
8 °C/W
in the thermal section
°C/W
8/37
VNQ5E160AK-E Electrical specifications
Values specified in this section are for 8V<V
CC stated.
<28V, -40°C< T j
<150°C, unless otherwise
Table 5.
Symbol
Power section
Parameter Test conditions
V
CC
V
USD
Operating supply voltage
Undervoltage shutdown
V
USDhyst
Undervoltage shutdown hysteresis
V
I
R
I
ON clamp
L(off1)
V
S
F
On state resistance
Clamp voltage
Supply current
(2)
Off state output current
(2)
I
OUT
= 1A; T j
= 25°C
I
OUT
= 1A; T j
= 150°C
I
OUT
= 1A; V
CC
= 5V; T j
= 25°C
I
S
= 20 mA
Off State; V
CC
= 13 V; T j
= 25°C;
V
IN
=V
OUT
=V
SENSE
=V
CSD
= 0 V
On State; V
CC
= 13V; V
IN
= 5 V;
I
OUT
= 0A
V
IN
=V
OUT
= 0 V; V
CC
= 13 V;
T j
= 25°C
V
IN
=V
OUT
= 0 V; V
CC
= 13 V;
T j
= 125 °C
Output - V
CC
diode voltage
-I
OUT
=1A; T j
=150°C
1.
PowerMOS leakage included.
2.
For each channel.
Table 6.
Symbol
t d(on) t d(off)
Switching (V
CC
Parameter
= 13V; T j
= 25°C)
Turn-on delay time
Turn-off delay time
Test conditions
R
L
= 13
(see
R
L
= 13
(see
Min.
(dV
OUT
/dt) on
Turn-on voltage slope R
L
= 13
(dV
OUT
/dt) off
Turn-off voltage slope R
L
= 13
Min.
Typ.
Max.
Unit
4.5
13
3.5
28
4.5
V
V
41
0.5
46
2
(1)
8
0 0.01
0
Typ.
20
10
See
See
160
320
210
52
14
3
5
0.7
V m
V
µA mA
µA
V
Max.
Unit
µs
µs
V
µs
V
µs
W
ON
W
OFF
Switching energy losses during t won
Switching energy losses during t woff
R
L
= 13
(see
R
L
= 13
(see
0.05
0.03
mJ mJ
9/37
Electrical specifications VNQ5E160AK-E
Table 7.
Symbol
Logic Inputs
Parameter Test conditions Min.
Typ.
Max.
Unit
V
IL
I
IL
V
IH
I
IH
V
I(hyst)
Input low level voltage
Low level input current
Input high level voltage
High level input current
Input hysteresis voltage
V
IN
= 0.9V
V
IN
= 2.1V
1
2.1
0.25
0.9
10
V
µA
V
µA
V
V
ICL
Input clamp voltage
I
IN
= 1mA
I
IN
= -1mA
5.5
-0.7
7
V
V
CSDL
I
CSDL
V
CSDH
I
CSDH
V
CSD(hyst)
CS_DIS low level voltage
Low level CS_DIS current
CS_DIS high level voltage
High level CS_DIS current
CS_DIS hysteresis voltage
V
CSD
= 0.9V
V
CSD
= 2.1V
1
2.1
0.25
0.9
10
V
µA
V
µA
V
V
CSCL
Table 8.
Symbol
CS_DIS clamp voltage
Protections and diagnostics
Parameter
I
CSD
= 1mA
I
CSD
= -1mA
(1)
Test conditions
5.5
-0.7
Min.
Typ.
7
V
Max.
Unit
I limH
DC short circuit current
V
CC
= 13V
5V<V
CC
<28V
7 10 14
14
V
T
I
T
T limL
TSD
T
R
RS
HYST
DEMAG
Short circuit current during thermal cycling
Shutdown temperature
Reset temperature
Thermal reset of
STATUS
Thermal hysteresis
(T
TSD
-T
R
)
Turn-off output voltage clamp
I
V
CC
OUT
= 13V; T
= 1A; V
IN
R
<T j
<T
TSD
= 0; L= 20mH V
150
T
RS
135
CC
-41 V
2.5
175
+ 1 T
RS
7
CC
+ 5
-46 V
200
CC
-52
V
ON
Output voltage drop limitation
I
OUT
= 0.03A;
T j
= -40°C...150°C
)
25
1.
To ensure long term reliability under heavy overload or short circuit conditions, protection and related diagnostic signals must be used together with a proper software strategy. If the device is subjected to abnormal conditions, this software must limit the duration and number of activation cycles.
A
A
A
°C
°C
°C
°C
V mV
10/37
VNQ5E160AK-E Electrical specifications
Table 9.
Symbol
Current sense (8V<V
CC
<18V)
Parameter Test conditions
dK dK dK
I
K
K
1
/K
K
2
/K
K
0
1
2
3
3
/K
1
(1)
2
(1)
3
(1)
SENSE0
V
I
OL
SENSE
V
SENSEH
I
I
I
I
OUT
OUT
OUT
OUT
/I
/I
/I
/I
SENSE
SENSE
Current sense ratio drift
SENSE
Current sense ratio drift
SENSE
Current sense ratio drift
Analog sense leakage current
I
OUT
= 0.025 A;
V
SENSE
= 0.5 V; V
CSD
= 0 V;
T j
= -40°C...150°C
I
OUT
= 0.35A;
V
SENSE
= 0.5 V; V
CSD
= 0 V;
T j
= -40°C...150°C
T j
= 25°C...150°C
I
OUT
= 0.35 A;
V
SENSE
= 0.5 V; V
CSD
= 0 V;
T j
= -40°C...150°C
I
OUT
= 0.5A;
V
SENSE
=4V; V
CSD
= 0 V;
T j
=-40°C...150°C
T j
= 25°C...150°C
I
OUT
= 0.5 A;
V
SENSE
= 4 V; V
CSD
= 0 V;
T j
= -40°C...150°C
I
OUT
= 1.5 A;
V
SENSE
= 4 V; V
CSD
= 0 V;
T j
= -40°C...150°C
T j
= 25°C...150°C
I
OUT
= 1.5 A;
V
SENSE
= 4 V; V
CSD
= 0 V;
T j
= -40°C...150°C
I
OUT
= 0 A; V
SENSE
= 0 V;
V
CSD
= 5 V; V
IN
= 0 V;
T j
= -40°C...150°C
I
OUT
= 0 A; V
SENSE
= 0 V;
V
CSD
= 0 V; V
IN
= 5 V;
T j
= -40°C...150°C
I
OUT
= 1A; V
SENSE
= 0V;
V
CSD
= 5V; V
IN
= 5V;
T j
= -40°C...150°C
Openload on state current detection threshold
V
I
IN
= 5V,
SENSE
= 5 µA
Max analog sense output voltage
Analog sense output voltage in fault condition
(2)
I
OUT
V
CC
= 1.5 A; V
= 13 V; R
CSD
= 0 V
SENSE
= 3.9 K
Min.
Typ.
Max.
Unit
330 600 870
345
395
475
475
600
555
- 12
375
415
470
470
565
525
- 8
425
435
465
465
505
495
- 6
0
0
0
1
5
8
12
8
6
1
2
1
5
%
%
%
µA mA
V
V
11/37
Electrical specifications VNQ5E160AK-E
Table 9.
Symbol
Current sense (8V<V
CC
<18V) (continued)
Parameter Test conditions Min.
Typ.
Max.
Unit
I
SENSEH
(2)
Analog sense output current in fault condition
(2)
V
CC
= 13V; V
SENSE
= 5 V; t t
DSENSE1H
DSENSE1L
Delay response time from falling edge of
CS_DIS pin
Delay response time from rising edge of
CS_DIS pin
V
SENSE
<4V, 0.025A<Iout<1.5A
I
SENSE
=90% of I
SENSEMAX
(see
)
V
SENSE
<4V, 0.025A<Iout<1.5A
I
SENSE
=10% of I
SENSEMAX
(see
) t
DSENSE2H
Delay response time from rising edge of
INPUT pin
V
SENSE
<4V, 0.025A<Iout<1.5A
I
SENSE
=90% of I
SENSEMAX
(see
)
t
DSENSE2H t
DSENSE2L
Delay response time between rising edge of output current and rising edge of current sense
V
SENSE
< 4V,
I
SENSE
= 90% of I
SENSEMAX,
I
OUT
= 90% of I
OUTMAX
I
OUTMAX
Delay response time from falling edge of
INPUT pin
V
SENSE
<4V, 0.025A<Iout<1.5A
I
SENSE
=10% of I
SENSEMAX
(see
)
9
40
5
120
80 250
1.
Parameter guaranteed by design; it is not tested
2.
Fault condition includes: power limitation, overtemperature and open load off state detection.
100
20
300
110 mA
µs
µs
µs
µs
µs
Table 10.
Openload detection (8V<V
CC
<18V)
Symbol Parameter Test conditions
V
OL t
DSTKON
I
L(off2)r
I
L(off2)f td_vol
Openload off state voltage detection threshold
Output short circuit to
V
CC
detection delay at turn off
Off state output current at V
OUT
= 4V
Off state output current at V
OUT
= 2V
Delay response from output rising edge to
V
SENSE rising edge in openload
V
IN
= 0 V; V
SENSE
= 0 V
V
OUT rising from 0 V to 4 V
V
IN
= 0 V; V
SENSE
= V
SENSEH
V
OUT falling from V
CC
to 2V
V
OUT
= 4 V; V
V
SENSE
IN
= 0 V
= 90% of V
SENSEH
Min.
Typ.
Max.
Unit
2
180
-120
-50
4
1200 µs
0
90
20
V
µA
µA
µs
12/37
VNQ5E160AK-E
Figure 4.
Current sense delay characteristics
INPUT
CS_DIS
LOAD CURRENT
SENSE CURRENT t
DSENSE2H t
DSENSE1L
Electrical specifications
t
DSENSE1H t
DSENSE2L
Figure 5.
Openload off-state delay timing
OUTPUT STUCK TO V
CC
V
IN
V
OUT
> V
OL
V
SENSEH
V
CS t
DSTKON
Figure 6.
Switching characteristics
V
OUT t
Won
80% dV
OUT
/dt
(on) t r
INPUT t d(on)
10% t d(off) t
Woff
90% t f dV
OUT
/dt
(off) t t
13/37
Electrical specifications VNQ5E160AK-E
Figure 7.
Delay response time between rising edge of ouput current and rising edge of current sense (CS enabled)
V
IN
t
DSENSE2H t
I
OUT
90% I
OUTMAX
I
OUTMAX t
I
SENSE I
SENSEMAX
90% I
SENSEMAX t
Figure 8.
Output voltage drop limitation
Vcc-Vout
Tj=150 o
C
Tj=25 o
C
Tj=-40 o
C
Von
Von/Ron(T)
Iout
14/37
VNQ5E160AK-E
Note:
Electrical specifications
Figure 9.
I out
/ I sense
vs. I out
I out
/ I sense
700
650
600
550
500
450
max Tj = -40 °C to 150 °C max Tj = 25 °C to 150 °C min Tj = 25 °C to 150 °C
400
350
300
250
200
0,35
min Tj = -40 °C to 150 °C
0,58
typical value
0,81
I
OUT
(A)
1,04
Figure 10. Maximum current sense ratio drift vs load current dk/k(%)
15
1,27
10
5
0
-5
-10
-15
0,35 0,58 0,81
I
OUT
(A)
1,04
Parameter guaranteed by design; it is not tested.
1,27 1,5
1,5
15/37
Electrical specifications VNQ5E160AK-E
Table 11.
Truth table
Conditions
Normal operation
Overtemperature
Undervoltage
Overload
Input
L
H
L
H
L
H
H
H
Output
L
L
L
H
L
L
X
(no power limitation)
Cycling
(power limitation)
L
L
Sense (V
CSD
=0V)
(1)
0
Nominal
0
V
SENSEH
0
0
Nominal
V
SENSEH
Short circuit to GND
(power limitation)
Open load off state
(with external pull up)
Short circuit to V
CC
(external pull up disconnected)
Negative output voltage clamp
L
H
L
L
H
L
H
H
H
L
V
V
V
0
SENSEH
SENSEH
SENSEH
< Nominal
0
1.
If the V
CSD
is high, the SENSE output is at a high impedance, its potential depends on leakage currents and external circuit.
16/37
VNQ5E160AK-E Electrical specifications
Table 12.
Electrical transient requirements (part 1)
ISO 7637-2:
2004(E)
Test pulse
III
Test levels
(1)
IV
Number of pulses or test times
Burst cycle/pulse repetition time
Min.
Max.
1
2a
3a
3b
4
5b
(1)
1
2a
3a
3b
4
5b
(2)
-75V
+37V
-100V
+75V
-6V
+65V
C
C
C
C
C
C
-100V
+50V
-150V
+100V
-7V
+87V
5000 pulses
5000 pulses
1h
1h
1 pulse
1 pulse
0.5s
0.2s
90ms
90ms
1.
Valid in case of external load dump clamp: 40V maximum referred to ground.
Table 14.
Electrical transient requirements (part 3)
Class Contents
5s
5s
100ms
100ms
1.
The above test levels must be considered referred to V
CC
= 13.5V except for pulse 5b.
2.
Valid in case of external load dump clamp: 40V maximum referred to ground.
Table 13.
Electrical transient requirements (part 2)
ISO 7637-2:
2004E
Test pulse
III
Test level results
VI
C
C
C
C
C
C
C
E
Delays and
Impedance
2 ms, 10
50µs, 2
0.1µs, 50
0.1µs, 50
100ms, 0.01
400ms, 2
All functions of the device performed as designed after exposure to disturbance.
One or more functions of the device did not perform as designed after exposure to disturbance and cannot be returned to proper operation without replacing the device.
17/37
Electrical specifications
2.4 Waveforms
Figure 11. Normal operation
Normal operation
INPUT
Nominal load Nominal load
I
OUT
V
SENSE
V
CS_DIS
Figure 12. Overload or short to GND
Overload or Short to GND
INPUT
I
LimH
>
I
OUT
Power Limitation
I
LimL
>
Thermal cycling
V
SENSE
V
CS_DIS
VNQ5E160AK-E
18/37
VNQ5E160AK-E
Figure 13. Intermittent overload
Intermittent Overload
Electrical specifications
INPUT
I
LimH
>
I
OUT
V
SENSEH
>
V
SENSE
V
CS_DIS
Overload
I
LimL
>
Figure 14. Off-state open load with external circuitry
OFF-State Open Load with external circuitry
Nominal load
INPUT
V
OUT
I
OUT
V
SENSE
V
CS_DIS
V
OL
V
OUT
V
SENSEH
> t
DSTK(on)
> V
OL
19/37
Electrical specifications
Figure 15. Short to V
CC
Resistive
Short to V
CC
Short to V
CC
Hard
Short to V
CC
VNQ5E160AK-E
V
OUT
I
OUT
V
OL
V
OUT
> V
OL t
DSTK(on) t
DSTK(on)
V
CS_DIS
Figure 16. T
J
evolution in overload or short to GND
T
J
evolution in
Overload or Short to GND
INPUT
Self-limitation of fast thermal transients T
TSD
T
R
T
J
I
LimH
>
T
J_START
Power Limitation
T
HYST
< I
LimL
I
OUT
20/37
VNQ5E160AK-E Electrical specifications
Figure 17. Off state output current
Iloff (mA)
200
150
Off State
Vcc=13V
Vin=Vout=0V
100
50
0
-50 -25 0 25 50 75
Tc (°C)
100
Figure 19. Input clamp voltage
125 150 175
6,4
6,2
6
5,8
5,6
5,4
5,2
Vicl (V)
7
6,8
6,6
lin= 1 mA
5
-50 -25 0 25 50 75
Tc (°C)
100 125
Figure 21. Input high level voltage
150 175
Vih (V)
4
3,5
3
2,5
2
1,5
1
0,5
0
-50 -25 0 25 50 75
Tc (°C)
100 125 150 175
Figure 18. High level input current
4
3,5
3
2,5
2
1,5
1
Iih (µA)
5
4,5
Vin= 2.1 V
0,5
0
-50 -25 0 25 50 75
Tc (°C)
100 125
Figure 20. Input low level voltage
150 175
1,4
1,2
1
0,8
0,6
0,4
0,2
Vil (V)
2
1,8
1,6
0
-50 -25 0 25 50 75
Tc (°C)
100 125
Figure 22. Input hysteresis voltage
150 175
Vihyst (V)
1
0,9
0,8
0,7
0,6
0,5
0,4
0,3
0,2
0,1
0
-50 -25 0 25 50 75
Tc (°C)
100 125 150 175
21/37
Electrical specifications
Figure 23. On state resistance vs. T case
Ron (Ohm)
300
250
Iout= 1A
Vcc= 13V
200
150
100
50
-50 -25 0 25 50 75
Tc (°C)
100 125 150 175
Figure 25. Undervoltage shutdown
Vusd (V)
8
6
4
2
0
-50 -25 0 25 50 75
Tc (°C)
Figure 27. I
LIMH
vs. T case
100 125 150 175
Ilimh (A)
14
Vcc= 13 V
12
10
8
6
-50 -25 0 25 50
Tc (°C)
75 100 125 150
VNQ5E160AK-E
Figure 24. On state resistance vs. V
CC
Ron (Ohm)
300
Tc=150°C
250
Tc=125°C
200
150
Tc=25°C
100
Tc=-40°C
0 5 10 15 20
Vcc (V)
25
Figure 26. Turn-on voltage slope
30 35
(dVout/dt )On (V/ms)
1000
900
800
700
600
500
400
300
200
100
0
-50 -25 0
Vcc= 13 V
RI= 13 Ohm
25 50 75
Tc (°C)
100 125 150 175
Figure 28. Turn-off voltage slope
(dVout/dt )Off (V/ms)
1200
1100
1000
900
Vcc= 13 V
RI= 13 Ohm
800
700
600
500
-50 -25 0 25 50 75
Tc (°C)
100 125 150 175
22/37
VNQ5E160AK-E
Figure 29. CS_DIS high level voltage
3
2,5
2
1,5
1
0,5
Vcsdh (V)
4
3,5
0
-50 -25 0 25 50 75
Tc (°C)
100 125 150 175
Figure 31. CS_DIS low level voltage
Vcsdl (V)
3
2,5
2
1,5
1
0,5
0
-50 -25 0 25 50 75
Tc (°C)
100 125 150 175
Electrical specifications
Figure 30. CS_DIS clamp voltage
Vcsdcl(V)
10
9
8
7
Iin = 1 mA
6
5
4
3
-50 -25 0 25 50 75
Tc (°C)
100 125 150 175
23/37
Application information VNQ5E160AK-E
Figure 32. Application schematic
+5V
CU
V
CC
R prot
CS_DIS
R
R prot prot
C
EXT
R
SENSE
INPUT
CURRENT SENSE
GND
V
GND
R
GND
D
GND
OUTPUT
D ld
Note:
3.1
3.1.1
Channel 2, 3, 4 have the same internal circuit as channel 1.
GND protection network against reverse battery
This section provides two solutions for implementing a ground protection network against reverse battery.
Solution 1 : resistor in the ground line (R
GND
only)
This can be used with any type of load.
The following is an indication on how to dimension the R
GND resistor.
1.
R
GND
600mV / (I
S(on)max
)
2. R
GND
V
CC
) / (-I
GND
) where -I
GND
is the DC reverse ground pin current and can be found in the absolute maximum rating section of the device datasheet.
Power dissipation in R
GND
(when V
CC
<0: during reverse battery situations) is:
Equation 1
P
D
= (-V
CC
)
2
/R
GND
24/37
VNQ5E160AK-E
3.1.2
Application information
This resistor can be shared amongst several different HSDs. Please note that the value of this resistor should be calculated with formula (1) where I
S(on)max
becomes the sum of the maximum on-state currents of the different devices.
Please note that if the microprocessor ground is not shared by the device ground then the
R
GND will produce a shift (I
S(on)max
* R
GND
) in the input thresholds and the status output values. This shift will vary depending on how many devices are on in the case of several high side drivers sharing the same R
GND
.
If the calculated power dissipation leads to a large resistor or several devices have to share
the same resistor then ST suggests to utilize
Section 3.1.2: Solution 2 : diode (DGND) in the ground line
Solution 2 : diode (D
GND
) in the ground line
A resistor (R
GND
=1k
should be inserted in parallel to D inductive load.
GND
if the device drives an
This small signal diode can be safely shared amongst several different HSDs. Also in this case, the presence of the ground network will produce a shift (
600mV) in the input threshold and in the status output values if the microprocessor ground is not common to the device ground. This shift will not vary if more than one HSD shares the same diode/resistor network.
3.3
D ld
is necessary (voltage transient suppressor) if the load dump peak voltage exceeds the
V
CC
max DC rating. The same applies if the device is subject to transients on the V
CC
line that are greater than the ones shown in the ISO 7637-2: 2004(E) table.
MCU I/Os protection
If a ground protection network is used and negative transient are present on the V
CC
line, the control pins will be pulled negative. ST suggests to insert a resistor (R prot
) in line to prevent the µC I/Os pins to latch-up.
The value of these resistors is a compromise between the leakage current of µC and the current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of µC
I/Os:
Equation 2
-V
CCpeak
/I latchup
R prot
(V
OH
C
-V
IH
-V
GND
) / I
IHmax
Calculation example:
For V
CCpeak
= - 100V and I latchup
20mA; V
OHµC
4.5V
5k
R prot
180k
Recommended values: R prot
=10k
, C
EXT
=10nF.
25/37
Application information
3.4 Current sense and diagnostic
VNQ5E160AK-E
The current sense pin performs a double function (see
Figure 33: Current sense and diagnostic
):
●
●
Current mirror of the load current in normal operation, delivering a current proportional to the load one according to a know ratio
K
X
.
The current I
SENSE
can be easily converted to a voltage V
SENSE
by means of an external resistor R
SENSE
. Linearity between I
OUT
and V
SENSE
is ensured up to 5V minimum (see parameter V
SENSE
Table 9: Current sense (8V<V
<18V)
). The current sense accuracy depends on the output current (refer to current sense electrical characteristics
Table 9: Current sense (8V<V
<18V)
).
Diagnostic flag in fault conditions, delivering a fixed voltage V
SENSEH
up to a maximum current I
SENSEH
in case of the following fault conditions (refer to
Truth table
):
– Power limitation activation
– Over-temperature
– Short to V
CC
in off state
– Open load in off state with additional external components.
A logic level high on CS_DIS pin sets at the same time all the current sense pins of the device in a high impedance state, thus disabling the current monitoring and diagnostic detection. This feature allows multiplexing of the microcontroller analog inputs by sharing of sense resistance and ADC line among different devices.
Figure 33. Current sense and diagnostic
V
BAT
V
PU
I
OUT
/K
X
CS_DIS
41V
I
SENSEH
R
PROT
To uC ADC
R
SENSE
CURRENT
SENSEn
V
SENSEH
V
SENSE
V
CC
Main MOSn
PU_CMD
Overtemperature
OL OFF
Pwr_Lim
INPUTn
+
-
R
PU
V
OL
OUTn
I
Loff2r
I
Loff2f
GND
R
PD
Load
26/37
VNQ5E160AK-E Application information
3.4.1 Short
CC
and off state open load detection
Short to V
CC
A short circuit between V
CC and output is indicated by the relevant current sense pin set to
V
SENSEH
during the device off state. Small or no current is delivered by the current sense during the on state depending on the nature of the short circuit.
Off state open load with external circuitry
Detection of an open load in off mode requires an external pull-up resistor R
PU
connecting the output to a positive supply voltage V
PU
.
It is preferable V
PU
to be switched off during the module stand-by mode in order to avoid the overall stand-by current consumption to increase in normal conditions, i.e. when load is connected.
An external pull down resistor R
PD
connected between output and GND is mandatory to
avoid misdetection in case of floating outputs in off state (see
Figure 33: Current sense and diagnostic
).
R
PD
must be selected in order to ensure V
OUT
< circuitry:
V
OLmin
unless pulled up by the external
Equation 3
V
OUT
Pull
up
_
OFF
R
PD
I
L
(
off
2 )
f
V
OL
min
2
V
R
PD
22K
is recommended.
For proper open load detection in off state, the external pull-up resistor must be selected according to the following formula:
Equation 4
V
OUT
Pull
up
_
ON
R
PD
V
PU
R
R
PU
PU
R
PD
R
PD
I
L
(
off
2 )
r
V
OL
max
4
V
For the values of V
OLmin
,V
OLmax
, I
L(off2)r and I
L(off2)f
Table 10: Openload detection
(8V<V
<18V)
27/37
Application information
3.5 Maximum demagnetization energy (V
CC
VNQ5E160AK-E
Figure 34. Maximum turn-off current versus inductance (for each channel)
100
= 13.5V)
10
A
C
B
1
0,1
0,1 1 L (mH) 10 100
A: T jstart
= 150°C single pulse
B: T jstart
= 100°C repetitive pulse
C: T jstart
= 125°C repetitive pulse
V
IN
, I
L
Demagnetization Demagnetization Demagnetization
Note:
t
Values are generated with R
L
= 0
In case of repetitive pulses, T jstart
(at beginning of each demagnetization) of every pulse must not exceed the temperature specified above for curves A and B.
28/37
VNQ5E160AK-E
4
Package and PC board thermal data
Package and PC board thermal data
4.1 PowerSSO-24 thermal data
Figure 35. PowerSSO-24 PC board
Note: Layout condition of R th
and Z th
measurements (PCB: Double layer, Thermal Vias, FR4 area= 77 mm x 86 mm, PCB thickness=1.6 mm, Cu thickness=70 mm (front and back side),
Copper areas: from minimum pad lay-out to 8 cm
2
).
Figure 36. R thj-amb
vs. PCB copper area in open box free air condition (one channel ON)
RTHj_amb(°C/W)
60
55
50
45
40
35
30
0 2 4 6
PCB Cu heatsink area (cm^2)
8 10
29/37
Package and PC board thermal data VNQ5E160AK-E
Figure 37. PowerSSO-24 thermal impedance junction ambient single pulse (one channel ON)
ZTH (°C/W)
1000
100
10
1
0.1
0.0001
0.001
0.01
0.1
Time (s)
1 10 100 1000
Figure 38. Thermal fitting model of a double channel hsd in PowerSSO-24
(a)
Footprint
2 cm
2
8 cm
2
30/37
VNQ5E160AK-E
Equation 5
: pulse calculation formula
:
Z
TH
= R
TH
where
= t
P
/T
Package and PC board thermal data
THtp
1 –
Table 15.
Thermal parameters
Area/island (cm
2
)
R1 = R7 = R9 = R11 (°C/W)
R2 = R8 = R10 = R12 (°C/W)
R3 (°C/W)
R4 (°C/W)
R5 (°C/W)
R6 (°C/W)
C1 = C7 = C9 = C11 (W.s/°C)
C2 = C8 = C10 = C12 (W.s/°C)
C3 (W.s/°C)
C4 (W.s/°C)
C5 (W.s/°C)
C6 (W.s/°C)
Footprint
1.2
6
6
7.7
9
28
0.0008
0.0016
0.025
0.75
1
2.2
2
4
5
9
17
8
8
10
9
17 a.
The fitting model is a semplified thermal tool and is valid for transient evolutions where the embedded protections (power limitation or thermal cycling during thermal shutdown) are not triggered.
31/37
Package and packing information
5 Package and packing information
VNQ5E160AK-E
5.1 ECOPACK
®
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com
.
ECOPACK® is an ST trademark.
Figure 39. PowerSSO-24 package dimensions
32/37
VNQ5E160AK-E Package and packing information
Table 16.
PowerSSO-24 mechanical data
(1) (2)
Millimeters
Symbol
Min.
Typ.
A
A2 a1 b c
D
(3)
E
(3) e
2.15
0
0.33
0.23
10.10
7.40
e3
F
G
H h k
L
10.1
0.8
8.8
2.3
0°
0.6
O
Q
S
T
1.2
0.8
2.9
3.65
1.0
U
N
X
Y
4.1
6.5
1.
No intrusion allowed inwards the leads.
2.
Flash or bleeds on exposed die pad shall not exceed 0.5 mm per side
3.
“D and E” do not include mold flash or protusions.
Mold flash or protusions shall not exceed 0.15 mm per side
0.1
10.5
0.4
8°
1
Max.
2.45
2.35
0.1
0.51
0.32
10.50
7.60
10°
4.7
7.1
33/37
Package and packing information VNQ5E160AK-E
Figure 40. PowerSSO-24 tube shipment (no suffix)
C
B
Base q.ty
Bulk q.ty
49
1225
Tube length (± 0.5)
532
A
3.5
B
C (± 0.1)
13.8
0.6
All dimensions are in mm.
A
Figure 41. PowerSSO-24 tape and reel shipment (suffix “TR”)
Reel dimensions
Base q.ty
Bulk q.ty
A (max)
B (min)
C (± 0.2)
F
G (+ 2 / -0)
N (min)
T (max)
1000
1000
330
1.5
13
20.2
24.4
100
30.4
Tape dimensions
According to Electronic Industries Association
(EIA) standard 481 rev. A, Feb 1986
Tape width
Tape hole spacing
Component spacing
Hole diameter
Hole diameter
Hole position
Compartment depth
Hole spacing
W
P0 (± 0.1)
24
4
P
12
D (± 0.05)
1.55
D1 (min)
F (± 0.1)
K (max)
P1 (± 0.1)
1.5
11.5
2.85
2
All dimensions are in mm.
End
Top cover tape
Start
No components Components No components
500mm min 500mm min
Empty components pockets saled with cover tape.
User direction of feed
34/37
VNQ5E160AK-E Order codes
Table 17.
Device summary
Package
PowerSSO-24
Tube
VNQ5E160AK-E
Order codes
Tape and reel
VNQ5E160AKTR-E
35/37
Revision history VNQ5E160AK-E
Table 18.
Document revision history
Date Revision
05-Jun-2007 1
17-Mar-2009
19-Sep-2013
2
3
Changes
Initial release.
Document restructured.
Updated
Table 9: Current sense (8V<V
<18V)
– added k0, k1, k2, k3, dk1/k1, dk2/k2, dk3/k3,
t
:
DSENSE2H parameters values
Updated
Table 10: Openload detection (8V<V
:
– added I
L(off2)r
, I
L(off2)f and td_vol parameters
Added
Figure 9.: Iout/ Isense vs. Iout
.
Added
Figure 10.: Maximum current sense ratio drift vs load current
Added
Added
Section 2.5: Electrical characteristics curves
Updated
Chapter 3: Application information
– added
Section 3.4: Current sense and diagnostic
Added
Chapter 4: Package and PC board thermal data
Updated
Table 16: PowerSSO-24 mechanical data
Updated Disclaimer
36/37
VNQ5E160AK-E
Please Read Carefully:
Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice.
All ST products are sold pursuant to ST’s terms and conditions of sale.
Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein.
No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such third party products or services or any intellectual property contained therein.
UNLESS OTHERWISE SET FORTH IN ST’S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR IMPLIED
WARRANTY WITH RESPECT TO THE USE AND/OR SALE OF ST PRODUCTS INCLUDING WITHOUT LIMITATION IMPLIED
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DOMAINS ACCORDING TO ST PRODUCT DESIGN SPECIFICATIONS. PRODUCTS FORMALLY ESCC, QML OR JAN QUALIFIED ARE
DEEMED SUITABLE FOR USE IN AEROSPACE BY THE CORRESPONDING GOVERNMENTAL AGENCY.
Resale of ST products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever, any liability of ST.
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Information in this document supersedes and replaces all information previously supplied.
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37/37
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