STMicroelectronics VND5E012MY-E Datasheet
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VND5E012MY-E
Double channel high-side driver with analog current sense for automotive applications
Datasheet
-
production data
PowerSSO-36
– Load current limitation
– Self limiting of fast thermal transients
– Protection against loss of ground and loss of V
CC
– Overtemperature shutdown with auto restart (thermal shutdown)
– Reverse battery protection with self switch on of the Power MOSFET
– Electrostatic discharge protection
Features
Max transient supply voltage
Operating voltage range V
CC
Max on-state resistance (per ch.) R
ON
Current limitation (typ)
V
CC
Off-state supply current
I
LIMH
I
S
41V
4.5 to 28V
12 m Ω
74 A
2 µA
(1)
1.
Typical value with all loads connected.
Applications
• All types of resistive, inductive and capacitive loads
• Suitable as LED driver
•
General
– Inrush current active management by power limitation
– Very low standby current
– 3.0V CMOS compatible inputs
– Optimized electromagnetic emissions
– Very low electromagnetic susceptibility
– In compliance with the 2002/95/EC european directive
– Very low current sense leakage
•
Diagnostic functions
– Proportional load current sense
– High current sense precision for wide current range
– Current sense disable
– Overload and short to ground (power limitation) indication
– Thermal shutdown indication
•
Protections
– Undervoltage shutdown
– Overvoltage clamp
Description
The VND5E012MY-E is a double channel highside driver manufactured in the
STMicroelectronics
®
VIPower
®
M0-5 technology and housed in the tiny PowerSSO-36 package.
The VND5E012MY-E is designed to drive 12 V automotive grounded loads delivering protection, diagnostics and easy 3 V and 5 V CMOS compatible interface with any microcontroller.
The device integrates advanced protective functions such as load current limitation, inrush and overload active management by power limitation, overtemperature shut-off with auto restart and over-voltage active clamp. A dedicated analog current sense pin is associated with every output channel in order to provide
Enhanced diagnostic functions including fast detection of overload and short-circuit to ground through power limitation indication and overtemperature indication.
The current sensing and diagnostic feedback of the whole device can be disabled by pulling the
CS_DIS pin high to allow sharing of the external sense resistor with other similar devices.
October 2013
This is information on a product in full production.
DocID16503 Rev 5 1/36 www.st.com
Contents
Contents
VND5E012MY-E
Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Current sense and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Maximum demagnetization energy (VCC = 13.5V) . . . . . . . . . . . . . . . . . 25
Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
PowerSSO-36 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
® package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
PowerSSO-36 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
2/36 DocID16503 Rev 5
VND5E012MY-E
List of tables
List of tables
CC
<18V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
DocID16503 Rev 5 3/36
3
List of figures
List of figures
VND5E012MY-E
Delay response time between rising edge of output current and rising edge of current sense
/I
SENSE
vs I
OUT
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
evolution in overload or short to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
case
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
vs T case
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Rthj-amb vs PCB copper area in open box free air condition (one channel ON) . . . . . . . . 27
PowerSSO-36 thermal impedance junction ambient single pulse (one channel ON). . . . . 27
Thermal fitting model of a double channel HSD in PowerSSO-36
(1)
. . . . . . . . . . . . . . . . . 28
4/36 DocID16503 Rev 5
VND5E012MY-E
1
Block diagram and pin description
Block diagram and pin description
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Name
V
CC
OUT
1,2
GND
IN
1,2
CS
1,2
CS_DIS
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Table 1. Pin function
Function
Battery connection
Power output
Ground connection
Voltage controlled input pin with hysteresis, CMOS compatible. Controls output switch state
Analog current sense pin, delivers a current proportional to the load current
Active high CMOS compatible pin, to disable the current sense pin
DocID16503 Rev 5 5/36
35
Block diagram and pin description
Figure 2. Configuration diagram (top view)
VND5E012MY-E
OUT1 - 1
OUT1 - 2
OUT1 - 3
OUT1 4
OUT1 - 5
OUT1 - 6
OUT1 - 7
OUT1 - 8
OUT1 - 9
OUT1 -10
N.C. - 11
N.C - 12
IN1 - 13
N.C. - 14
CS1 - 15
N.C. - 16
N.C. - 17
GND - 18
36 - OUT2
35 - OUT2
34 - OUT2
33 - OUT2
32 - OUT2
31 - OUT2
30 - OUT2
29 - OUT2
28 - OUT2
27 - OUT2
26 - N.C.
25 - N.C.
24 - IN2
23 - N.C.
22 - CS2
21 - N.C.
20 - N.C.
19 - CS_DIS.
TAB = V
CC
GAPGRI00288
Table 2. Suggested connections for unused and not connected pins
Connection / pin
Current Sense N.C.
Output Input CS_DIS
Floating
To ground
Not allowed
Through 1 K Ω resistor
X
X
X
Not allowed
X
Through 10 K Ω resistor
X
Through 10 K Ω resistor
6/36 DocID16503 Rev 5
VND5E012MY-E Electrical specifications
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Figure 3. Current and voltage conventions
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Applying stress which exceeds the ratings listed in the Table 3 may cause permanent
damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. Exposure to the conditions in this section for extended periods may affect device reliability.
Symbol
Table 3. Absolute maximum rating
Parameter
V
CC
V
CCPK
-V
CC
DC supply voltage
Transient supply voltage (T<400ms, R
LOAD
Reverse DC supply voltage
> 0.5
Ω
)
V
CC_LSC
Maximum supply voltage for full protection to short-circuit
(acc. AEC-Q100-012)
I
OUT
- I
OUT
I
IN
I
CSD
DC output current
Reverse DC output current
DC input current
DC current sense disable input current
V
CSENSE
Current sense maximum voltage
Value
28
41
16
18
Internally limited
50
-1 to 10
-1 to 10
V
CC
-41
+V
CC
E
MAX
Maximum switching energy (single pulse)
(L = 0.47 mH; R
L
= 0 Ω ; V bat
= 13.5 V; T jstart
= 150 ºC;
I
OUT
= I limL
(Typ.))
110
V mJ mA mA
V
V
A
A
Unit
V
V
V
DocID16503 Rev 5 7/36
35
Electrical specifications VND5E012MY-E
Symbol
V
ESD
V
ESD
T j
T stg
Table 3. Absolute maximum rating (continued)
Parameter Value
Electrostatic discharge
(Human Body Model: R=1.5K
Ω; C=100pF)
– V
CC,
OUTPUT
– INPUT, CS_DIS
– CURRENT SENSE
Charge device model (CDM-AEC-Q100-011)
Junction operating temperature
Storage temperature
5000
4000
2000
750
-40 to 150
-55 to 150
Unit
V
V
°C
°C
Symbol
Table 4. Thermal data
Parameter
R thj-case
Thermal resistance junction-case (MAX)
(with one channel ON)
R thj-amb
Thermal resistance junction-ambient (MAX)
Maximum value Unit
2 °C/W
in the thermal section
°C/W
8/36 DocID16503 Rev 5
VND5E012MY-E Electrical specifications
Values specified in this section are for 8V<V
CC
<28V; -40°C< T j
<150°C, unless otherwise specified.
Symbol Parameter
Table 5. Power section
Test conditions
V
CC
V
USD
Operating supply voltage
Undervoltage shutdown
V
USDhyst
Undervoltage shutdown hysteresis
R
ON
On-state resistance
I
OUT
= 5A; T j
= 25°C
I
OUT
= 5A; T j
= 150°C
I
OUT
= 5A; V
CC
= 5V; T j
= 25°C
R
ON REV
Reverse battery on-state resistance
V
CC
= -13V; I
OUT
= -5A; T j
= 25°C
V
I clamp
I
S
L(off)
Clamp voltage
Supply current
V
IN
=V
OUT
=V
SENSE
=V
CSD
=0V
On-state; V
CC
=13V; V
IN
=5V;
I
OUT
=0A
Off-state output current
(2)
V
IN
=V
OUT
=0V; V
CC
=13V;
T j
=25°C
V
IN
=V
OUT
=0V; V
CC
=13V;
T j
=125°C
1.
PowerMOS leakage included.
2.
For each channel.
I
S
= 20 mA
Off-state; V
CC
=13V; T j
=25°C;
Min.
Typ.
Max.
Unit
4.5
13 28
3.5
4.5
V
V
41
0.5
11
46
2
(1)
24
16
5
(1)
3.5
6.5
0 0.01
0
12
52
3
5
µA mA
µA
V m Ω m
Ω m Ω m Ω
V
Symbol t d(on) t d(off)
(dV
OUT
/dt) on
(dV
OUT
/dt) off
W
ON
W
OFF
Table 6. Switching (V
CC
= 13V; T j
= 25°C)
Parameter Test conditions Min.
Turn-on delay time
Turn-off delay time
R
L
= 2.6
Ω (see
R
L
= 2.6
Ω
(see
-
-
Turn-on voltage slope
Turn-off voltage slope
R
L
= 2.6
Ω
R
L
= 2.6
Ω -
-
Typ.
30
20
See
See
Switching energy losses during t
WON
R
L
= 2.6
Ω (see
)
Switching energy losses during t
WOFF
R
L
= 2.6
Ω (see
) -
1
0.5
Max.
Unit
-
-
-
-
-
µs
µs
V / µs
V / µs mJ mJ
DocID16503 Rev 5 9/36
35
Electrical specifications VND5E012MY-E
Symbol Parameter
Table 7. Logic inputs
Test conditions
V
V
I
IL
IL
V
IH
I
IH
I(hyst)
V
CSDL
I
CSDL
V
CSDH
I
CSDH
V
CSD(hyst)
V
V
ICL
CSCL
Input low level voltage
Low level input current
Input high level voltage
High level input current
Input hysteresis voltage
V
V
IN
IN
= 0.9V
= 2.1V
Input clamp voltage
I
IN
= 1mA
I
IN
= -1mA
CS_DIS low level voltage
Low level CS_DIS current
CS_DIS high level voltage
V
CSD
= 0.9V
High level CS_DIS current V
CSD
= 2.1V
CS_DIS hysteresis voltage
CS_DIS clamp voltage
I
CSD
= 1mA
I
CSD
= -1mA
Min.
Typ.
Max.
Unit
0.9
1
2.1
0.25
5.5
1
2.1
0.25
5.5
-0.7
-0.7
10
7
0.9
10
7
V
µA
V
µA
V
V
V
V
µA
V
µA
V
V
V
Table 8. Protections and diagnostics
(1)
Parameter Test conditions Min.
Typ.
Max.
Unit Symbol
I
T
I limH limL
TSD
DC short circuit current
V
CC
=13V
5V<V
CC
<18V
Short circuit current during thermal cycling
V
CC
=13V; T
R
<T j
<T
TSD
Shutdown temperature
52
150
74
18.5
175
104
104
200
A
A
A
°C
T
R
Reset temperature
T
RS
+
1
T
RS
+
5
T
RS
Thermal reset of status
T
HYST
V
DEMAG
Thermal hysteresis
(T
TSD
-T
R
)
Turn-off output voltage clamp
I
OUT
=2A; V
IN
=0; L=6mH
V
ON
Output voltage drop limitation
I
OUT
=0.4A; T j
=-40°C...150°C
(see
)
135
V
CC
28
V
7
CC
31
25
V
CC
35
-
1.
To ensure long term reliability under heavy overload or short circuit conditions, protection and related diagnostic signals must be used together with a proper software strategy. If the device is subjected to abnormal conditions, this software must limit the duration and number of activation cycles.
°C
°C
°C
V mV
10/36 DocID16503 Rev 5
VND5E012MY-E Electrical specifications
)
Symbol
K
0
K
1 dK
1
/K
1
(1)
K
2 dK
2
/K
2
(1)
K
3 dK
3
/K
3
(1)
I
SENSE0
Table 9. Current sense (8V<V
CC
<18V)
Parameter Test conditions Min.
Typ.
Max.
Unit
I
OUT
/I
SENSE
I
OUT
/I
SENSE
Current sense ratio drift
I
OUT
/I
SENSE
Current sense ratio drift
I
OUT
/I
SENSE
Current sense ratio drift
Analog sense leakage current
I
OUT
=0.25A; V
SENSE
=0.5V
T j
= -40°C...150°C
I
OUT
=5A; V
SENSE
=0.5V
T j
=-40°C...150°C
T j
=25°C...150°C
I
OUT
=5A; V
SENSE
= 0.5V;
V
CSD
=0V;
T
J
= -40 °C to 150 °C
I
OUT
=10A; V
SENSE
=4V
T j
=-40°C...150°C
T j
=25°C...150°C
I
OUT
= 10 A; V
SENSE
= 4 V;
V
CSD
=0V;
T
J
= -40 °C to 150 °C
I
OUT
=25A; V
SENSE
=4V
T j
=-40°C...150°C
T j
=25°C...150°C
I
OUT
= 25 A; V
SENSE
= 4 V;
V
CSD
= 0V;
T
J
= -40 °C to 150 °C
I
OUT
=0A; V
SENSE
=0V;
V
CSD
=5V; V
IN
=0V;
T j
=-40°C...150°C
V
CSD
=0V; V
IN
=5V;
T j
=-40°C...150°C
2615 5130 7770
4155
4530
5330
5330
6650
6130
-8
4705
4865
5290
5290
5950
5715
-5
4935
4985
5250
5250
5565
5515
-4
0
0
8
5
4
1
2
%
%
%
µA
µA
I
OUT
=5A; V
SENSE
=0V;
V
CSD
=V
IN
=5V; 0
V
I
V
SENSE
SENSEH
SENSEH
Max analog sense output voltage
Analog sense output voltage in fault condition
(2)
Analog sense output current in fault condition
(2)
I
OUT
V
V
CC
CC
=15A; V
=13V; R
=13V; V
CSD
=0V 5
SENSE
SENSE
=10K
=5V
Ω t
DSENSE1H t
DSENSE1L
Delay response time from falling edge of CS_DIS pin
V
SENSE
<4V, 1.5A<Iout<25A
I
SENSE
=90% of I
SENSE max
(see
)
Delay response time from rising edge of CS_DIS pin
V
SENSE
<4V, 1.5A<Iout<25A
I
SENSE
=10% of I
SENSE max
(see
)
8
9
50
5
1
100
20
µA
V
V mA
µs
µs
DocID16503 Rev 5 11/36
35
Electrical specifications VND5E012MY-E
Symbol
Table 9. Current sense (8V<V
CC
<18V) (continued)
Parameter Test conditions t
DSENSE2H
Delay response time from rising edge of INPUT pin
V
SENSE
<4V, 1.5A<Iout<25A
I
SENSE
=90% of I
SENSE max
(see
)
Δ t
DSENSE2H t
DSENSE2L
Delay response time between rising edge of output current and rising edge of current sense
V
SENSE
< 4V,
I
SENSE
= 90% of I
SENSEMAX,
I
OUT
= 90% of I
OUTMAX
I
OUTMAX
Delay response time from falling edge of INPUT pin
V
SENSE
<4V, 1.5A<Iout<25A
I
SENSE
=10% of I
SENSE max
(see
)
1.
Parameter guaranteed by design; it is not tested.
2.
Fault condition includes: power limitation and overtemperature.
Min.
Typ.
Max.
Unit
70 300
300
100 250
µs
µs
µs
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12/36 DocID16503 Rev 5
VND5E012MY-E
Figure 5. Switching characteristics
Electrical specifications
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DocID16503 Rev 5 13/36
35
Electrical specifications VND5E012MY-E
Figure 6. Delay response time between rising edge of output current and rising edge of current sense (CS enabled)
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14/36 DocID16503 Rev 5
VND5E012MY-E Electrical specifications
Figure 8. I
OUT
/I
SENSE
vs I
OUT
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DocID16503 Rev 5 15/36
35
Electrical specifications VND5E012MY-E
Conditions
Normal operation
Overtemperature
Undervoltage
Overload
Table 10. Truth table
Input
L
H
L
H
L
H
H
H
Output
L
L
L
H
L
L
X
(no power limitation)
Cycling
(power limitation)
L
L
Sense (V
CSD
=0V)
(1)
0
Nominal
0
V
SENSEH
0
0
Nominal
V
SENSEH
Short circuit to GND
(Power limitation)
Negative output voltage clamp
L
H
L L
V
0
SENSEH
0
1.
If the V
CSD
is high, the SENSE output is at a high impedance, its potential depends on leakage currents and external circuit.
16/36 DocID16503 Rev 5
VND5E012MY-E Electrical specifications
ISO 7637-2:
2004(E)
Test pulse
Table 11. Electrical transient requirements (part 1)
III
Test levels
(1)
IV
Number of pulses or test times
Burst cycle/pulse repetition time
Delays and impedance
1
2a
-75 V
+37 V
-100 V
+50 V
5000 pulses
5000 pulses
0.5 s
0.2 s
5 s
5 s
2 ms, 10
50 µs, 2
Ω
Ω
3a
3b
4
5b
(2)
-100 V
+75 V
-6 V
+65 V
-150 V
+100 V
-7 V
+87 V
1h
1h
1 pulse
1 pulse
90 ms
90 ms
100 ms
100 ms
0.1 µs, 50 Ω
0.1 µs, 50 Ω
100 ms, 0.01
Ω
400 ms, 2
Ω
1.
The above test levels must be considered referred to V
CC
= 13.5 V except for pulse 5b.
2.
Valid in case of external load dump clamp: 40V maximum referred to ground. The protection strategy allows PowerMOS to be cyclically switched on during load dump, so distributing the load dump energy along the time and to transfer a part of it to the load.
ISO 7637-2:
2004(E)
Test pulse
Table 12. Electrical transient requirements (part 2)
III
Test level results
(1)
IV
1
2a
3a
3b
4
5b
(2)(3)
C
C
C
C
C
C
C
C
C
C
C
C
1.
The above test levels must be considered referred to V
CC
= 13.5 V except for pulse 5b
2.
Valid in case of external load dump clamp: 40V maximum referred to ground. The protection strategy allows PowerMOS to be cyclically switched on during load dump, so distributing the load dump energy along the time and to transfer a part of it to the load.
3.
Suppressed load dump (pulse 5b) is withstood with a minimum load connected as specified in
Table 3: Absolute maximum rating .
Class
C
E
Table 13. Electrical transient requirements (part 3)
Contents
All functions of the device are performed as designed after exposure to disturbance.
One or more functions of the device are not performed as designed after exposure to disturbance and cannot be returned to proper operation without replacing the device.
DocID16503 Rev 5 17/36
35
Electrical specifications
2.4 Waveforms
VND5E012MY-E
Figure 10. Normal operation
1RUPDORSHUDWLRQ
18/36
,1387
,
287
9
6(16(
9
&6B',6
1RPLQDOORDG 1RPLQDOORDG
$*9
Figure 11. Overload or short to GND
2YHUORDGRU6KRUWWR*1'
,1387
,
,
287
9
6(16(
9
&6B',6
3RZHU/LPLWDWLRQ
,
/LP/
7KHUPDOF\FOLQJ
$*9
DocID16503 Rev 5
VND5E012MY-E
Figure 12. Intermittent overload
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Electrical specifications
,1387
,
/LP+
!
,
287
9
6(16(+
!
9
6(16(
9
&6B',6
2YHUORDG
,
/LP/ !
1RPLQDOORDG
Figure 13. T
J
evolution in overload or short to GND
$*9
, ,
, ,
DocID16503 Rev 5
*$3*5,
19/36
35
Electrical specifications VND5E012MY-E
Figure 14. Off-state output current
Iloff [nA]
3000
2500
2000
1500
1000
500
0
-50 -25 0 25 50 75
Tc [°C]
100 125 150 175
Figure 16. Input clamp voltage
6.4
6.2
6
5.8
5.6
Vicl [V]
7
6.8
6.6
5.4
5.2
5
-50
Iin= 1m A
-25 0 25 50 75
Tc [°C]
100 125 150 175
Figure 18. Input low level voltage
1
0.8
0.6
0.4
0.2
0
-50
Vil [V]
2
1.8
1.6
1.4
1.2
-25 0 25 50 75
Tc [°C]
100 125 150 175
Figure 15. High level input current
3.5
3
2.5
2
1.5
Iih [uA]
5
4.5
4
1
0.5
0
-50 -25
Vin= 2.1V
0 25 50 75
Tc [°C]
100 125 150 175
Figure 17. Input high level voltage
Vih [V]
4
3.5
3
2.5
2
1.5
1
0.5
0
-50 -25 0 25 50 75
Tc [°C]
100 125 150 175
Figure 19. Input hysteresis voltage
Vihyst [V]
1
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
-50 -25 0 25 50 75
Tc [°C]
100 125 150 175
20/36 DocID16503 Rev 5
VND5E012MY-E Electrical specifications
Figure 20. On-state resistance vs T case
Ron [m Ohm ]
50
45
40
35
30
25
20
15
10
5
0
-50 -25
Iout= 5A
Vcc= 13V
0 25 50 75
Tc [°C]
100 125 150 175
Figure 22. Undervoltage shutdown
Vusd [V]
16
14
12
10
8
6
4
2
0
-50 -25 0 25 50 75
Tc [°C]
100 125 150 175
Figure 24. Turn-on voltage slope
(dVout/dt)On [V/m s]
1000
900
800
700
600
500
400
300
200
100
0
-50 -25 0
Vcc= 13V
Rl= 2.6
Ω
25 50 75
Tc [°C]
100 125 150 175
Figure 21. On-state resistance vs V
CC
Ron [m Ohm ]
24
20
16
Tc= 150°C
Tc= 125°C
12
8
4
0
0 5 10 15 20
Vcc [V]
25
Tc= 25°C
Tc= -40°C
30 35 40
Figure 23. I
LIMH
vs T case
70
60
50
40
Ilim h [A]
90
80 Vcc= 13V
30
-50 -25 0 25 50 75
Tc [°C]
100 125 150 175
Figure 25. Turn-off voltage slope
(dVout/dt)Off [V/m s]
1000
900
800
700
600
500
400
300
200
100
0
-50 -25 0
Vcc= 13V
Rl= 2.6
Ω
25 50 75
Tc [°C]
100 125 150 175
DocID16503 Rev 5 21/36
35
Electrical specifications VND5E012MY-E
Figure 26. CS_DIS clamp voltage
Vcsdcl [V]
10
9
6
5
8
7
4
3
2
1
0
-50 -25 0 25
Iin= 1m A
50 75
Tc [°C]
100 125 150 175
Figure 28. High level CS_DIS voltage
Vcsdh [V]
4
3.5
3
2.5
2
1.5
1
0.5
0
-50 -25 0 25 50 75
Tc [°C]
100 125 150 175
Figure 27. Low level CS_DIS voltage
Vcsdl [V]
4
3.5
3
2.5
2
1.5
1
0.5
0
-50 -25 0 25 50 75
Tc [°C]
100 125 150 175
22/36 DocID16503 Rev 5
VND5E012MY-E Application information
Note:
3.1
3.2
Figure 29. Application schematic
9
9
&&
5
SURW
&6B',6
'
OG
P & 5
SURW
5
SURW
,,1387
&855(176(16(
287387
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5
6(16(
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*$3*&)7
Channel 2 has the same internal circuit as channel 1.
Load dump protection
D ld
is necessary (Voltage Transient Suppressor) if the load dump peak voltage exceeds the
V
CCPK
max rating. The same applies if the device is subject to transients on the V
CC
line that are greater than the ones shown in the ISO 7637-2: 2004(E) table.
MCU I/Os protection
When negative transients are present on the V
CC
line, the control pin is pulled negative to approximately -1.5 V. ST suggests to insert a resistor (R prot
) in line to prevent the microcontroller I/Os pins from latching-up.
The value of these resistors is a compromise between the leakage current of microcontroller and the current required by the HSD I/Os (input levels compatibility) with the latch-up limit of microcontroller I/Os.
Equation 1 v ccpeak
⁄
l latchup
≤
R prot
≤ (
V
OH μ C
–
V
IH
) ⁄
l
IHmax
Calculation example:
For V
CCpeak
= - 1.5 V; I latchup
≥
20 mA; V
OH μ C
≥
4.5 V
75
Ω ≤
R prot
≤
240 k
Ω
.
DocID16503 Rev 5 23/36
35
Application information
Recommended values: R prot
=10 k
Ω,
C
EXT
=10 nF .
3.3
VND5E012MY-E
Current sense and diagnostic
The current sense pin performs a double function (see
Figure 30: Current sense and diagnostic
):
• Current mirror of the load current in normal operation, delivering a current proportional to the load one according to a know ratio K
X
.
The current I
SENSE
can be easily converted to a voltage V
SENSE
by means of an external resistor R
SENSE
. Linearity between I
OUT
and V
SENSE
is ensured up to 5V minimum (see parameter V
SENSE
in Table 9: Current sense (8V<VCC<18V)
). The current sense accuracy depends on the output current (refer to current sense electrical characteristics
Table 9: Current sense (8V<VCC<18V)
).
•
Diagnostic flag in fault conditions, delivering a fixed voltage V
SENSEH
up to a maximum current I
SENSEH
in case of the following fault conditions (refer to
):
– Power limitation activation
– Overtemperature
A logic level high on CS_DIS pin sets at the same time all the current sense pins of the device in a high impedance state, thus disabling the current monitoring and diagnostic detection. This feature allows multiplexing of the microcontroller analog inputs by sharing of sense resistance and ADC line among different devices.
Figure 30. Current sense and diagnostic
V
BAT
V
CC
Main MOSn
41V
Overtemperature
I
OUT
/K
X
I
SENSEH
Pwr_Lim
OUTn
CS_DIS
R
PROT
To uC ADC
R
SENSE
CURRENT
SENSEn
V
SENSEH
V
SENSE
GND
Load
24/36 DocID16503 Rev 5
VND5E012MY-E
3.4 Maximum demagnetization energy (V
CC
Application information
= 13.5V)
Figure 31. Maximum turn-off current versus inductance
100
10
1
1
91[(6L QJOH3XOVH
5HSHWLWLYHSXOVH7MVWDUW &
VNx5E012 - Single Pulse
5HSHWLWLYHSXOVH7MVWDUW &
Repetitive pulse Tjstart=100°C
Repetitive pulse Tjstart=125°C
/P+
L (mH)
)
10
7
100
9
,1
,
/
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Note:
U
*$3*5,
Values are generated with R
L
= 0 Ω.
In case of repetitive pulses, T jstart
(at beginning of each demagnetization) of every pulse must not exceed the temperature specified above for curves A and B.
DocID16503 Rev 5 25/36
35
Package and PCB thermal data
4 Package and PCB thermal data
4.1 PowerSSO-36 thermal data
Figure 32. PowerSSO-36 PC board
VND5E012MY-E
Note:
$*9
Layout condition of R th
and Z th
measurements (PCB: Double layer, Thermal Vias, FR4 area= 129mm x 60mm, PCB thickness=1.6mm, Cu thickness=70 μ m (front and back side),
Copper areas: from minimum pad lay-out to 8 cm
2
).
26/36 DocID16503 Rev 5
VND5E012MY-E Package and PCB thermal data
Figure 33. R thj-amb
vs PCB copper area in open box free air condition (one channel
ON)
57+MBDPE&:
57+MDPE
57+MDPE
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Figure 34. PowerSSO-36 thermal impedance junction ambient single pulse (one channel ON)
=7+&:
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&X FP
&X IRR WSULQW 5
'
7LPHV
*$3*5,
DocID16503 Rev 5 27/36
35
Package and PCB thermal data VND5E012MY-E
Figure 35. Thermal fitting model of a double channel HSD in PowerSSO-36
(1)
28/36
*$3*&)7
1.
The fitting model is a simplified thermal tool and is valid for transient evolutions where the embedded protections (power limitation or thermal cycling during thermal shutdown) are not triggered.
Equation 2: pulse calculation formula
Z
TH
δ
= R
TH
⋅ δ
+ Z
THtp
(
1 –
δ ) where
δ
= t p
⁄ T
R1 (°C/W)
R2 (°C/W)
R3 (°C/W)
R4 (°C/W)
R5 (°C/W)
R6 (°C/W)
R7 (°C/W)
R8 (°C/W)
C1 (W.s/°C)
C2 (W.s/°C)
C3 (W.s/°C)
C4 (W.s/°C)
C5 (W.s/°C)
C6 (W.s/°C)
Table 14. Thermal parameter
Area/island (cm
2
) Footprint
0.3
0.0025
0.005
0.04
0.5
1
3
0.1
0.3
5
8
18
27
0.1
2
10
23
2
6
8
10
14
2
9
DocID16503 Rev 5
VND5E012MY-E Package and PCB thermal data
C7 (W.s/°C)
C8 (W.s/°C)
Table 14. Thermal parameter
Area/island (cm
2
) Footprint
0.0025
0.005
2 8
DocID16503 Rev 5 29/36
35
Package information VND5E012MY-E
5.1 ECOPACK
® package
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
®
packages, depending on their level of environmental compliance. ECOPACK
® specifications, grade definitions and product status are available at: www.st.com
.
ECOPACK
®
is an ST trademark.
30/36 DocID16503 Rev 5
VND5E012MY-E
5.2 PowerSSO-36 mechanical data
Package information
Figure 36. PowerSSO-36 package dimensions
DocID16503 Rev 5
("1($'5
31/36
35
Package information
l
Symbol
G1
H h
L e e3
G
N
X
Y
A
A2 a1 b c
D
E
Table 15. PowerSSO-36 mechanical data
Millimeters
Min.
-
10.1
-
0.55
-
-
-
-
4.1
6.5
2.15
2.15
0
0.18
0.23
10.10
7.4
Typ.
-
-
-
-
0.5
8.5
-
-
-
-
-
-
-
-
-
-
-
VND5E012MY-E
Max.
-
-
0.1
0.06
10.5
0.4
0.85
10 deg
4.7
7.1
2.47
2.40
0.075
0.36
0.32
10.50
7.6
32/36 DocID16503 Rev 5
VND5E012MY-E Package information
Figure 37. PowerSSO-36 tube shipment (no suffix)
&
%
Base Q.ty
Bulk Q.ty
Tube length (± 0.5)
A
B
C (± 0.1)
49
1225
532
3.5
13.8
0.6
All dimensions are in mm.
$
*$3*&)7
Figure 38. PowerSSO-36 tape and reel shipment (suffix “TR”)
REEL DIMENSIONS
Base Q.ty
Bulk Q.ty
A (max)
B (min)
C (± 0.2)
F
G (+ 2 / -0)
N (min)
T (max)
1000
1000
330
1.5
13
20.2
24.4
100
30.4
TAPE DIMENSIONS
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb 1986
Tape width
Tape Hole Spacing
Component Spacing
Hole Diameter
Hole Diameter
Hole Position
Compartment Depth
Hole Spacing
W
P0 (± 0.1)
24
4
P 12
D (± 0.05) 1.55
D1 (min)
F (± 0.1)
K (max)
P1 (± 0.1)
1.5
11.5
2.85
2
All dimensions are in mm.
End
Top cover tape
No components
500mm min
Components No components
Empty components pockets saled with cover tape.
500mm min
User direction of feed
Start
DocID16503 Rev 5 33/36
35
Order codes VND5E012MY-E
Table 16. Device summary
Order codes
Package
Tube
PowerSSO-36 VND5E012MY-E
Tape and reel
VND5E012MYTR-E
34/36 DocID16503 Rev 5
VND5E012MY-E Revision history
Date
21-Oct-2009
04-Dec-2009
11-July-2012
19-Sep-2013
24-Oct-2013
Table 17. Document revision history
Revision Changes
1
2
3
4
5
Initial release.
Updated Section 4.1: PowerSSO-36 thermal data
Updated Figure 36: PowerSSO-36 package dimensions
Updated Disclaimer.
Updated footnote 2 into the
DocID16503 Rev 5 35/36
35
VND5E012MY-E
Please Read Carefully:
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All ST products are sold pursuant to ST’s terms and conditions of sale.
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No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such third party products or services or any intellectual property contained therein.
UNLESS OTHERWISE SET FORTH IN ST’S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR IMPLIED
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DOMAINS ACCORDING TO ST PRODUCT DESIGN SPECIFICATIONS. PRODUCTS FORMALLY ESCC, QML OR JAN QUALIFIED ARE
DEEMED SUITABLE FOR USE IN AEROSPACE BY THE CORRESPONDING GOVERNMENTAL AGENCY.
Resale of ST products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever, any liability of ST.
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Information in this document supersedes and replaces all information previously supplied.
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