STMicroelectronics STA516BE Datasheet
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STA516BE
Datasheet
500 W FFX digital amplifier power stage
PowerSO-36 with exposed pad up
Maturity status link
STA516BE
Device summary
Order code
Operating temperature range
Package
Packing
STA516BETR
0 to 90 °C
PowerSO-36 (EPU)
Tape and reel
Features
• Output Power at 56 V supply voltage
– 2 x 250 W at 10% THD + N into 6 Ω BTL
– 2 x 200 W at 10% THD + N into 8 Ω BTL
– 4 x 130 W at 10% THD + N into 3 Ω SE
– 4 x 100 W at 10% THD + N into 4 Ω SE
– 1 x 480 W at 10% THD + N into 3 Ω PBTL
– 1 x 380 W at 10% THD + N into 2 Ω PBTL
• Output Power at 52 V supply voltage
– 2 x 200 W at 10% THD + N into 6 Ω BTL
– 4 x 100 W at 10% THD + N into 3 Ω SE
– 1 x 400 W at 10% THD + N into 2 Ω PBTL
• < 0.1% THD + N at 1 W
• PSO-36 thermally enhanced package
• Minimum input / output pulse width distortion
• High efficiency power stage (> 90%) with 190 mΩ RdsON
• CMOS compatible logic inputs
• Integrated self protection circuits including overtemperature, undervoltage, overvoltage, overload, short-circuit
• EMI compliant when used with recommended system design
• Automatic recovery mode after fault conditions
Applications
• Home theater
• DVD receiver
• Mini / Micro Audio systems
Description
The STA516BE is a monolithic quad half-bridge stage in multipower BCD technology.
The device can be used as dual-bridge or reconfigured, by connecting pin CONFIG to pins VDD, as a single-bridge with double-current capability or as a half-bridge
(binary mode) with half-current capability.
A cost-effective, high fidelity audio system can be designed using ST chipset, including a modulator (e.g. the STA309A or STA321) and the STA516BE . This system only requires a simple passive LC demodulation filter to deliver high-quality, high efficiency audio amplification with prove EMI compliance. The efficiency of this digital amplifier is greater than 90% into 8 Ω speakers, enabling the use of smaller power supplies and heatsinks.
The STA516BE has an innovative integrated protection system, safeguarding the device against different fault conditions that could damage the overall system.
DS10283 - Rev 3 - November 2020
For further information contact your local STMicroelectronics sales office.
www.st.com
1
STA516BE
General information
General information
The STA516BE is a second generation, high performance, integrated stereo digital amplifier power stage with improved protection system. It is capable of driving a 6 W bridge tied load (BTL) at up 250 W per channel with very low noise at the output, low THD+N and low idle power dissipation.
The STA516BE is available in PowerSO-36 slug up package.
The package contains a heat slug that is located on the top side of the device for convenient thermal coupling to the heatsink.
DS10283 - Rev 3 page 2/23
STA516BE
Pin description
2 Pin description
VCC_SIGN
VCC_SIGN
VSS
VSS
IN2B
IN2A
IN1B
IN1A
TH_WARN
FAULT
TRISTATE
PWRDN
CONFIG
VL
VDD
VDD
GND_REG
GND_CLEAN
Figure 1. Pin out (top view)
26
25
24
30
29
28
27
36
35
34
33
32
31
23
22
21
20
19
STA516BE
11
12
13
14
15
8
9
6
7
10
16
17
18
1
4
5
2
3
SUB_GND
OUT2B
OUT2B
VCC2B
GND2B
GND2A
VCC2A
OUT2A
OUT2A
OUT1B
OUT1B
VCC1B
GND1B
GND1A
VCC1A
OUT1A
OUT1A
N.C.
Pin
1
2, 3
4
5
6
7
8, 9
10, 11
12
13
14
15
16, 17
18
19
20
21, 22
23
Name
GND_SUB
OUT2B
VCC2B
GND2B
GND2A
VCC2A
OUT2A
OUT1B
VCC1B
GND1B
GND1A
VCC1A
OUT1A
N.C.
GND_CLEAN
GND_REG
VDD
VL
Type
PWR
O
PWR
PWR
PWR
PWR
O
O
PWR
PWR
PWR
PWR
O
-
PWR
PWR
PWR
PWR
Table 1. Pin function
Description
Substrate ground
Output half bridge 2B
Positive supply
Negative supply
Negative supply
Positive supply
Output half bridge 2A
Output half bridge 1B
Positive supply
Negative supply
Negative supply
Positive supply
Output half bridge 1A
No internal connection
Logical ground
Ground for regulator V
DD
5-V regulator referred to ground
High logical state setting voltage, V
L
DS10283 - Rev 3 page 3/23
DS10283 - Rev 3
Pin
24
Name
CONFIG
25
26
27
28
29
30
31
32
33, 34
35, 36
PWRDN
TRISTATE
FAULT
TH_WARN
IN1A
IN1B
IN2A
IN2B
VSS
VCC_SIGN
STA516BE
Pin description
Type
I
I
I
O
O
I
I
I
I
PWR
PWR
Description
Configuration pin:
0: normal operation
1: bridges in parallel (OUT1A = OUT1B, OUT2A = OUT2B (If IN1A
= IN1B, IN2A = IN2B))
Standby pin:
0: low-power mode
1: normal operation
Hi-Z pin:
0: all power amplifier outputs in high impedance state
1: normal operation
Fault pin advisor (open-drain device, needs pull-up resistor):
0: fault detected (short circuit or thermal, for example)
1: normal operation
Thermal warning advisor (open-drain device, needs pull-up resistor):
0: temperature of the IC >130 °C
1: normal operation
Input of half bridge 1A
Input of half bridge 1B
Input of half bridge 2A
Input of half bridge 2B
5-V regulator referred to +V
CC
Signal positive supply page 4/23
STA516BE
Electrical characteristics
3 Electrical characteristics
Symbol
V
CC_MAX
V max
T j_MAX
T stg
Table 2. Absolute maximum ratings
Parameter
DC supply voltage (pins 4, 7, 12, 15)
Maximum voltage on pins 23 to 32
Operating junction temperature
Storage temperature
Value
65
5.5
0 to 150
-40 to 150
Unit
V
V
°C
°C
Caution: Stresses beyond those listed under “Absolute maximum ratings” make cause permanent damage to the device.
These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “Recommended operating condition” are not implied. Exposure to absolute-maximumrated conditions for extended periods may affect device reliability. In the real application, power supply with nominal value rated inside recommended operating conditions, may experience some rising beyond the maximum operating condition for short time when no or very low current is sinked (amplifier in mute state). In this case the reliability of the device is guaranteed, provided that the absolute maximum rating is not exceeded.
Symbol
T j-case
T warn
T jSD t hSD
Table 3. Thermal data
Parameter
Thermal resistance junction to case (thermal pad)
Thermal warning temperature
Thermal shut-down junction temperature
Thermal shut-down hysteresis
Min.
-
-
-
-
Typ.
1
130
150
25
Max.
2.5
-
-
-
Unit
°C/W
°C
°C
°C
Symbol
V
CC
T amb
Table 4. Recommended operating conditions
Parameter
Supply voltage for pins PVCCA, PVCCB
Ambient operating temperature
Min.
10
0
Typ.
-
-
Max.
60
90
Unit
V
°C
DS10283 - Rev 3 page 5/23
STA516BE
Electrical characteristics
DS10283 - Rev 3
Unless otherwise stated, the test conditions for
Table 5. Electrical characteristics
below are V
L
= 3.3 V,
V
CC
= 50 V and T amb
= 25 °C
Symbol
R dsON
I dss g
N g
P
Dt_s
Dt_d t d ON t d OFF t r t f
V
IN-High
Parameter
Power P-channel/Nchannel MOSFET R dsON
Power P-channel/Nchannel leakage Idss
Power P-channel R dsON matching
Power N-channel R dsON matching
Low current dead time
(static)
Table 5. Electrical characteristics
Test conditions
-
I dd
= 1 A
I dd
= 1 A
I dd
= 1 A
High current dead time
(dynamic)
Turn-on delay time
Turn-off delay time
Rise time
Fall time
L = 22 µH, C = 470 nF R
L
= 8 Ω,
I dd
= 4.5 A
see Figure 3. Current dead-time test circuit
Resistive load
Resistive load
Resistive load
Resistive load
High level input voltage -
V
IN-Low
Low level input voltage -
I
V
I
I
IN-H
V
IN-L
PWRDN-H
Low
High
I
VCC-
PWRDN
High level input current
Low level input current
High level PWRDN pin input current
Low logical state voltage
(pins PWRDN, TRISTATE)
(see Table 6. Threshold switching voltage variation with voltage on pin VL )
High logical state voltage
(pins PWRDN, TRISTATE)
(see Table 6. Threshold switching voltage variation with voltage on pin VL )
Supply current from V
CC
in power down
V
IN
= V
L
V
IN
= 0.3 V
V
L
= 3.3 V
V
L
= 3.3 V
V
L
= 3.3 V
V
PWRDN
= 0 V
Min.
95
95
-
-
-
-
-
-
-
-
-
-
V
L
/ 2 -
300 mV
-
-
-
0.8
Typ.
190
-
-
-
-
-
-
-
-
-
10
-
1
1
35
-
-
-
Max.
240
50
-
-
20
50
100
100
25
25
V
L
/ 2 +
300 mV
-
-
-
-
1.7
2.4
Unit mΩ
µA
%
% ns ns ns
V
V
V mA
V
µA
µA
µA ns ns ns page 6/23
DS10283 - Rev 3
STA516BE
Electrical characteristics
I
Symbol t
I
VCC-HiZ
I
FAULT
I
V
V
VCC
OCP
UVP
OVP pw_min
Parameter Test conditions
Output current on pins
FAULT, TH_WARN with fault condition
Supply current from V
CC
in tristate
V
V pin
= 3.3 V
TRISTATE
= 0 V
Supply current from V
CC in operation, both channels switching)
Input pulse width = 50% duty, switching frequency = 384 kHz, no LC filters
Overcurrent protection threshold I sc
(short-circuit current limit)
Undervoltage protection threshold
Overvoltage protection threshold
Output minimum pulse width
-
-
-
No load
1. See specific application note number: AN1994
Min.
-
Typ.
1
Max.
-
Unit mA
-
-
8.5
-
61
50
22
70
9.5
7
62.5
-
-
-
11
-
110
Table 6. Threshold switching voltage variation with voltage on pin VL
Voltage on pin VL, V
L
2.7
3.3
5.0
V
LOW
max.
1.05
1.4
2.2
V
HIGH
min.
1.65
1.95
2.8
Unit
V
V
V mA mA
A
V
V ns
Pin TRISTATE
1
1
0
1
1
Inputs as per
Figure 3. Current dead-time test circuit
INxA x
INxB x
1
1
0
0
0
1
0
1
Table 7. Logic truth table
Transistors as per
Figure 3. Current dead-time test circuit
Q1
Off
Off
Off
On
On
Q2
Off
Off
On
Off
On
Q3
Off
On
On
Off
Off
Q4
Off
On
Off
On
Off
Output mode
Hi Z
Dump
Negative
Positive
Not used page 7/23
3.1
STA516BE
Test circuits
Test circuits
M58
M57
Figure 2. Test circuit
OUTxY
Low current dead time = MAX(DTr, DTf)
Duty cycle = 50%
INxY
+Vcc
OUTxY t
DTr
R 8 W
DTf
+
-
V67 = vdc = Vcc/2
Vcc
(3/4)Vcc
(1/2)Vcc
(1/4)Vcc gnd
Duty cycle=A
DTin(A)
INxA
Figure 3. Current dead-time test circuit
High Current Dead time for Bridge application = ABS(DTout(A)-DTin(A))+ABS(DTOUT(B)-DTin(B))
+V
CC
M58
M57
DTout(A)
Q1
OUTxA
Q3
Iout=4.5A
L67 22
C69
470nF
Rload=8 8
C71 470nF
DTout(B)
OUTxB
Q2
L68 22
Iout=4.5A
C70
470nF
Q4
Duty cycle A and B: Fixed to have DC output current of 4.5A in the direction shown in figure
M64
M63
Duty cycle=B
DTin(B)
INxB
D00AU1162
DS10283 - Rev 3 page 8/23
4
STA516BE
Power supply and control sequencing
Power supply and control sequencing
To guarantee correct operation and reliability, the recommended power-on sequence as given below should be followed:
• Apply V
CC
and V
L
, in any order, keeping PWRDN low in this phase
•
•
Release PWRDN from low to high, keeping TRISTATE low (until V
DD
and V
SS
are stable)
Release TRISTATE from low to high
Always maintain PWM inputs INxy < V
L
.
Figure 4. Power-ON sequence
V
CC should be turned on before V diode connected between V
L
L
. This prevents uncontrolled current flowing through the internal protection
(logic supply) and V
CC
(high power supply). which could result in damage to the device.
PWRDN must be released after V
L
is switched on. An input signal can then be sent to the power stage.
DS10283 - Rev 3 page 9/23
Figure 5. Power-OFF sequence
STA516BE
Power supply and control sequencing
DS10283 - Rev 3 page 10/23
5
5.1
STA516BE
Technical information
Technical information
The STA516BE is a dual channel H-bridge that is able to deliver 200 W per channel (into R
L
= 6 W with
THD = 10% and V
CC
= 51 V) of audio output power very efficiently. It operates in conjunction with a pulse-width modulator driver such as the STA321 or STA309A.
The STA516BE converts ternary, phase-shift or binary-controlled PWM signals into audio power at the load. It includes a logic interface, integrated bridge drivers, high efficiency MOSFET outputs and thermal and short-circuit protection circuitry.
In differential mode (ternary, phase-shift or binary differential), two logic level signals per channel are used to control high-speed MOSFET switches to connect the speaker load to the input supply or to ground in a bridge configuration, according to the damped ternary modulation operation.
In binary mode, both full bridge and half bridge modes are supported. The STA516BE includes overcurrent and thermal protection as well as an undervoltage lockout with automatic recovery. A thermal warning status is also provided.
Figure 6. Block diagram of full-bridge FFX ® or binary mode
I NL[1,2]
I N R[1,2]
V L
PWRDN
TRISTATE
FAULT
THWARN
Logic interface and decode
Protection
Left
H-bridge
Right
H-bridge
OUTPL
OUTNL
OUTPR
OUTNR
Regulators
INL[1,2]
INR[1,2]
VL
PWRDN
TRISTATE
FAULT
THWARN
Figure 7. Block diagram of binary half-bridge mode
Logic interface and decode
Protec tion
Left A
½-bridge
Left B
½-bridge
Right A
½-bridge
Right B
½-b rid ge
Regulators
OUTP L
OUTN L
OUTP R
OUTN R
Logic interface and decode
The STA516BE power outputs are controlled using one or two logic-level timing signals. In order to provide a proper logic interface, the VL input must operate at the same voltage as the FFX control logic supply.
DS10283 - Rev 3 page 11/23
5.2
5.3
5.4
5.5
STA516BE
Protection circuitry
Protection circuitry
•
•
The STA516BE includes protection circuitry for overcurrent and thermal overload conditions. A thermal warning pin (THWARN, pin 28, open drain MOSFET) is activated low when the IC temperature exceeds 130 °C, just in advance of thermal shutdown. When a fault condition is detected an internal fault signal immediately disables the output power MOSFETs, placing both H-bridges in a high-impedance state. At the same time the opendrain
MOSFET of pin FAULT (pin 27) is switched on.
There are two possible modes subsequent to activating a fault.
• Shutdown mode : with pins FAULT (with pull-up resistor) and TRISTATE separate, an activated fault disables the device, signaling a low at pin FAULT output.
• The device may subsequently be reset to normal operation by toggling pin TRISTATE from high to low to high using an external logic signal.
•
•
Automatic recovery mode: This is shown in the applications circuits below where pins FAULT and
TRISTATE are connected together to a timeconstant circuit (R59 and C58).
An activated fault forces a reset on pin TRISTATE causing normal operation to resume following a delay determined by the time constant of the circuit.
If the fault condition persists, the circuit operation repeats until the fault condition is cleared.
An increase in the time constant of the circuit produces a longer recovery interval. Care must be taken in the overall system design not to exceed the protection thresholds under normal operation.
Power outputs
The STA516BE power and output pins are duplicated to provide a low-impedance path for the device bridged outputs. All duplicate power, ground and output pins must be connected for proper operation.
The PWRDN or TRISTATE pin should be used to set all power MOSFETs to the highimpedance state during power-up until the logic power supply, V
L
, has settled.
Parallel output / high current operation
When using the FFX mode output, the STA516BE outputs can be connected in parallel in order to increase the output current capability to a load. In this configuration the STA516BE can provide up to 240 W into a 3 Ω load.
This mode of operation is enabled with the pin CONFIG (pin 24) connected to pin VDD. The inputs are joined so that IN1A = IN1B, IN2A = IN2B and similarly the outputs OUT1A = OUT1B, OUT2A = OUT2B as shown in
Figure 8. Typical audio application circuit (dual BTL) .
Output filtering
A passive 2nd-order filter is used on the STA516BE power outputs to reconstruct the analog audio signal. System performance can be significantly affected by the output filter design and choice of passive components. A filter
, and for 3 or 4 Ω loads in
DS10283 - Rev 3 page 12/23
6
STA516BE
Audio application circuits
Audio application circuits
per channel into a 6 Ω load at 10% THD with V
CC
= 52 V. This result was obtained using the STA309A+STA516B demo board.
IN2B
IN2B
GNDSUB
Figure 8. Typical audio application circuit (dual BTL)
+3.3V
R57
10K
PWRDN
R59
10K
IN1A
IN1A
V
L
CONFIG
PWRDN
FAULT
TRI-STATE
C58
100nF
TH_WAR
TH_WAR
C58
100nF
IN1B
C53
100nF
C60
100nF
V
CC
SIGN
V
CC
SIGN
IN2A
IN2A
GND-Reg
GND-Clean
IN1B
V
DD
V
DD
V
SS
V
SS
35
20
19
36
31
25
27
26
29
23
24
28
30
21
22
33
34
32
1
PROTECTIONS
&
LOGIC
REGULATORS
M3
M2
M5
M4
M17
M15
M16
M14
15
17
16
14
12
11
10
13
V
CC
1A
C30
1 F
OUT1A
OUT1A
GND1A
V
CC
1B
OUT1B
OUT1B
GND1B
7
8
9
6
V
CC
2A
C32
1 F
OUT2A
OUT2A
GND2A
4 V
CC
2B
3
2
5
OUT2B
OUT2B
GND2B
C31
1 F
C33
1 F
L18 22 H
C52
330pF
C20
100nF
R98
6
R63
20
R100
6
C21
100nF
L19 22 H
L113 22 H
C110
100nF
C109
330pF R103
6
R104
20
R102
6
C111
100nF
L112 22 H
C99
100nF
C23
470nF
C101
100nF
C107
100nF
C108
470nF
C106
100nF
8 8
8 8
+V
CC
C55
1000 F
D00AU1148B
Figure 9. Typical Mono-BTL (PBTL) configuration
below shows a single-BTL configuration capable of giving
400 W into a 3 Ω load at 10% THD with V
CC
= 52 V. STA516BE can also drive 2 Ω speakers as single-BTL configuration, to provide up to 280 W per channel at 10% THD with V
CC
= 37 V.
capable of giving 110 W into a 3 Ω load at 10% THD with V
CC
= 54 V. STA516BE can also drive 2 Ω speakers as quad-SE configuration, to provide up to 80 W per channel at 10% THD with V
CC
= 38 V.
All results were obtained using the STA309A+STA516B demo board. Note that a PWM modulator as driver is required to feed the STA516BE.
DS10283 - Rev 3 page 13/23
DS10283 - Rev 3
STA516BE
Audio application circuits
+3.3V
TH_WAR
10K nPWRDN
IN1A
IN1B
100nF
100nF
X7R
10K
100nF
100nF
X7R
100nF
X7R
Add.
GND-Clean
GND-Reg
V
DD
V
DD
CONFIG
TH_WAR
PWRDN
FAULT
TRI-STATE
IN1A
IN1B
IN2A
IN2B
V
SS
V
SS
Figure 9. Typical Mono-BTL (PBTL) configuration
VL
V
CC
SIGN
23
29
30
31
32
33
34
28
25
21
22
24
27
26
19
20
35
4
14
13
9
8
3
2
18
17
16
11
10
15
12
7
N.C.
OUT1A
OUT1A
OUT1B
OUT1B
OUT2A
OUT2A
OUT2B
OUT2B
V
CC
1A
V
CC
1B
V
CC
2A
V
CC
2B
GND1A
GND1B
22 8
1/2W
1 F
X7R
1 F
X7R
12 H
330pF
12 H
6.2
1/2W
6.2
1/2W
V
CC
SIGN
GNDSUB
36
1
6
5
GND2A
GND2B
100nF
FILM
100nF
FILM
100nF
X7R
680nF
FILM
100nF
X7R
2200 F
63V
+36V
+36V
D04AU1545
4 8
Figure 10. Typical quad half-bridge configuration (Quad Single Ended)
+3.3V
IN1A
IN1A
VL
CONFIG
TH_WAR
C58
100nF
R57
10K
PWRDN
R59
10K
PWRDN
FAULT
C58
100nF
TRI-STATE
TH_WAR
IN1B
IN1B
C53
100nF
C60
100nF
V
CC
SIGN
V
CC
SIGN
IN2A
IN2A
GND-Reg
V
DD
V
DD
V
SS
V
SS
GND-Clean
28
30
21
22
33
34
35
20
19
36
31
25
27
26
29
23
24
IN2B
IN2B
GNDSUB
32
1
PROTECTIONS
&
LOGIC
REGULATORS
M3
M2
M5
M4
M17
M15
M16
M14
V
CC
1P
15
17
16
14
OUTPL
OUTPL
PGND1P
12
11
10
13
V
CC
1N
C51
1 F
OUTNL
OUTNL
PGND1N
7 V
CC
2P
8
9
6
OUTPR
OUTPR
PGND2P
4
3
2
5
V
CC
2N
C52
1 F
OUTNR
OUTNR
PGND2N
D03AU1474
R41
20
C41
330pF
C61
100nF
R42
20
C42
330pF
R43
20
C43
330pF
C62
100nF
R44
20
C44
330pF
L11 22 H
C71
100nF
R51
6
L12 22 H
C72
100nF
R52
6
L13 22 H
C73
100nF
R53
6
L14 22 H
C74
100nF
R54
6
C81
100nF
C82
100nF
C83
100nF
C84
100nF
R61
5K
R62
5K
R63
5K
R64
5K
R65
5K
R66
5K
R67
5K
R68
5K
C31 820 F
C91
1 F
C32 820 F
C92
1 F
C33 820 F
C93
1 F
C34 820 F
C94
1 F
4 8
4 8
4 8
4 8
For more information, refer to the application note AN1994.
+V
CC
C21
2200 F page 14/23
7
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Package information
Package information
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com
. ECOPACK is an ST trademark.
DS10283 - Rev 3 page 15/23
7.1
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PowerSO-36 exposed pad up package information
PowerSO-36 exposed pad up package information
Figure 11. PowerSO-36 exposed pad up outline drawing
DS10283 - Rev 3 page 16/23
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PowerSO-36 exposed pad up package information
Figure 12. PowerSO-36 section A-A and B-B package outline
DS10283 - Rev 3
Symbol
A3
A4 b b1 c c1
Ɵ
Ɵ1
Ɵ2
A
A1
A2
Table 8. PowerSO-36 package mechanical data mm
Typ.
Min.
0°
5°
0°
0.30
3.10
0.80
0.22
0.22
0.23
0.23
3.14
0.2
0.25
Max.
8°
10°
3.41
0.40
3.18
1.00
0.41
0.38
0.32
0.29
page 17/23
DS10283 - Rev 3
STA516BE
PowerSO-36 exposed pad up package information
Symbol e
E
E1
E2
E3
D
D1
D2
D3
L2
N
R
R1 s h
L
L1
Symbol
D1
E2
Min.
mm
Typ.
15.90 BSC
VARIATIONS
5.00
0.65 BSC
14.20 BSC
11.00 BSC
VARIATIONS
0.80
1.60 REF
0.35 BSC
36
0.20
0.20
0.25
Symbol aaa bbb ccc ddd eee ggg
Note
Table 9. Tolerance of form and position
Databook
0.10
0.30
0.075
0.25
0.10
0.25
1.2
Table 10. Variations
Databook
Typ.
Min.
9.40
5.80
Max.
9.80
6.20
Max.
1.00
2.90
1.10
1.10
Opt.
A page 18/23
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Revision history
Date
02-Apr-2014
05-Jun-2020
16-Nov-2020
Revision
1
2
3
Table 11. Document revision history
Changes
Initial release.
Updated part number in device summary on the cover page.
Updated Section 7.1 PowerSO-36 exposed pad up package information
.
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Contents
Contents
DS10283 - Rev 3 page 20/23
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List of tables
List of tables
DS10283 - Rev 3 page 21/23
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List of figures
List of figures
DS10283 - Rev 3 page 22/23
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IMPORTANT NOTICE – PLEASE READ CAREFULLY
STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement.
Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of
Purchasers’ products.
No license, express or implied, to any intellectual property right is granted by ST herein.
Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product.
ST and the ST logo are trademarks of ST. For additional information about ST trademarks, please refer to www.st.com/trademarks . All other product or service names are the property of their respective owners.
Information in this document supersedes and replaces information previously supplied in any prior versions of this document.
© 2020 STMicroelectronics – All rights reserved
DS10283 - Rev 3 page 23/23
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