STL19N3LLH6AG
Datasheet
Automotive-grade N-channel 30 V, 23 mΩ typ., 10 A, STripFET™ H6
Power MOSFET in a PowerFLAT 5x6 package
G(4)
D(5, 6, 7, 8)
S(1, 2, 3)
1
2
3
4
PowerFLAT™ 5x6
8 7 6 5
1 2 3 4
Top View
NG4D5678S123
Features
Order code
STL19N3LLH6AG
V
DS
30 V
• AEC-Q101 qualified
• Very low on-resistance
• Very low gate charge
• High avalanche ruggedness
• Low gate drive power loss
• Logic level
• Wettable flank package
R
DS(on)
max.
33 mΩ
I
D
10 A
P
TOT
50 W
Applications
• Switching applications
Description
This device is an N-channel Power MOSFET developed using the STripFET™ H6 technology with a new trench gate structure. The resulting Power MOSFET exhibits very low R
DS(on)
in all packages.
Product status link
STL19N3LLH6AG
Product summary
Order code STL19N3LLH6AG
Marking
Package
Packing
19N3LLH6
PowerFLAT 5x6
Tape and reel
DS12507 - Rev 1 - April 2018
For further information contact your local STMicroelectronics sales office.
www.st.com
1
STL19N3LLH6AG
Electrical ratings
Electrical ratings
Table 1. Absolute maximum ratings
Symbol
V
DS
V
GS
Drain-source voltage
Gate-source voltage
Parameter
I
D
(1)
Drain current (continuous) at T case
= 25 °C
Drain current (continuous) at T case
= 100 °C
Drain current (pulsed) I
DM
(2)
P
TOT
T stg
T j
Total dissipation at T case
= 25 °C
Storage temperature range
Operating junction temperature range
1. Current limited by package. At T case
= 25 °C the silicon is able to sustain 30 A.
2. Pulse width limited by safe operating area.
Table 2. Thermal data
Symbol
R thj-case
R thj-pcb
(1)
Parameter
Thermal resistance junction-case
Thermal resistance junction-pcb
1. When mounted on an 1-inch² FR-4, 2 Oz copper board, t< 10 s.
Table 3. Avalanche characteristics
Symbol
I
AV
(1)
E
AS
(2)
Parameter
Avalanche current, repetitive or not repetitive
Single pulse avalanche energy
1. Pulse width limited by T jmax
2. Starting T j
= 25 °C, I
D
= I
AV
, V
DD
= 25 V
Value
30
±20
10
10
40
50
-55 to 175
A
A
W
°C
Unit
V
V
Value
3
31.3
Value
10
130
Unit
°C/W
Unit
A mJ
DS12507 - Rev 1 page 2/14
2
STL19N3LLH6AG
Electrical characteristics
Electrical characteristics
(T case
= 25 °C unless otherwise specified)
Table 4. Static
Symbol
V
(BR)DSS
V
R
I
I
DSS
GSS
GS(th)
DS(on)
Parameter Test conditions
Drain-source breakdown voltage V
GS
= 0 V, I
D
= 1 mA
V
GS
= 0 V, V
DS
= 30 V
Zero gate voltage drain current
Gate-body leakage current
V
GS
= 0 V, V
DS
= 30 V,
T case
= 125 °C (1)
V
DS
= 0 V, V
GS
= ±20 V
Gate threshold voltage
Static drain-source on-resistance
V
DS
= V
GS
, I
D
= 250 µA
V
GS
= 10 V, I
D
= 5 A
V
GS
= 4.5 V, I
D
= 5 A
1. Defined by design, not subject to production test.
Min.
30
Typ.
Max.
1
Unit
V
µA
1
23
33
100
±100
2.5
33
43
µA nA
V mΩ
Symbol
C iss
C oss
C rss
Q g
Q gs
Q gd
Parameter
Input capacitance
Output capacitance
Reverse transfer capacitance
Total gate charge
Gate-source charge
Gate-drain charge
Table 5. Dynamic
V
V
DS
GS
Test conditions
= 25 V, f = 1 MHz,
= 0 V
V
DD
= 15 V, I
D
= 10 A,
V
GS
= 0 to 4.5 V
(see
Figure 13. Test circuit for gate charge behavior
)
Min.
-
-
-
-
-
-
Typ.
321
68
34
3.7
1
1.7
Max.
-
-
-
-
-
-
Unit pF nC
Symbol t d(on) t r t d(off) t f
Parameter
Turn-on delay time
Rise time
Turn-off delay time
Fall time
Table 6. Switching times
Test conditions
V
DD
= 15 V, I
D
= 5 A,
R
G
= 4.7 Ω, V
GS
= 10 V
(see
Figure 12. Test circuit for resistive load switching times and
Figure 17. Switching time waveform
)
Min.
-
-
-
-
Typ.
2.4
2.5
12.8
2.5
Max.
-
-
-
-
Unit ns
Symbol
I
SD
I
SDM
(1)
Parameter
Source-drain current
Source-drain current (pulsed)
Table 7. Source-drain diode
Test conditions Min.
-
-
Typ.
Max.
10
40
Unit
A
A
DS12507 - Rev 1 page 3/14
STL19N3LLH6AG
Electrical characteristics
Symbol
V
SD
(2)
t rr
I
Q rr
RRM
Parameter
Forward on voltage
Reverse recovery time
Reverse recovery charge
Reverse recovery current
1. Pulse width is limited by safe operating area.
2. Pulse test: pulse duration = 300 µs, duty cycle 1.5%.
Test conditions
V
GS
= 0 V, I
SD
= 10 A
I
SD
= A, di/dt = 100 A/µs,
V
DD
= 24 V
(see
Figure 14. Test circuit for inductive load switching and diode recovery times
)
Min.
-
-
-
-
Typ.
Max.
1.12
15.1
7.5
Unit
V ns nC
1 A
DS12507 - Rev 1 page 4/14
STL19N3LLH6AG
Electrical characteristics (curves)
2.1
Electrical characteristics (curves)
Figure 1. Safe operating area
I
D
(A) Operation in this area is limited by R
DS(on)
GADG230320181058SOA t p
=100 µs
10 1 t p
=1 ms
10 0
Single pulse, T
C
= 25 °C,
T
J
≤ 175 °C t p
=10 ms
10 -1
10 -1 10 0 10 1
V
DS
(V)
I
D
(A)
32
Figure 3. Output characteristics
GADG230320181059OCH
V
GS
= 6, 7, 8, 9, 10 V
V
GS
= 5 V
24
16
V
GS
= 4 V
8
V
GS
= 3 V
0
0 1 2 3 4 5 6 V
DS
(V)
Figure 5. Gate charge vs gate-source voltage
V
GS
(V)
12
GIPG1409156L30A1DQVG
V
DS
= 15 V, I
D
= 10 A
10
8
6
4
2
0
0 1 2 3 4 5 6 7 Q g
(nC)
K
Figure 2. Thermal impedance
GADG230320181058ZTH
δ = 0.5
10 -1
δ = 0.2
δ = 0.1
δ = 0.05
δ = 0.02
δ = 0.01
Single pulse
10 -2
10 -5 10 -4 10 -3 10 -2 t p
(s)
I
D
(A)
20
Figure 4. Transfer characteristics
GADG230320181059TCH
V
DS
= 6 V
16
12
8
4
0
1
T
J
= 175 °C
T
J
= 25 °C
1.5
2 2.5
3
T
J
= -40 °C
3.5
V
GS
(V)
Figure 6. Static drain-source on-resistance
R
DS(on)
(mΩ)
39
GADG230320181059RID
35
31
27
V
GS
= 4.5 V
V
GS
= 10 V
23
19
15
0 2 4 6 8 10 I
D
(A)
DS12507 - Rev 1 page 5/14
STL19N3LLH6AG
Electrical characteristics (curves)
C
(pF)
Figure 7. Capacitance variations
GIPG1409156L30A1DCVR
C
ISS
10 2
C
OSS
C
RSS f = 1 MHz
10 1
0 5 10 15 20 25 30 V
DS
(V)
Figure 8. Normalized gate threshold voltage vs temperature
V
GS(th)
(norm.)
GADG230320181100VTH
1.2
1 I
D
= 250 µA
0.8
0.6
0.4
0.2
-75 -25 25 75 125 175 T j
(°C)
Figure 9. Normalized on-resistance vs temperature
R
DS(on)
(norm.)
1.8
GADG230320181100RON
1.6
1.4
1.2
1
0.8
0.6
-75 -25
V
GS
= 10 V
25 75 125 175 T j
(°C)
Figure 10. Normalized V
(BR)DSS
vs temperature
V
(BR)DSS
(norm.)
1.12
GADG230320181100BDV
1.08
1.04
1
I
D
= 1 mA
0.96
0.92
0.88
-75 -25 25 75 125 175 T j
(°C)
Figure 11. Source-drain diode forward characteristics
V
SD
(V)
1
GADG230320181101SDF
0.9
Tj = -55 °C
Tj = 25 °C 0.8
0.7
0.6
0.5
0.4
0 2 4
Tj = 175 °C
6 8 10 I
SD
(A)
DS12507 - Rev 1 page 6/14
STL19N3LLH6AG
Test circuits
3
Test circuits
Figure 12. Test circuit for resistive load switching times
V
GS pulse width
V
D
R
G
R
L
+
2200
μF
3.3
μF
D.U.T.
V
DD
AM01468v1
Figure 14. Test circuit for inductive load switching and diode recovery times
Figure 13. Test circuit for gate charge behavior
12 V
V
GS pulse width
2200
μF
+
1 kΩ
I
G
= CONST
2.7 kΩ
47 kΩ
47 kΩ
100 nF
100 Ω
V
DD
1 kΩ
D.U.T.
V
G
AM01469v1
Figure 15. Unclamped inductive load test circuit
G
25 Ω
D
A
D.U.T.
S
B
+
_
R
G
A A fast diode
B
B
G
100 µH
D
D.U.T.
S
3.3
µF +
1000
µF
V
DD
AM01470v1
Figure 16. Unclamped inductive waveform
V (BR)DSS
V
D
I DM
I D
V DD V
DD
AM01472v1
V i pulse width
V
D
L
I
D
+
2200
µF
3.3
µF V
DD
D.U.T.
AM01471v1
Figure 17. Switching time waveform
0 t d(on) t on t r
90%
10%
V
GS
V
DS
90% t d(off) t off t f
90%
10%
0
10%
AM01473v1
DS12507 - Rev 1 page 7/14
4
4.1
STL19N3LLH6AG
Package information
Package information
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK ® packages, depending on their level of environmental compliance. ECOPACK ® specifications, grade definitions and product status are available at: www.st.com
. ECOPACK ® is an ST trademark.
PowerFLAT™ 5x6 WF type R package information
Figure 18. PowerFLAT™ 5x6 WF type R package outline
DS12507 - Rev 1
8231817_R_WF_Rev_15 page 8/14
DS12507 - Rev 1
Dim.
L1
ϴ
K
L
E7
E9
E10
E2
E3
E4
E5
E6 e
E
D2
D3
D4
D5
D6
A
A1
A2 b
C
D
STL19N3LLH6AG
PowerFLAT™ 5x6 WF type R package information
Table 8. PowerFLAT™ 5x6 WF type R mechanical data mm
Typ.
Min.
0.80
0.02
0.25
0.30
5.80
5.00
4.15
4.05
4.80
0.25
0.15
6.00
5.20
4.20
5.00
0.4
0.3
1.27
6.40
0.08
0.20
0.85
4.00
3.55
6.20
3.50
2.35
0.40
1.275
0.725
0.175
0°
0.325
1.00
4.20
3.70
0.825
0.275
Max.
1.00
0.05
0.50
6.10
5.40
4.45
4.35
5.10
0.55
0.45
0.28
0.45
1.15
4.40
3.85
6.60
3.70
2.55
0.60
1.575
0.925
0.375
12° page 9/14
STL19N3LLH6AG
PowerFLAT™ 5x6 WF packing information
Figure 19. PowerFLAT™ 5x6 recommended footprint (dimensions are in mm)
4.2
8231817_FOOTPRINT_rev15
PowerFLAT™ 5x6 WF packing information
T
0.30 0.05
Figure 20. PowerFLAT™ 5x6 WF tape (dimensions are in mm)
Do
+ 0.1
1.50
0.0
P2
2.0
0.05(I)
Y
Po
4.0 0.1(II)
D1
1.50 MIN
E1
1.75 0.1
R0.30
MAX
Ko (1.20±0.1)
SECTION Y-Y
(I)
(II)
(III)
Measured from centreline of sprocket hole to centreline of pocket.
Cumulative tolerance of 10 sprocket holes is ± 0.20 .
Measured from centreline of sprocket hole to centreline of pocket.
P1(8.00±0.1)
Y
Ao(6.70±0.1)
Base and bulk qua ntity 3000 pcs
8234350_TapeWF_rev_C
DS12507 - Rev 1 page 10/14
STL19N3LLH6AG
PowerFLAT™ 5x6 WF packing information
Pin 1 identification
Figure 21. PowerFLAT™ 5x6 package orientation in carrier tape
Figure 22. PowerFLAT™ 5x6 reel (dimensions are in mm)
DS12507 - Rev 1 page 11/14
STL19N3LLH6AG
Revision history
Date
05-Apr-2018
Table 9. Document revision history
Version
1
Changes
Initial release. The document status is production data.
DS12507 - Rev 1 page 12/14
STL19N3LLH6AG
Contents
Contents
1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2
2 Electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3
2.1
Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
4 Package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
4.1
PowerFLAT™ 5x6 WF type R package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
4.2
PowerFLAT™ 5x6 WF packing information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12
DS12507 - Rev 1 page 13/14
STL19N3LLH6AG
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© 2018 STMicroelectronics – All rights reserved
DS12507 - Rev 1 page 14/14
