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STE60N105DK5 N-channel 1050 V, 0.110 Ω typ., 46 A MDmesh™ DK5 Power MOSFET in an ISOTOP package Datasheet - production data Prerelease product(s) Features Order code VDS RDS(on) max. ID PTOT STE60N105DK5 1050 V 0.120 Ω 46 A 680 W Figure 1: Internal schematic diagram Fast-recovery body diode Best RDS(on) x area Low gate charge, input capacitance and resistance 100% avalanche tested Extremely high dv/dt ruggedness Applications Switching applications Description This very high voltage N-channel Power MOSFET is part of the MDmesh™ DK5 fast recovery diode series. The MDmesh™ DK5 combines very low recovery charge (Qrr) and recovery time (trr) with an excellent improvement in RDS(on) * area and one of the most effective switching behaviors, ideal for half bridge and full bridge converters. Table 1: Device summary Order code Marking Packages Packaging STE60N105DK5 60N105DK5 ISOTOP Tube December 2016 DocID024137 Rev 2 This is information on a product in full production. 1/13 www.st.com Contents STE60N105DK5 Contents 1 Electrical ratings ............................................................................. 3 2 Electrical characteristics ................................................................ 4 2.1 Electrical characteristics (curves) ...................................................... 6 3 Test circuits ..................................................................................... 8 4 Package information ....................................................................... 9 4.1 Revision history ............................................................................ 12 Prerelease product(s) 5 ISOTOP package information ......................................................... 10 2/13 DocID024137 Rev 2 STE60N105DK5 1 Electrical ratings Electrical ratings Table 2: Absolute maximum ratings Symbol VGS ID IDM (1) PTOT Parameter Value Unit Gate-source voltage ±30 V Drain current (continuous) at TC = 25 °C 46 A Drain current (continuous) at TC = 100 °C 30 A Drain current (pulsed) 184 A Total dissipation at TC = 25 °C 680 W dv/dt (2) Peak diode recovery voltage slope 50 V/ns dv/dt (3) MOSFET dv/dt ruggedness 50 V/ns VISO Insulation withstand voltage (AC-RMS) 2.5 kV Tj Operating junction temperature range -55 to 150 °C Value Unit Tstg Storage temperature range Prerelease product(s) Notes: (1)Pulse (2)I SD (3)V width limited by safe operating area ≤ 23 A, di/dt ≤ 400 A/μs; VDS peak ≤ V(BR)DSS, VDD = 525 V DS ≤ 840 V Table 3: Thermal data Symbol Parameter Rthj-case Thermal resistance junction-case Rthj-amb Thermal resistance junction-ambient 0.184 30 °C/W Table 4: Avalanche characteristics Symbol Parameter Value Unit IAS Single pulse avalanche energy (pulse width limited by TJMAX) 16 A EAS Single pulse avalanche energy (starting TJ = 25°C, ID = IAS, VDD = 50 V) 1550 mJ DocID024137 Rev 2 3/13 Electrical characteristics 2 STE60N105DK5 Electrical characteristics (TCASE = 25 °C unless otherwise specified) Table 5: On /off states Symbol V(BR)DSS Parameter Test conditions Drain-source breakdown voltage ID = 1 mA, VGS = 0 V Min. Typ. Max. 1050 Unit V VDS = 1050 V, VGS = 0 V 1 µA VDS = 1050 V, VGS = 0 V, TC = 125 °C(1) 50 µA Gate-body leakage current VGS = ±20 V, VDS = 0 V ±10 µA VGS(th) Gate threshold voltage VDS = VGS, ID = 100 µA 4 5 V RDS(on) Static drain-source onresistance VGS = 10 V, ID = 23 A 0.110 0.120 Ω Min. Typ. Max. Unit - 6675 - pF - 370 - pF IDSS Zero gate voltage drain current IGSS 3 Notes: Prerelease product(s) (1)Defined by design, not subject to production test Table 6: Dynamic Symbol Ciss Parameter Test conditions Input capacitance VDS = 100 V, f = 1 MHz, VGS = 0 V Coss Output capacitance Crss Reverse transfer capacitance - 10 - pF Co(tr)(1) Equivalent capacitance time related - 630 - pF Co(er)(2) Equivalent capacitance energy related - 219 - RG Intrinsic gate resistance f = 1 MHz open drain - 3 - Ω Qg Total gate charge - 204 - nC Qgs Gate-source charge - 36 - nC Qgd Gate-drain charge VDD = 840 V, ID = 46 A, VGS = 10 V (see Figure 15: "Test circuit for gate charge behavior") - 133 - nC VGS = 0 V, VDS = 0 to 840 V Notes: (1)Time related is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS. (2)Energy related is defined as a constant equivalent capacitance giving the same stored energy as C oss when VDS increases from 0 to 80% VDSS. 4/13 DocID024137 Rev 2 STE60N105DK5 Electrical characteristics Table 7: Switching times Symbol td(on) tr td(off) tf Parameter Turn-on delay time Rise time Turn-off delay time Fall time Test conditions Min. Typ. Max. Unit VDD = 525 V, ID = 23 A, RG = 4.7 Ω, VGS = 10 V (see Figure 14: "Test circuit for resistive load switching times" and Figure 19: "Switching time waveform") - 40.6 - ns - 64.5 - ns - 262 - ns - 49.5 - ns Min. Typ. Max. Unit Table 8: Source drain diode Prerelease product(s) Symbol Parameter Test conditions ISD Source-drain current - 46 A ISDM Source-drain current (pulsed) - 184 A VSD(1) Forward on voltage ISD = 46 A, VGS = 0 V - 1.5 V trr Reverse recovery time - 273 ns Qrr Reverse recovery charge - 3 µC IRRM Reverse recovery current ISD = 46 A, VDD = 60 V, di/dt = 100 A/µs (see Figure 16: "Test circuit for inductive load switching and diode recovery times") - 23 A ISD = 46 A, VDD = 60 V, di/dt = 100 A/µs, Tj = 150 °C (see Figure 16: "Test circuit for inductive load switching and diode recovery times") - 477 ns - 10 µC - 42 A trr Reverse recovery time Qrr Reverse recovery charge IRRM Reverse recovery current Notes: (1)Pulsed: pulse duration = 300 µs, duty cycle 1.5% DocID024137 Rev 2 5/13 Electrical characteristics 2.1 STE60N105DK5 Electrical characteristics (curves) Figure 3: Thermal impedance Figure 4: Output characteristics Figure 5: Transfer characteristics Figure 6: Gate charge vs gate-source voltage Figure 7: Static drain-source on-resistance Prerelease product(s) Figure 2: Forward bias safe operating area 6/13 DocID024137 Rev 2 Prerelease product(s) STE60N105DK5 Electrical characteristics Figure 8: Capacitance variations Figure 9: Normalized gate threshold voltage vs temperature Figure 10: Normalized on-resistance vs temperature Figure 11: Normalized V(BR)DSS vs temperature Figure 12: Source-drain diode forward characteristics Figure 13: Maximum avalanche energy vs starting TJ DocID024137 Rev 2 7/13 Test circuits Prerelease product(s) 3 8/13 STE60N105DK5 Test circuits Figure 14: Test circuit for resistive load switching times Figure 15: Test circuit for gate charge behavior Figure 16: Test circuit for inductive load switching and diode recovery times Figure 17: Unclamped inductive load test circuit Figure 18: Unclamped inductive waveform Figure 19: Switching time waveform DocID024137 Rev 2 STE60N105DK5 4 Package information Package information Prerelease product(s) In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK ® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. DocID024137 Rev 2 9/13 Package information 4.1 STE60N105DK5 ISOTOP package information Prerelease product(s) Figure 20: ISOTOP outline 10/13 DocID024137 Rev 2 STE60N105DK5 Package information Table 9: ISOTOP mechanical data mm Dim. Min. Max. A 11.80 12.20 A1 8.90 9.10 B 7.80 8.20 C 0.75 0.85 C2 1.95 2.05 D 37.80 38.20 D1 31.50 31.70 E 25.15 25.50 E1 23.85 24.15 E2 Prerelease product(s) Typ. 24.80 G 14.90 15.10 G1 12.60 12.80 G2 3.50 4.30 F 4.10 4.30 F1 4.60 5 ØP 4 4.30 P1 4 4.40 S 30.10 30.30 DocID024137 Rev 2 11/13 Revision history 5 STE60N105DK5 Revision history Table 10: Document revision history Date Revision 24-Jan-2013 1 First release 2 Datasheet status promoted from preliminary to production data. Updated title, features, description and internal schematic diagram on cover page. Updated Section 1: "Electrical ratings". Updated Section 2: "Electrical characteristics". Added Section 2.1: "Electrical characteristics (curves)". Minor text changes Prerelease product(s) 16-Dec-2016 Changes 12/13 DocID024137 Rev 2 STE60N105DK5 IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. Prerelease product(s) ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2016 STMicroelectronics – All rights reserved DocID024137 Rev 2 13/13 ">
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