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STB26N60M2
Nchannel 600 V, 0.14 Ω typ., 20 A MDmesh™ M2
Power MOSFET in a D²PAK package
Datasheet - production data
TAB
2
1
3
D²PAK
Figure 1: Internal schematic diagram
Features
Order code
V
DS
@
T
Jmax
R
DS(on) max.
I
D
P
TOT
STB26N60M2 650 V 0.165 Ω
20
A
169
W
Extremely low gate charge
Excellent output capacitance (C
OSS
) profile
100% avalanche tested
Zener-protected
Applications
Switching applications
Description
This device is an N-channel Power MOSFET developed using MDmesh™ M2 technology.
Thanks to its strip layout and an improved vertical structure, the device exhibits low on-resistance and optimized switching characteristics, rendering it suitable for the most demanding high efficiency converters.
Order code
STB26N60M2
Table 1: Device summary
Marking Package
26N60M2 D²PAK
Packing
Tape and reel
March 2017 DocID030419 Rev 1
This is information on a product in full production.
1/15 www.st.com
Contents
Contents
STB26N60M2
1 Electrical ratings ............................................................................. 3
2 Electrical characteristics ................................................................ 4
Electrical characteristics (curves) ...................................................... 6
4 Package information ....................................................................... 9
D²PAK package information .............................................................. 9
D²PAK packing information ............................................................. 12
5 Revision history ............................................................................ 14
2/15 DocID030419 Rev 1
STB26N60M2
1 Electrical ratings
Symbol
Table 2: Absolute maximum ratings
Parameter
V
GS
I
D
I
P
TOT
T stg
T j
Gate-source voltage
Drain current (continuous) at T case
= 25 °C
Drain current (continuous) at T case
= 100 °C
Drain current (pulsed)
Total dissipation at T case
= 25 °C
Peak diode recovery voltage slope
MOSFET dv/dt ruggedness
Storage temperature range
Operating junction temperature range
Notes:
(1)
Pulse width is limited by safe operating area.
(2)
I
SD
≤ 20 A, di/dt=400 A/μs; V
DS(peak)
< V
(BR)DSS
, V
DD
= 80% V
(BR)DSS
.
(3)
V
DS
≤ 480 V.
Symbol
Table 3: Thermal data
Parameter
R thj-case
R
Thermal resistance junction-case
Thermal resistance junction-pcb
Notes:
(1)
When mounted on a 1-inch² FR-4, 2 Oz copper board.
Table 4: Avalanche characteristics
Parameter Symbol
I
E
Avalanche current, repetitive or not repetitive
Single pulse avalanche energy
Notes:
(1)
Pulse width limited by T jmax
.
(2)
starting T j
= 25 °C, I
D
= I
AR
, V
DD
= 50 V.
Electrical ratings
Value
±25
20
13
80
169
15
50
-55 to 150
Unit
V
A
A
W
V/ns
°C
Value
0.74
30
Unit
°C/W
Value
3.8
250
Unit
A mJ
DocID030419 Rev 1 3/15
Electrical characteristics
2 Electrical characteristics
(T case
= 25 °C unless otherwise specified)
Symbol Parameter
Table 5: Static
Test conditions
V
(BR)DSS
Drain-source breakdown voltage
V
GS
= 0 V, I
D
= 1 mA
I
DSS
Zero gate voltage drain current
V
GS
= 0 V, V
DS
= 600 V
V
GS
= 0 V, V
DS
= 600 V,
T case
I
GSS
Gate-body leakage current
V
GS(th)
Gate threshold voltage
R
DS(on)
Static drain-source onresistance
V
DS
= 0 V, V
GS
= ±25 V
V
DS
= V
GS
, I
D
= 250 µA
V
GS
= 10 V, I
D
= 10 A
STB26N60M2
Min. Typ. Max. Unit
600 V
1
µA
100
±10 µA
3 4 V
0.14 0.165
Ω
2
Notes:
(1)
Defined by design, not subject to production test.
Symbol Parameter
Table 6: Dynamic
Test conditions
C iss
C oss
C rss
C
R
G
Q g
Q gs
Q gd
Input capacitance
Output capacitance
Reverse transfer capacitance
V
V
DS
GS
= 100 V, f = 1 MHz,
= 0 V
Equivalent output capacitance
V
DS
= 0 to 480 V, V
Intrinsic gate resistance f = 1 MHz, I
D
= 0 A
GS
= 0 V
Total gate charge
Gate-source charge
Gate-drain charge
V
DD
= 480 V, I
D
= 20 A, V
GS
= 0
to 10 V (see Figure 15: "Test circuit for gate charge behavior" )
Min. Typ. Max. Unit
-
-
1360
88
-
- pF
- 2 -
-
-
-
-
-
124
4
34
5.6
16.3
-
-
-
-
- pF
Ω nC
Notes:
(1)
C oss eq.
is defined as a constant equivalent capacitance giving the same charging time as C oss
when V
DS increases from 0 to 80% V
DSS
.
4/15 DocID030419 Rev 1
STB26N60M2
Symbol Parameter t d(on)
Turn-on delay time t r
Rise time t d(off)
Turn-off delay time t f
Fall time
Table 7: Switching times
Test conditions
V
DD
= 300 V, I
D
= 10 A R
G
= 4.7
Ω,
V
GS
Electrical characteristics
Min. Typ. Max. Unit
-
-
-
-
20.2
8
66
10
-
-
-
- ns
Symbol Parameter
I
SD t rr
Source-drain current
I
Source-drain current
(pulsed)
V
Forward on voltage
Reverse recovery time
I
I
Q t
Q rr
RRM rr rr
RRM
Reverse recovery charge
Reverse recovery current
Reverse recovery time
Reverse recovery charge
Reverse recovery current
I
Table 8: Source-drain diode
V
GS
SD
Test conditions
= 0 V, I
SD
= 20 A
= 20 A, di/dt = 100 A/µs,
V
DD
= 60 V (see Figure 16: "Test circuit for inductive load switching and diode recovery times" )
I
SD
= 20 A, di/dt = 100 A/µs,
V
DD
= 60 V, T j
16: "Test circuit for inductive load switching and diode recovery times" )
Min. Typ. Max. Unit
- 20 A
- 80 A
- 1.6 V
- 360 ns
- 5 µC
- 27 A
- 556 ns
- 8 µC
- 29 A
Notes:
(1)
Pulse width is limited by safe operating area.
(2)
Pulse test: pulse duration = 300 µs, duty cycle 1.5%.
DocID030419 Rev 1 5/15
Electrical characteristics
2.1 Electrical characteristics (curves)
Figure 2: Safe operating area
STB26N60M2
Figure 3: Thermal impedance
Figure 4: Output characteristics Figure 5: Transfer characteristics
Figure 6: Gate charge vs gate-source voltage Figure 7: Static drain-source on-resistance
6/15 DocID030419 Rev 1
STB26N60M2
Figure 8: Capacitance variations
Electrical characteristics
Figure 9: Normalized gate threshold voltage vs temperature
Figure 10: Normalized on-resistance vs temperature Figure 11: Normalized V(BR)DSS vs temperature
Figure 12: Output capacitance stored energy
Figure 13: Source-drain diode forward characteristics
DocID030419 Rev 1 7/15
Test circuits
3 Test circuits
Figure 14: Test circuit for resistive load switching times
STB26N60M2
Figure 15: Test circuit for gate charge behavior
8/15
Figure 16: Test circuit for inductive load switching and diode recovery times
Figure 17: Unclamped inductive load test circuit
Figure 18: Unclamped inductive waveform
Figure 19: Switching time waveform
DocID030419 Rev 1
STB26N60M2
4
4.1
Package information
Package information
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK ® packages, depending on their level of environmental compliance. ECOPACK ® specifications, grade definitions and product status are available at: www.st.com
.
ECOPACK ® is an ST trademark.
D²PAK package information
Figure 20: D²PAK (TO-263) type A package outline
DocID030419 Rev 1 9/15
Package information
Dim.
D2
E
E1
E2 e e1
H c c2
D
D1
A
A1 b b2
J1
L
L1
L2
R
V2
STB26N60M2
Table 9: D²PAK (TO-263) type A package mechanical data mm
Min. Typ.
4.40
0.03
0.70
1.14
0.45
1.23
8.95
7.50
1.10
10.00
8.50
6.85
8.70
7.05
2.54
4.88
15.00
2.49
2.29
1.27
1.30
7.75
1.30
0.40
0°
5.28
15.85
2.69
2.79
1.40
1.75
8°
Max.
4.60
0.23
0.93
1.70
0.60
1.36
9.35
8.00
1.50
10.40
8.90
7.25
10/15 DocID030419 Rev 1
STB26N60M2 Package information
Figure 21: D²PAK (TO-263) type A recommended footprint (dimensions are in mm)
DocID030419 Rev 1 11/15
Package information
4.2 D²PAK packing information
Figure 22: D2PAK type A tape outline
STB26N60M2
12/15 DocID030419 Rev 1
STB26N60M2
Figure 23: D2PAK type A reel outline
Package information
Dim.
K0
P0
P1
P2
R
T
W
A0
B0
D
D1
E
F
Min.
4.8
3.9
11.9
1.9
50
0.25
23.7
10.5
15.7
1.5
1.59
1.65
11.4
Table 10: D²PAK type A tape and reel mechanical data
Tape Reel mm
Max.
10.7
15.9
1.6
1.61
1.85
11.6
5.0
4.1
12.1
2.1
Dim.
Min.
A
B
C
D
G
N
T
Base quantity
Bulk quantity
1.5
12.8
20.2
24.4
100
0.35
24.3 mm
Max.
330
13.2
26.4
30.4
1000
1000
DocID030419 Rev 1 13/15
Revision history
5
STB26N60M2
Revision history
Date
10-Mar-2017
Table 11: Document revision history
Revision
1
Changes
First release.
14/15 DocID030419 Rev 1
STB26N60M2
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Information in this document supersedes and replaces information previously supplied in any prior versions of this document.
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– All rights reserved
DocID030419 Rev 1 15/15
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