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BALF-NRG-02J5
Datasheet
50 Ω ultra thin balun with integrated harmonic filter / conjugate match balun to ST
BlueNRG-134 and BlueNRG-234
Flip-Chip (4 bumps) package
DIFF SE
DIFF
Top view
GND
Product status link
BALF-NRG-02J5
Features
• 50 Ω nominal input / conjugate match to STMicroelectronics chips BlueNRG-134
WLCSP and BlueNRG-234 WLCSP
• Low insertion loss
• Low amplitude imbalance
• Low phase imbalance
• Ultraminiature footprint: < 1.2 mm 2
• Extra low profile < 350 μm after reflow
• High RF performance
• RF BOM and area reduction
Applications
• 2.45 GHz impedance matched balun filter
• Optimized for STMicroelectronics chip set BlueNRG-134 and BlueNRG-234
WLCSP
• Wearable applications
Description
This device is an ultraminiature extra thin balun that integrates matching network and harmonics filter.
Matching impedance has been customized for the BLUENRG-134 and BlueNRG-234
WLCSP from STMicroelectronics.
Based on IPD technology on high resistivity silicium it optimizes the RF performance.
STMicroelectronics qualified this product intended to be used in system in package module based on standard reliability procedure. For more details, please contact ST representatives.
It is the responsibility of the customer to perform qualification reliability verifications as it is related to customer specific application, mission profile and module design, process.
DS12630 - Rev 1 - July 2018
For further information contact your local STMicroelectronics sales office.
www.st.com
1
Characteristics
Figure 1. Application schematic
BALF-NRG-02J5
Characteristics
DS12630 - Rev 1
Table 1. Absolute ratings (limiting values)
Symbol Parameter
P
V
ESD
T
IN
OP
Input power RF
IN
ESD ratings human body model (JESD22-A114-C), all I/O one at a time while others connected to GND
ESD ratings charge device model (JESD22-C101-C)
ESD ratings machine model, all I/O
Operating temperature
Value
Min. Typ. Max.
Unit
10 dBm
2000 -
500
200
-40
-
-
V
+105 °C page 2/13
DS12630 - Rev 1
BALF-NRG-02J5
Characteristics
Symbol
Z
DIFF
Z
SE
Table 2. Impedances (T amb
= 25 °C)
Parameter
Nominal differential impedance
Nominal single ended impedance
Min.
-
-
Value
Typ.
matched
50
Max.
-
-
Unit
Ω
Ω
Table 3. RF performance (T amb
= 25 °C)
Symbol Parameter f
I
L
RL
SE
RL
DIFF
H2
H3
H4
H5
H6
H7
φ imb
A imb
Frequency range (bandwidth)
Insertion loss in bandwidth (differential mode)
Single ended return loss in bandwidth (differential mode)
Differential return loss in bandwidth
Second harmonic attenuation (differential mode)
Third harmonic attenuation (differential mode)
Fourth harmonic attenuation (differential mode)
Fifth harmonic attenuation (differential mode)
Sixth harmonic attenuation (differential mode)
Seventh harmonic attenuation (differential mode)
Phase imbalance
Amplitude imbalance
26
18
37
50
45
39
37
38
-4.5
-1.1
Min.
2400
24
47
56
50
60
46
58
Value
Unit
Typ.
Max.
2500 MHz
1.35
34
1.65
dB dB
4.5
+1.1
dB dB dB dB dB dB dB
° dB page 3/13
BALF-NRG-02J5
On-board measurements
1.1
On-board measurements
Figure 2. Return loss on SE port (T amb
= 25 °C)
0
(dB)
-5
-10
-15
-20
-25
-30
-35
-40
-45
2.40
2.42
2.44
2.46
2.48
f(GHz)
2.50
Figure 4. Transmission (T amb
= 25 °C)
0
(dB)
-10
-20
-30
-40
-50
-60
-70
-80
0 2 4 6 8 10 12 14 16 f(GHz)
18 20
Figure 3. Return loss on DIFF port (T amb
= 25 °C)
0
(dB)
-5
-10
-15
-20
-25
-30
-35
-40
-45
2.40
2.42
2.44
2.46
2.48
f(GHz)
2.50
Figure 5. Insertion loss (T amb
= 25 °C)
0
(dB)
-0.5
-1.0
-1.5
-2.0
-2.5
2.40
2.42
2.44
2.46
2.48
f(GHz)
2.50
DS12630 - Rev 1 page 4/13
BALF-NRG-02J5
On-board measurements
Figure 6. H2 attenuation (T amb
= 25 °C)
0
(dB)
-10
-20
-30
-40
-50
-60
-70
-80
4.80
4.84
4.88
4.92
4.96
f(GHz)
5.00
Figure 8. H4 attenuation (T amb
= 25 °C)
0
(dB)
-10
-20
-30
-40
-50
-60
-70
-80
9.60
9.68
9.76
9.84
9.92
f(GHz)
10.00
0
(dB)
-10
-20
-30
-40
-50
-60
-70
-80
14.40
Figure 10. H6 attenuation (T amb
= 25 °C)
14.52
14.64
14.76
14.88
f(GHz)
15.00
Figure 7. H3 attenuation (T amb
= 25 °C)
0
(dB)
-10
-20
-30
-40
-50
-60
-70
-80
7.20
7.26
7.32
7.38
7.44
f(GHz)
7.50
Figure 9. H5 attenuation (T amb
= 25 °C)
0
(dB)
-10
-20
-30
-40
-50
-60
-70
-80
12.0
12.1
12.2
12.3
12.4
f(GHz)
12.5
0
(dB)
-10
-20
-30
-40
-50
-60
-70
-80
16.80
Figure 11. H7 attenuation (T amb
= 25 °C)
16.94
17.08
17.22
17.36
f(GHz)
17.50
DS12630 - Rev 1 page 5/13
BALF-NRG-02J5
On-board measurements
Figure 12. Amplitude imbalance (T amb
= 25 °C)
2.0
(dB)
1.5
1.0
0.5
0.0
-0.5
-1.0
-1.5
-2.0
2.40
2.42
2.44
2.46
2.48
f(GHz)
2.50
Figure 13. Phase imbalance (T amb
= 25 °C)
4.5
(deg)
3.5
2.5
1.5
0.5
-0.5
-1.5
-2.5
-3.5
-4.5
2.40
2.42
2.44
2.46
2.48
f(GHz)
2.50
DS12630 - Rev 1 page 6/13
2
2.1
BALF-NRG-02J5
Package information
Package information
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK ® packages, depending on their level of environmental compliance. ECOPACK ® specifications, grade definitions and product status are available at: www.st.com
. ECOPACK ® is an ST trademark.
•
•
Ultra thin Flip-Chip 4 bumps package information
Epoxy meets UL94, V0
Lead-free package
Figure 14. Ultra thin Flip-Chip 4 bumps package outline
X T
D
DIFF
DIFF
SE
GND
A1 A
BOTTOM VIEW SIDE VIEW
H
TOP VIEW
Parameter
X
A1
B1
Y
A
B
B2
D
T
H
Table 4. Ultra thin Flip-Chip 4 bumps package mechanical data
Description
X dimension of the die
Y dimension of the die
X pitch
Y pitch
Distance from bump to edge of die on X axis
Distance from bump to edge of die on Y axis
Distance from bump to center of die on Y axis
Bump diameter
Substrate thickness
Bump height
Min.
1355
825
202
190
117
Typ.
1385
855
1000
400
192.5
227.5
200
227
200
142
Max.
1415
885
Unit
252
210
167
µm
DS12630 - Rev 1 page 7/13
BALF-NRG-02J5
Ultra thin Flip-Chip 4 bumps package information
Figure 15. Recommended land pattern
BALF-NRG-02J5
800 µm
BlueNRG
50 Ω RF antenna
Clearance = 100µm
DS12630 - Rev 1 page 8/13
BALF-NRG-02J5
Ultra thin Flip-chip 4 bumps packing information
2.2
Ultra thin Flip-chip 4 bumps packing information
Figure 16. Marking
Note: More packing information is available in the application note:
• AN2348 Flip-Chip: “Package description and recommendations for use”
Figure 17. Flip Chip tape and reel specification
Pin 1 located according to EIA-481
P0
A0
Ø D0
W
B0
K0 P1 P2 Ø D1
Note:
User direction of unreeling
Pocket dimensions are not on scale
Pocket shape may vary depending on package
Ref.
A0
B0
Table 5. Ultra thin Flip-Chip 4 bumps package mechanical data
Min.
0.91
1.44
Dimensions
Millimeters
Typ.
0.96
1.49
Max.
1.01
1.54
F
DS12630 - Rev 1 page 9/13
BALF-NRG-02J5
Ultra thin Flip-chip 4 bumps packing information
Ref.
F
K0
P2
W
P1
P0
Ø D0
Ø D1
Figure 18. Footprint - non solder mask defined
Copper pad diameter:
220 µm recommended
180 µm minimum
260 µm maximum
Solder mask opening:
320 µm recommended
300 µm minimum
340 µm maximum
Min.
3.90
3.90
1.40
0.15
3.45
0.38
1.95
7.90
Solder stencil opening:
220 µm recommended
Dimensions
Millimeters
Typ.
4.00
4.00
1.50
0.20
3.50
0.43
2.00
8.00
Figure 19. Footprint - solder mask defined
Solder mask opening:
220 µm recommended
180 µm minimum
260 µm maximum
Copper pad diameter:
320 µm recommended
300 µm minimum
Max.
4.10
4.10
1.60
0.25
3.55
0.48
2.05
8.30
Solder stencil opening:
220 µm recommended
DS12630 - Rev 1 page 10/13
3
BALF-NRG-02J5
Ordering information
Ordering information
Figure 20. Ordering information scheme
BAL F - NRG - 02 J5
Balun
Integrated harmonic filter
Custom impedance
NRG = BlueNRG from STMicroelectronics
Design version
Package typpe
J5 = Flip Chip on HRSi ultra thin
Order code
BALF-NRG-02J5
Marking
TP
Table 6. Ordering information
Package
Flip-Chip 4 bumps
Weight
0.645 mg
Base qty.
5000
Delivery mode
Tape and reel
DS12630 - Rev 1 page 11/13
BALF-NRG-02J5
Revision history
Date
12-Jul-2018
Table 7. Document revision history
Revision
1 Initial release.
Changes
DS12630 - Rev 1 page 12/13
BALF-NRG-02J5
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Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of
Purchasers’ products.
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Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product.
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Information in this document supersedes and replaces information previously supplied in any prior versions of this document.
© 2018 STMicroelectronics – All rights reserved
DS12630 - Rev 1 page 13/13
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