Schneider Electric FTX117, Terminal User Guide
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General safety advice for users
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1 General
This manual is intended for personnel technically qualified to install, operate and maintain the products which are described herein. It contains all the necessary information for correct use of the products. However, for advanced use of our products please contact your nearest sales office for additional information.
The contents of this manual are not contractual and cannot under any circumstance extend or restrict contract warranty clauses.
2 Qualification of personnel
Only qualified personnel are authorized to install, operate or maintain the products. Any work performed by a unqualified person or non-observance of the safety instructions in this document or attached to the equipment may risk the safety of personnel and/or cause irreparable damage to equipment. The following personnel may be regarded as being "Qualified" :
• those involved with application design. Design office personnel familiar with control system safety concepts (for example, design engineers, etc),
• those involved with equipment installation. Individuals who are familiar with the installation, connection and startup of control system equipment (for example installers or wiring technicians working during the installation phase, technicians setting up the equipment, etc),
• those involved with operation. Personnel trained to operate and manage control system equipment (for example, operators, etc),
• those performing preventive or corrective maintenance. Personnel who are trained and experienced in the adjustment and repair of control system equipment (for example, installation engineers, after sales service engineers, etc).
3 Warnings
Warnings serve to prevent specific risks encountered by personnel and/or equipment. They are indicated in the documentation and on the products by different warning symbols, according to the severity of the risk :
Danger or Caution or Attention
Indicates that not following instructions or ignoring the warning may cause serious personal injury, death and/or serious damage to equipment.
Warning or Important or !
Indicates that not following a specific instruction may lead to minor injury and/or damage to equipment.
Note or Comment
Highlights important information relating to the product, its operation or its accompanying documentation.
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1
General safety advice for users
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4 Conformity of use
The products described in this manual conform to the European Directives (*) to which they are subject (CE marking). However, they can only be used correctly in the context of the applications for which they are intended (described in the various documents) and when connected to approved third party products.
As a general rule, if all handling, transport and storage specifications are observed, and all instructions for installation, operation and maintenance are followed, the products will be used correctly, with no danger to personnel or equipment.
(*) DEMC and DLV Directives, concerning Electromagnetic Compatibility and Low Voltage.
5 Installing and setting up equipment
It is important to observe the following rules when installing and starting up equipment. In addition, if the installation includes digital links, it is essential to follow the basic wiring rules given in the user's guide, reference TSX DG GND, and manual TSX DR NET, part C.
• safety instructions must be followed meticulously. These instructions are in the documentation or on the equipment being installed and set up.
• the type of equipment defines the way in which it should be installed :
- a flush-mountable device (for example, a process control terminal or a cell controller) must be flush-mounted,
- a device which is to be built in (for example, PLC) must be placed in a cabinet or enclosure,
- the casing of a laptop or portable device (for example, a programming terminal or a notebook) must remain closed,
• if the device is permanently connected, its electrical installation must include a device to isolate it from the power supply and a circuit-breaker to protect it against overcurrents and isolation faults. If this is not the case, the power socket must be grounded and be easily accessed. In all cases, the device must be connected to the protective mechanical ground PG using
green/yellow wires (NFC 15 100).
• low voltage circuits (even though they are low voltage) must be connected to the protective ground so that dangerous voltages can be detected.
• before a device is powered up, its nominal voltage must be checked to ensure that it has been adjusted to conform with the supply voltage.
• if the device is supplied with 24 or 48 VDC, the low voltage circuits must be protected. Only use power supplies which conform to the standards currently in force.
• check that the supply voltages remain within the tolerance ranges defined in the technical characteristics of the devices.
• all measures must be taken to ensure that any power return (immediate, warm or cold) does not lead to a dangerous state which may risk personnel or the installation.
• emergency stop devices must remain effective in all the device's operating modes, even those which are abnormal (for example, when a wire becomes disconnected). Resetting these devices must not cause uncontrolled or improper restarts.
• cables which carry signals must be located where they do not cause interference with the control system functions by capacitive, inductive or electromagnetic interference.
• control system equipment and their control devices must be installed in such a way as to ensure that they are protected against unintentional operation.
• appropriate safety measures must be taken for the inputs and outputs, to prevent improper states in the control system device, if no signal is received.
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General safety advice for users
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6 Equipment operation
The operational safety and availability of a device is its ability to avoid the appearance of faults and to minimize their effects if they occur.
A system is said to be fail-safe if the appearance of faults never causes a dangerous situation.
A fault inside the control system is known as :
• passive, if it results in an open output circuit (no command is sent to the actuators).
• active, if it results in a closed output circuit (an command is sent to the actuators).
From the safety point of view, a given fault is dangerous or not depending on the type of command given during normal operation. A passive fault is dangerous if the normal command is the operation of an alarm. An active fault is dangerous if it maintains or activates an undesirable command.
It is important to note the basic difference between the behavior of an electromechanical relay and an electronic component (for example a transistor) :
• there is a high probability, approximately 90%, that the failure of a relay will cause an open circuit (control circuit powered off).
• there is a 50% probability that the failure of a transistor will cause either an open circuit or a closed circuit.
This is why it is important to correctly estimate the types and consequences of faults when automating a system using electronic products such as PLCs, including when relay output modules are used on PLCs.
The system designer must use devices external to the PLC to protect against active faults inside the PLC, which are not indicated and are judged to be dangerous to the application. This may require solutions from various different technologies such as mechanical, electromechanical, pneumatic or hydraulic devices (for example, directly wiring a limit switch and emergency stop switches to the coil of a movement control contactor).
To protect against dangerous faults which may occur on output circuits or preactuators, it is sometimes beneficial to resort to general principles and use the large processing capacity of
PLCs, for example by using "inputs to check the correct execution of commands requested by the program".
7 Electrical and thermal characteristics
Details of the electrical and thermal characteristics of devices are given in the associated technical documents (installation manuals, service instructions).
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General safety advice for users
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8 Environmental conditions
Devices, such as TSX Nano PLCs, meet "TC" treatment (1) requirements. For installations in industrial production workshops or in environments which correspond to "TH" treatment (2), these devices should be installed in enclosures with minimum IP54 protection, stipulated by standards
IEC 664 and NF C 20 040.
TSX Nano PLCs, which themselves have IP20 protection, can therefore be installed without enclosures in restricted-access locations which do not exceed pollution level 2 (control room with no machines or dust-producing activities).
(1) "TC" treatment : all climate treatment.
(2) "TH" treatment : treatment for hot and humid environments.
9 Preventive or corrective maintenance
Availability
The availability of a system is its ability, in terms of its combined reliability, maintainability and maintenance logistics, to be in a state to perform a required function, at a given moment and within a defined time period.
Availability is therefore specific to each application, since it is a combination of :
• the architecture of the automatic system,
• the reliability and maintainability : intrinsic characteristics of the equipment (PLCs, sensors, machine, etc),
• maintenance logistics : characteristic intrinsic to the user of the control system (software structure, fault indication, process, on-site replacement parts, training of personnel).
Troubleshooting procedure
• control system equipment should only be repaired by qualified personnel (after sales service engineer, or technician approved by AEG Schneider Automation). Only certified replacement parts or components should be used.
• before performing any operation on equipment (for example opening an enclosure), always cut the power supply off (disconnect the power plug or open the power isolation switch).
• before performing any "mechanical" operation on equipment on site, cut the power supply off and mechanically lock any moving parts.
• before performing an operation on the PLC, modifying a connection, etc, check in the manual whether this should be done with the power off or if it is possible while the device is powered up. Meticulously follow the instructions given in the manual.
• on positive logic outputs or negative logic inputs, take all necessary precautions to prevent a disconnected wire from coming into contact with the mechanical ground (risk of undesirable command).
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4
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TSX Nano installation and functions Contents
Part A
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A
Introduction
Page
1/1
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1/1
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1/2
1.2-1 General information
1.2-2 Summary of catalog numbers (references)
1.2-3 Main functions of TSX Nano PLCs
1/2
1/4
1/5
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1/8
1.3-1 Normal (cyclical) operation
1.3-2 Periodic operation
1/8
1/9
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1/12
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1/17
1.8-1 Programmable input filters
1.8-2 Electronically fused outputs on TSX 07
●● ●●
12
1/17
1/19
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1/20
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1.11-1 Presentation
1.11-2 Summary of catalog references
1/23
1/24
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A ___________________________________________________________________________
TSX Nano installation and functions Contents
Part A
Section
Dimensions / Mounting / Installation
Page
2/1
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2/1
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2/2
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Connections 3/1
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3/1
3.1-1 General precautions and rules
3.1-2 Special precautions for connecting low noise immunity inputs
3/1
3/2
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3/4
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3/5
3.3-1 24V input connections
3.3-2 Connection of 115 VAC inputs
3/5
3/7
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3/7
3.4-1 Connection of relay outputs
3.4-2 Connection of relay outputs on TSX07
●
1 1648 PLC
3/7
3/9
3.4-3 Connection of negative logic (sinking) transistor outputs
3.4-4 Connection of positive logic (sourcing) transistor outputs
3/9
3/11
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3/13
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3/14
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3/15
3.7-1 Connection with input 0 of the TSX Nano wired as source
3.7-2 Connection with input 0 of the TSX Nano wired as sink
3/15
3/15
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A/2
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TSX Nano installation and functions Contents
Part A
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A
3.8-1 Connection with sink output 0 of the TSX Nano
3.8-2 Connection with source output 0 of the TSX Nano
Page
3/16
3/16
3/16
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Special functions 4/1
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4/1
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4/1
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4/2
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4/3
4.4-1 Use as a fast counter
4.4-2 Use as a frequency meter
4.4-3 Use as an up/down counter
4/4
4/5
4/6
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Characteristics / Service conditions 5/1
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A ___________________________________________________________________________
TSX Nano installation and functions Contents
Part A
Section
5.6-1 Standards
5.6-2 Environment, normal service conditions
Page
5/7
5/7
5/7
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Setup 6/1
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Addendum 7/1
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A/4
1
1 Introduction
1.1
The PLC in the control system structure
A PLC can be divided into four main sections :
• Inputs
• Outputs
• The memory, where the user program instructions and data are stored
• The processor, which reads the input data and controls the outputs according to the user program instructions.
The programming terminal is the tool used to :
• Create and transfer the user program to program memory
• Debug the user program and control system start-up
• Perform installation diagnostics.
Programming terminal
A
FTX 117
FTX 417
FTX 117 limit switch
Program memory contactor proximity sensor
I
N
P
U
T
S
Processor
O
U
T
P
U
T
S solenoid valve push button
+
24VDC
—
OUT
IN
COM
0
1
2
3
4
5
L N
100/240VAC
Modicon
I
0
RUN ERR
O
0
COM
I/O
TSX Nano
1
1
2
2
3
3
4
5
INPUTS 24 VDC
OUTPUTS 2A Ry
OUT
COM
0
1
2
OUT
COM
3
A
SG indicator lamp
PLC
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1/1
A
1.2
TSX Nano PLCs
1.2-1 General information
TSX Nano PLCs are available in three I/O sizes (10, 16 and 24 I/O). They are programmed in reversible PL7 language (Ladder or Instruction List languages). These
PLCs are programmed via :
• either an FTX 117 terminal (Instruction List)
• or an FTX 417 or PC compatible terminal (Ladder or Instruction List).
+
24VDC
—
OUT
IN
COM
0
1
2
3
4
5
L N
100/240VAC
TSX Nano
Modicon
I
0
RUN ERR
O
0
COM
I/O
1
2
1
2
3
4
3
5
INPUTS 24 VDC
OUTPUTS 2A Ry
OUT
COM
0
1
2
OUT
COM
3
A
SG
10 I/O (6 inputs + 4 outputs)
L N
100/240VAC
2
3
4
5
6
+
24VDC
—
OUT
IN
COM
0
1
TSX Nano
Modicon
I
0
RUN ERR
O
0
COM
I/O
1
2
1
2
3
4
3
4
5
6
7
8
5
6
5
OUT
COM
6
2
3
OUT
COM
4
OUT
COM
0
1
INPUTS 24 VDC
OUTPUTS 2A Ry
7
8
A
SG
16 I/O (9 inputs + 7 outputs)
9
10
11
12
13
4
5
6
7
3
1
2
+
24VDC
—
OUT
IN
COM
0
Modicon
I
0
RUN ERR
O
0
COM
I/O
1
2
3
4
3
4
1
2
5
5
TSX Nano
10
11
12
13
8
9
6
7
9
6
7
8
6
7
OUT
COM
8
OUT
COM
9
3
OUT
COM
4
5
2
OUT
COM
0
1
8
INPUTS 24 VDC
OUTPUTS 2A Ry
A
SG
24 I/O (14 inputs + 10 outputs)
16 I/O (9 inputs + 7 outputs)
PLC with 115 VAC inputs
Each base PLC can be extended by an I/O extension, comprising a TSX Nano PLC.
In addition, a maximum of three Peer PLCs can be connected to the base PLC, communicating via exchange words. Only the base PLC can have an I/O extension.
Base PLC
0
I/O extension
1
Peer PLC2
5
Peer PLC3
6
Peer PLC4
7
650 feet maximum (1)
(1) See Part A, Section 3.5 for the type of cable to use
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Introduction 1 A
Description
8 9 5 10
L N
100/240VAC
+
24VDC
—
OUT
IN
COM
0
1
2
3
TSX Nano
Modicon
I
0
RUN ERR
O
0
COM
I/O
1
1
2
3
4
2
3
4
5
6
7
8
5
6
OUT
COM
6
5
3
OUT
COM
4
2
1
OUT
COM
0
4
5
6
7
8
INPUTS 24 VDC
OUTPUTS 2A Ry
0
A
Extension
B
SG
1
7 6 11 12
1 Hinged cover for access to items 2, 3, and 4
2 Port for connecting an ASCII or UNI-TELWAY device. ASCII, RS485 UNI-TELWAY
Master or slave protocols
3 Selector switch for PLC function code :
• 0 = base PLC, 1 = I/O Extension
• 5 = Peer PLC no. 2, 6 = Peer PLC no. 3, 7 = Peer PLC no. 4
4 Potentiometers :
• 1 on PLCs with 10 I/O
• 2 on PLCs with 16 or 24 I/O
5 Input status display (1)
6 Output status display (1)
7 PLC status display : RUN, ERR, COM, I/O
8 Power supply connections
9 Sensor supply on models with 100/240 VAC : 24VDC/150 mA supply
This supply is not available on the model with 115VAC inputs
10 Input connections
11 Output connections
12 Extension connector (I/O Extension and/or Peer PLC) or Modbus slave
13 Removable cover for protecting the terminals
1/3
13
3
4
2
1
13
A
1.2-2 Summary of catalog numbers (references)
Nb.
Power supply
I/O
110/240V
Type of inputs Type of outputs isolated
24V 24V transistors 24V
115V sink source a relay
2 4 V a c © a æ a c © 24/240V c
10 ● ● ●
References
● ● ●
TSX 07 20 1028
TSX 07 30 1028
TSX 07 20 1008
TSX 07 30 1008
● ● ● 6 Inputs
+
4 Outputs ● ● ●
TSX 07 201002
TSX 07 30 1002
TSX 07 201022
TSX 07 30 1022
● ● ●
16 ● ● ●
TSX 07 201012
TSX 07 30 1012
TSX 07 211628
TSX 07 31 1628
● ● ●
9 In.
+
●
7 Outputs ●
●
●
●
●
TSX 07 211648
TSX 07 31 1648
TSX 07 21 1608
TSX 07 31 1608
●
●
●
● ●
●
TSX 07 21 1602
TSX 07 31 1602
TSX 07 21 1622
TSX 07 31 1622
TSX 07 21 1612
TSX 07 31 1612
24 ● ● ●
● ● ●
TSX 07 21 2428
TSX 07 31 2428
TSX 07 21 2408
TSX 07 31 2408
14 Inputs
+
10 Outputs
●
●
●
●
●
●
TSX 07 21 2402
TSX 07 31 2402
TSX 07 21 2422
TSX 07 31 2422
● ● ● TSX 07 21 2412
TSX 07 31 2412
Note :
TSX 07 3
● ●●●● models have additional software functions to those offered by the TSX 2
● ●●●● models, such as Uni-Telway Master/Slave on the terminal port, Modbus slave PLC on the extension port, connection of analog I/O modules, etc.
1/4
`
Introduction 1 A
1.2-3 Main functions of TSX Nano PLCs
By default, all I/O are configured as discrete I/O. However, certain I/O can be assigned to specific tasks during configuration (RUN/STOP input, latching inputs, 10 kHz fast counting I/O or 1kHz up/down counting, PLC status (SECURITY) output, pulse train output, pulse width modulation output).
TSX Nano PLCs are programmed in reversible PL7 language (Instruction List or Ladder) which enables the following functions to be used : schedule blocks (RTC), timers, up/ down counters, LIFO/FIFO registers, shift registers, drum controllers, step counters.
Scanning
Language
I/O extension
Normal (cyclical) or periodic (2 to 150 ms)
`
Scan time
Execution time less that 1 ms for 1000 instructions (3)
0.2
µ s (minimum) for a single Boolean instruction
Memory capacity Data 256 internal words, 64 constant words, 128 internal bits (64 of these retentive)
Program
≤
1000 instructions (battery-backed RAM and EEPROM)
Backup PLC RAM : by battery. Backup duration : 30 days
Reversible PL7 : Instruction List or Ladder
Peer PLCs
1 (each PLC can be used as an I/O extension). Max. distance between base PLC and extension : 200 meters (650 feet) (1)
3, connected to the base PLC, and communicating via exchange words. In this case, only the base PLC can receive an I/O extension. Maximum distance between base PLC and last peer
PLC : 200 meters (650 feet) (1)
Function blocks Schedule blocks
(RTC) (2)
Timers
16
32 time base : 1ms (for the first two), 10ms, 100ms, 1s, 1min with a preset range from 0 to
9999
16 preset range from 0 to 9999 Up/down counters
LIFO/FIFO registers
Shift registers
Drum controllers (3)
Step counters
4
8
4
4
16-word blocks
16 bits
8 steps, 16 control bits
256 steps
(1) See Part A, Section 3.5 for the type of cable to use
(2) Available on all PLCs with 16 and 24 I/O : TSX 07
●●
16/24
(3) By default, a master PLC (switch position 0) scans all the extensions at 19 200 bauds. To
1/5
A
Potentiometers 1 (on TSX Nano, 10 I/O), 2 (on TSX Nano, 16 I/O and 24 I/O)
Displaying internal bits
(Memory
Display)
Programmable input filter
(1)
On a base PLC or a peer PLC, it is possible to display the status of 8 internal bits (TSX Nano with 10 and 16 I/O) or 16 internal bits (TSX
Nano with 24 I/O) on the front panel, see Section 1.10.
On a base PLC or a peer PLC, it is possible to change the input filter time during configuration :
No filtering or filtering at 3 ms or 12 ms (see Section A-1.7).
I/O points are configured in groups.
Special I/O
(2)
It is possible to assign specific functions to certain I/O during configuration.
Inputs RUN/STOP : 1 of the first 6 inputs of the base or the peer
PLC (%I0.0 to %I0.5).
Latching : the first 6 inputs of the base or the peer PLC
(%I0.0 to %I0.5).
Analog input module connected on %10.0 according to frequency meter
Fast counter : 10 kHz
Frequency meter : 10 kHz
Fast up/down counter : 1 kHz
Outputs PLC status (SECURITY) : 1 of the first 4 outputs of the base or the peer PLC (%Q0.0 to %Q0.3)
PULSE : pulse train (4.9 kHz maximum)
PWM : pulse width modulation (4.9 kHz maximum)
Analog input module connected on %Q0.0 according to
PWM (pulse width modulation)
Threshold outputs : 2 (%Q0.1 and %Q0.2), associated with fast counting, are updated without waiting for an endof-scan update
,
Note :
PULSE and PWM outputs can be used on PLCs with relay outputs as long as the on-off period is greater than the relay's closing response time (approximately 50 Hz). If they are used, the maximum number of permitted operations is likely to be reached very quickly.
We therefore recommend using these outputs mainly on PLCs with transistor outputs.
(1) Not available on PLCs with 115 VAC inputs : TSX 07 •1 1648
(2) On PLCs with 115 VAC inputs : TSX 07 •1 1648, the only special I/O are the RUN/STOP input and the PLC status (Security) output.
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Introduction 1 A
Summary of the main functions according to PLC type
Functions
Inputs RUN/STOP
Latching
Counting 10 kHz
Analog/
Frequency meter
Up/down counting 1kHz
Outputs PLC status
PULSE
Analog/
PWM
Threshold (fast counter)
Programmable input filters
PLCs
10 I/O TSX 07
30/20 10
● ●
●
●
●
●
●
●
●
●
●
PLCs
16 I/O TSX 07
31/21 1648
●
●
●
●
31/21 16
● ●
●
●
●
●
●
●
●
●
●
PLCs
24 I/O TSX 07
31/21 24
● ●
●
●
●
●
●
●
●
●
●
Schedule block (RTC)
Potentiometers
Display of internal bits on I/O indicator lamps
Communication prog.
UNI-TELWAY port ASCII extensionI/O Ext. or Peer PLC port Modbus slave
Function Timers
blocks Up/down counters
LIFO/FIFO register blocks
Shift registers
Drum controllers
Step counters
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
● ● ● ●
InstrucGrafcet
tions(1)
Varia-
Master relay
Bit strings
bles(1) Word table
Indexing
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
(1) All other instructions can be accessed by the various types of PLC.
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1/7
A
1.3
Program execution
1.3-1 Normal (cyclical) operation
By default, the PLC scan executes cyclically, as follows :
Internal processing :
The system :
• Monitors the PLC :
- checks the execution capability of the program memory
- manages the time ; updates the current schedule block (RTC)
- updates the LEDs : RUN, I/O, ERR,
COM
- detects the RUN/STOP changeover
- monitors other system parameters
• Processes requests from the programming port and the extension port.
Read inputs :
• Input memory is updated with the status of the physical inputs (%I).
Execute program :
• The program written by the user is then executed.
Update outputs :
• The states of the physical outputs (%Q) are updated from the output memory.
Internal processing
Read inputs
(%I)
RUN
Program execution
Update outputs
(%O)
STOP
The operating cycle
• PLC running
The processor manages the system, reads the inputs, executes the program and updates the outputs.
• PLC stopped
In this case, the processor only manages the system, reads the inputs and updates the output image table. Physical outputs, however, are not updated unless system bit
%S8=0.
Watchdog timer
!
CAUTION
UNEXPECTED EQUIPMENT OPERATION
The scan time of the user program is monitored by the PLC watchdog timer and must not exceed 150 ms. Otherwise a fault appears causing the PLC to stop immediately (the RUN and ERR LEDs flash).
Failure to observe this precaution can result in equipment damage or personal injury.
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1/8
Introduction 1 A
The possibilities :
1 Scan time
≤
watchdog time (150 ms)
Normal operation, the next scan is started
2 Scan time > watchdog time
The PLC stops, the RUN and ERR LEDs flash and system bit %S11=1.
Diagram of cyclical scan time
Program execution
I.P.
%I
Scan n time
Key :
I.P.= internal processing
%Q
I.P.
%I
Program execution
Scan n+1 time
%Q
%I = read inputs %Q = update outputs
Time
1.3-2 Periodic operation
In this case, reading of inputs, program processing and output updating is executed periodically according to the time defined by the user at configuration (2 to 150 ms).
At the start of the PLC scan, a software timer is set to the value defined during configuration. The PLC scan must finish before the time elapses. The next scan is started when the timer finishes.
When the scan time exceeds the preset time limit, system bit %S19 is set to 1. This bit can be tested and reset by the user or by the user program.
Start
of period
Read inputs
(%I)
RUN
Program execution
STOP
Update outputs
(%Q)
Internal processing
End of period
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1/9
A
Watchdog timer
!
CAUTION
UNEXPECTED EQUIPMENT OPERATION
The scan time of the user program is monitored by the PLC watchdog timer and must not exceed 150 ms. Otherwise a fault appears causing the PLC to stop immediately (the RUN and ERR LEDs flash).
Failure to observe this precaution can result in equipment damage or personal injury.
The possibilities :
1 Scan time
≤
preset time limit
Normal operation, the next scan is launched as soon as the programmed period has elapsed.
2 Preset time limit < scan time
≤
watchdog time
The system bit %S19 is set to 1 by the system and the program user is responsible for resetting it to 0. The PLC remains in RUN.
3 Scan time > watchdog time
The PLC stops, the RUN and ERR LEDs flash and system bit %S11=1.
Diagram of periodic execution time
I.P.
%I
Program execution
Period
%Q
I.P.
%I
Program execution
Period
%Q
I.P.
Key :
I.P.= internal processing %I = read inputs %Q = update outputs
___________________________________________________________________________
1/10
Introduction 1 A
1.4
The I/O extension
Each TSX Nano base PLC can be extended using an I/O extension. This extension can be any TSX Nano PLC (10, 16 or 24 I/O).
Base PLC
2
3 4 5
6
1
0
7
I/O extension
2
1
3 4 5
6
0
7 extension link
The function of each PLC is defined by the position of the selector switch, as shown in the diagram above :
• Selector switch at position 0 = base PLC.
• Selector switch at position 1 = I/O extension.
The extension link between the base PLC and the I/O extension should be a shielded twisted pair cable.
The maximum distance between the base PLC and the I/O extension is 200 meters
(650 feet).
Cable product reference : TSX CA0 003 (length 30 cm - 12 inches).
For distances greater than this, the user should use a cable whose characteristics are defined in Part A, Section 3.5.
!
CAUTION
UNEXPECTED EQUIPMENT OPERATION
To accommodate any slight variation in update times, critical I/O points should be assigned to the base PLC. This will ensure optimum operation of the control system.
Failure to observe this precaution can result in equipment damage or personal injury.
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1/11
A
1.5
I/O addressing
An I/O address is defined by the following characters : symbol
% I or Q
I = input
Q = output
0 or 1
0 = base PLC or peer PLC
1 = I/O extension point
● i
i= I/O point number
(see table below)
Base PLC
%I0.3
0 1 2 3 4 5 6 7 8 9 10 1112 13
C 0 1 2 3 C 4 5 6 7 C 8 C 9
%Q0.6
I/O extension
%I1.3
0 1 2 3 4 5 6 7 8 9 10 1112 13
C 0 1 2 3 C 4 5 6 7 C 8 C 9
%Q1.6
Examples :
%I0.3 : Input, I/O point n
°
3 on the base PLC
%Q1.6 : Output, I/O point n
°
6 on PLC used as I/O extension
Numbers of I/O points for the various PLC types
PLC model Number of I/O Inputs
TSX 07
●●
10
●●
TSX 07
●●
16
●●
TSX 07
●●
24
●●
10 (6I + 4O)
16 (9I + 7O)
24 (14I + 10O) i = 0 to 5 i = 0 to 8 i = 0 to 13
Outputs i = 0 to 3 i = 0 to 6 i = 0 to 9
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1/12
Introduction 1 A
1.6
Peer PLCs
A maximum of three peer PLCs which communicate via exchange words (%IW and
%QW) can be connected to the base PLC. In this case, only the base PLC can have an
I/O extension.
Base PLC
2
1
3 4 5
6
0
7 Peer PLC2
2
1
3 4 5
6
0
7 Peer PLC3
2
3 4 5
6
1
0
7 Peer PLC4
2
1
3 4 5
6
0
7
I/O extension
2
3 4 5
6
1
0
7 extension link
Note : The order in which they are cabled does not affect operation.
The function of each PLC is defined by the position of the selector switch, as shown in the diagram above :
PLC function
Selector position
Link address
Base I/O TSX Micro extension
PLC Ext.
(module TSX STZ10)
0
0
1
1
2
2
3
3
4
4
5
2
Peer Peer Peer
PLC2 PLC3 PLC4
6
3
7
4
I/O addressing for peer PLCs 2, 3, and 4 is identical to that for the base PLC (%I0.i and
%Q0.i)
The extension link between the base PLC and the extensions (I/O and/or PLCs) should be a shielded twisted pair cable (see Part A, Section 3.5 for the type of cable to use).
The maximum distance between the PLC base and the last peer PLC is 200 meters
(650 feet).
Important : The position of the selector switch is only taken into account when the PLC is powered up.
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1/13
A
In order to optimize the communication exchange between the base PLC and the peer
PLCs or I/O extension, the number of devices to be scanned and the baud rate on the link must be defined. See Part C, Section 3.2 for information on baud rate configuration.
Overall duration of exchange scan (complete scan)
3
4
1
2
Number of extensions Transmission speed scanned 9600 bits/s (1) 19200 bits/s
17 to 19 ms
34 to 35 ms
6 to 8 ms
16 to 18 ms
53 to 55 ms
72 to 74 ms
26 to 28 ms
35 to 36 ms
Note:
System bit %S72 can be used to prevent any scanning of peer PLCs. It takes priority over selections made during configuration.
Important
Bits X1, X2, X3 and X4 of system word %SW71 enable the status of communication with each peer PLC to be tested on the extension link (at state 1, communication is OK). Using PL7-07 data animation at 19200 bit/s may lead to reduced performance.
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1/14
Introduction 1 A
1.7
Special I/O
Introduction
By default, all I/O are configured as discrete I/O. However, certain I/O on the base PLC or peer PLC can be assigned to specific functions during configuration. An I/O point already used for one function cannot be used for another.
Special inputs
Input functions
RUN/STOP
Latching
Inputs Upcounting linked with
Counter fast up/ set down counting Fast counter
(FC) enable
-
Analog input
Downcounting -
FC read -
●
Base PLC or Peer PLC inputs
%I0.0
%I0.1
%I0.2
%I0.3
%I0.4 %I0.5 %I0.6 to %I0.13
●
●
● -
●
●
-
●
●
-
●
●
-
●
●
● -
-
●
●
-
-
-
-
-
-
-
-
-
-
●
-
-
-
● -
-
-
●
-
-
-
-
-
-
-
-
Special outputs
Output functions (1)
PLC status (SECURITY)
PULSE : pulse train
PWM : pulse width modulation
Analog output
Outputs linked with fast up/ down counting
FC OUT 0 -
●
FC OUT 1 -
●
●
Base PLC or Peer PLC outputs
%Q0.0
%Q0.1 %Q0.2 %Q0.3
%Q0.4 % to %Q0.10
● ● ● ● -
-
-
-
-
●
-
-
-
-
●
-
-
-
-
-
-
-
-
-
-
-
(1) Outputs %Q0.0, %Q0.1, %Q0.2 and %Q0.3, when configured as special outputs, must not be used as outputs in the application program (for example, with Boolean instructions (ST, STN,
S, R) with the command bits for drum controller blocks %DRi) or as outputs assigned to the
Schedule blocks RTC.
___________________________________________________________________________
1/15
A
Definition
Use of these I/O is defined in detail in Part A, Section 4. The description below simply defines each I/O function.
• RUN/STOP input (see Section 4.1)
Via an external switch, this input :
- starts program execution (RUN),
- stops program execution (STOP).
• Latching input (see Section 4.3)
This input is used to store a pulse which lasts for less than a scan, so that it is taken into account in the following scan.
• Inputs linked with fast counting (see Section 4.4)
Upcounting input
This input enables the counting of pulses to be taken into account, at a maximum frequency of :
- 5 or 10 kHz if configured as a fast counter or frequency meter
- 1 kHz if configured as a fast up/down counter.
One of the applications is the management of an analog input module (see Section 1.11)
Set counting input
This input is used :
- either to reset the counter to 0 when using it as a fast counter.
- or to preset it to a value defined at configuration when using it as an up/down counter.
Fast counter enable input
This input ensures that signals received at the up/down counting inputs are taken into account.
Downcounting input
This input enables downcounting pulses to be taken into account at a maximum frequency of 1kHz.
Fast counter value read input
This input enables the current value to be read during the scan, rather than when the scan is completed.
• PLC status (SECURITY) output (see Section 4.2)
Normally set at 1, it changes to 0 on a PLC fault and can therefore be used in external safety circuits.
• PULSE output (see Section 4.5)
Used to generate a signal lasting for a variable period but with a constant duty cycle, or on to off ratio, equal to 50% of the period.
• PWM output (see Section 4.6)
Used to generate a signal lasting for a constant period with the option of varying the duty cycle, or on to off ratio.
One of the applications is the management of an analog input module (see Section 1.11)
• Fast Counter threshold outputs (see Section 4.4)
Linked to fast counting, these outputs enable data to be read during the scan, without waiting for an update at the end of the scan.
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1/16
Introduction 1 A
1.8
Additional information about the I/O
1.8-1 Programmable input filters
Input filtering on a base or peer PLC may be configured from the terminal by altering the filter time. The values which can be configured are as follows :
• 12 ms : filter contact bounce and electrical noise
• 3 ms : filter contact bounce and electrical noise
• No filtering : reading short signals for fast applications but with increased sensitivity to filter contact bounce or electrical noise. In this case the use of volt-free contacts is not advised.
Important
Each type of configurable filter value can be considered as three zones separated by 2 values: the immunity value and the recognition value. Any signal with a duration less than or equal to the immunity value will be rejected. Any signal with a duration greater than or equal to the recognition value will be accepted. Any signal with a duration between these 2 values may accepted or rejected. If no filtering has been configured on an input, the immunity and recognition values are set for inputs %I0.8
to %I0.13 but for inputs %I0.0 to %I0.7 they will depend on whether or not the counting function or the frequency meter function has been configured on input
%I0.0.
Filter configured
12 ms
3 ms
Immunity
10 ms
2 ms no filtering 0.125 ms for %I0.8 to %I0.13
and %FC not configured 0.025 ms for %I0.0 to %I0.7
no filtering and %FC configured as
5 khz counter or
5 khz frequency meter
0.125 ms for %I0.8 to %I0.13
0.025 ms for %I0.0 to %I0.7
no filtering and %FC configure as
10 khz counter or
10 khz frequency meter
0.125 ms for %I0.8 to %I0.13
0.007 ms for %I0.0 to %I0.7
Recognition
13 ms
4 ms
0.375 ms for %I0.8 to %I0.13
0.100 ms for %I0.0 to %I0.7
0.375 ms for %I0.8 to %I0.13
0.100 ms for %I0.0 to %I0.7
0.375 ms for %I0.8 to %I0.1.
0.037 ms for %I0.0 to %I0.7
Important
Where no filtering has been configured, and the recognition values are less than the
PLC scan time (and thus the scan time of the inputs), to ensure that a signal with a duration greater than the recognition time is processed, use the input which handles this signal to capture the pulses.
___________________________________________________________________________
1/17
A
• Discrete inputs
By default, all inputs on a base or peer PLC or an I/O extension are configured with a filter time of 12 ms. This time can be modified for each I/O point group on a base or peer
PLC.
• Latching inputs
Each of the first 6 inputs (%I 0.0 to %I 0.5) on a base PLC or a peer PLC can be configured individually as latching inputs. This type of operation is used to memorize any pulse with a duration less than the PLC scan time. In this case, the immunity and recognition values also depend on the configuration of the fast counting function %FC.
Inputs %I0.0 to %I0.5 in read mode Immunity Recognition
%FC not configured
%FC configured as 5 khz counter or 5 khz frequency meter
%FC configured as 10 khz counter or 10 khz frequency meter
0.025 ms
0.025 ms
0.007 ms
0.100 ms
0.100 ms
0.037 ms
• Fast counting inputs
If a fast counter, a frequency meter or an up/down counter is declared at the time of configuration, the following inputs are automatically assigned to the counting pulse input.
- %I0.0 for fast counting and frequency meter,
- %I0.0 and %I0.3 for up/down counting.
Used for fast counting or as frequency meter :
Two operating modes can be configured: a 10 khz mode and a 5 khz mode. Input
%I0.0 then counts the pulses, which must respect the characteristics of the minimum duration and the minimum separation between pulses to be taken into account.
Mode Immunity Min. pulse duration Min. sep. between pulses
5 Khz
10 Khz
0.025 ms
0.004 ms
0.100 ms
0.045 ms
0.100 ms
0.045 ms
Used for up/down counting:
Inputs %I0.0 and %I0.3 upcount and downcount the pulses, which must respect the characteristics of the minimum duration and the minimum separation between pulses to be taken into account. The maximum frequency is 1 khz.
%I0.0 and %I0.3 Immunity Min. duration of pulse Min. sep. between pulses
0.025 ms 0.100 ms 0.100 ms
Important
• While counter input %I0.0 is at state 1, no downcounting action will be processed on input %I0.3.
• While counter input %I0.3 is at state 1, no upcounting action will be processed on input %I0.0.
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1/18
Introduction 1 A
1.8-2 Electronically fused outputs on TSX 07
●● ●●
12
Protection against overloads and short-circuits
TSX 07
●● ●●
12 PLCs have 4, 7 or 10 transistor outputs which are protected against overloads of up to 1A and short-circuits.
0.5A transistor outputs have an electronic device which enables an overload or a shortcircuit to be detected on any active output. The appearance of this type of fault causes:
• current limitation (typically 1A) of the affected output,
• tripping of all the outputs in the block (base PLC or I/O extension)
• activation with a steady light of the I/O LED on the base PLC (if base PLC outputs tripped) or LEDs on the base PLC and I/O extension (if I/O extension outputs tripped)
• setting the I/O fault system bit %S10 to 0, and system bits %S118, %S119,
%SW118:X0 and %SW119:X0 to change state (see sections B 5.1, B 5.2 and B 6.2).
Reactivating transistor outputs
When a fault has caused tripping of the PLC outputs, they need to be reset. Since tripping of outputs results in downgraded operation of the process being controlled by the PLC, it is advisable to make resetting transistor outputs conditional upon manual intervention.
The operator can then, before performing the reset, take any necessary precautions with regard to the control system and personnel, (for example, request changeover to manual mode). The recommended programming is described in section B 6.2.
Note :
If the process being controlled by the PLC is the responsibility of the user, it is possible to program an automatic reset (see section B 6.2).
Important
Cold restart of the PLC (set %S0) removes the tripping fault and attempts system reactivation.
___________________________________________________________________________
1/19
A
1.9
Potentiometers
Principle
An analog/digital converter translates the voltage at the terminals of a potentiometer into a digital value (0 to 255) which is then stored in a word. This value can then, for example, be used as the preset value for a timer that the user can manually adjust without the need for a programming terminal. An example of software start-up is described in Part B,
Section 3.2.
Analog
Digital
Analog/digital converter value 0 to 255
Adjustment potentiometer
Storage in a system word %SW
Potentiometers can only be used on base PLCs or peer PLCs.
The number of potentiometers varies depending on the type of PLC :
• 1 on PLCs with 10 I/O, labelled 0
• 2 on PLCs with 16 and 24 I/O, labelled 0 and 1.
Storage word depending on the potentiometers
0
Potentiometer 0
%SW 112
Storage word
1
Potentiometer
1
%SW 113
Storage word
Position of the potentiometers
0 0 1
PLC with 10 I/O PLC with 16 or 24 I/O
___________________________________________________________________________
1/20
Introduction 1 A
1.10 Status display of the PLC and the I/O
• Displaying the status of the PLC
The self-tests performed continually by base PLCs, peer PLCs and I/O extensions display their status on the front panel via 4
LEDs : RUN, ERR, I/O and COM.
LED LED status
Base PLC or peer PLC
RUN ERR
COM I/O
I/O extension
RUN on
(green) flashing off
PLC in RUN
PLC in STOP or execution fault same as base PLC same as base PLC
ERR
(red) on flashing off not powered or application not executable incorrectly or not connected internal faults (watchdog, etc) same as base PLC application not executable - - - - - - - - - - -
OK OK
COM
(yellow) on flashing exchanges present on extension link (1) same as base PLC exchanges present on Modbus slave (1) - - - - - - - - - - -
I/O
(red) off on flashing off
no exchanges on extension link or Modbus
I/O fault (outputs tripped, sensor supply) same as base PLC
OK
(1) Operation of the I/O or Modbus is exclusive
-
OK
• Displaying the I/O
The status of each I/O point is displayed on the front panel of the PLC via a red LED for
PLCs version V3.0 or earlier, and a green LED for PLCs version V3.0 or later.
RUN ERR
I
0
O
0
1 2
1 2
3
3
4
COM I/O
PLC with 10 I/O
5 RUN ERR
I
0
O
0
1
1 COM I/O
PLC with 16 I/O
2 3 4 5 6 7 8
2 3 4 5 6
RUN ERR
COM I/O
I
0
O
0
1 2
1 2
3 4
3 4
5 6 7 8 9
5 6 7 8 9
10 11 12 13
LED on : I/O on
LED off : I/O off
PLC with 24 I/O
When switched on, all LEDs are lit for approximately 1s.
___________________________________________________________________________
1/21
A
• Displaying internal bits
When system bit %S69 is set to 1, TSX Nano PLCs can display the status of 8 or 16 internal bits, rather than displaying the I/O status. The numbering of memory bits is fixed from 112-127.
The corresponding display on the front panel is shown below :
10 I/O PLC
Flashing (1)
RUN ERR
COM I/O
I
0
O
0
1 2
1 2
3
3
4 5
16 I/O PLC
Flashing (1)
RUN ERR
COM I/O
I
0
O
0
1
1
2 3 4 5 6
2 3 4 5 6
7 8
24 I/O PLC
Flashing (1)
RUN ERR
COM I/O
I
0
O
0
1 2
1 2
3 4 5 6 7 8 9 10 11 12 13
3 4 5 6 7 8 9
(1) series of 5 short flashes, once every second
___________________________________________________________________________
1/22
Introduction 1 A
1.11 Analog modules
1.11-1 Presentation
TSX 07 3
● ●●●●
PLCs (starting from version V3) are able to manage the analog input or output modules.
Each PLC can support a maximum of one input module and one output module.
The analog input module is managed via the fast counting input on the PLC.
The analog output module is managed via the PWM output on the PLC.
TSX Nano
Fast input counter
% I 0.0
1 ANA input module
1 ANA output module
%Q0.0
Pulse output (PWM)
The fast counting input and the PWM output are configured in the PL7-07 configuration menu.
Management of the control of input functions, the value of the analog input read, the control of output functions and the analog output value to be generated are determined by reading and writing system words %SW100 to %SW103 in the application.
For details on managing the analog I/O modules see Part B Section 4.
___________________________________________________________________________
1/23
A
1.11-2 Summary of catalog references
Module
1 input 1 output
●
●
●
●
●
●
Range
0-10V
●
4-20mA +/- 10V
●
●
●
●
●
Resolution
8 bits 10/12 bits
●
●
●
References
TSX AEN 101
TSX AEN 102
TSX AEN 105
●
●
●
TSX ASN 101
TSX ASN 102
TSX ASN 105
___________________________________________________________________________
1/24
2.1
Dimensions
• PLCs with 10 I/O : TSX 07
●●
10
●●
2
2 Dimensions/Mounting/Installation
A
105 mm
4.13 inches
• PLCs with16 I/O : TSX 07
●●
16
●●
, except TSX 07
●
1 1648
60 mm
2.36 inches
135 mm
5.31 inches
60 mm
2.36 inches
• PLCs with 24 I/O : TSX 07
●●
24
●● and 16 I/O: TSX 07
●
1 1648
165 mm
6.49 inches
• Analog I/O : TSX AEN 10
●
and TSX ASN 10
●
60 mm
2.36 inches
45 mm 70 mm
___________________________________________________________________________
2/1
A
2.2
Mounting
TSX Nano PLCs and analog modules can be mounted on :
• a mounting plate or panel using 2 Ø M3 screws (not supplied)
• a 35 mm DIN mounting rail.
• Mounting on a mounting plate or panel using screws
TSX NANO PLC
2xØ4.5
TSX AEN/ASN
2xØ4.5
PLC
X
X 20 min.
(0.787")
35
(1.378")
45
TSX 07
●●
10
●●
TSX 07
●●
16
●●
TSX 07
●
1 1648 TSX 07
●●
24
●●
86 mm
3.38 inches
116 mm
4.56 inches
146 mm
5.74 inches
146 mm
5.74 inches
• Mounting on a 35 mm DIN rail
Mounting Removal
2
Position the PLC and clip it on to the DIN rail as shown in the above diagram.
1
1 With a screwdriver, release the latch at the back which locks the PLC onto the DIN rail.
2 Keeping the latch open, pivot the PLC as shown in the above diagram.
!
HAZARD OF EQUIPMENT DAMAGE
CAUTION
When mounting PLCs and analog modules on a DIN rail, use 2 end stops, type
AB1-AB8P35 or equivalent.
Failure to observe this precaution can cause equipment damage or personal injury.
___________________________________________________________________________
2/2
Dimensions/Mounting/Installation 2
A
2.3
Installation rules
TSX Nano PLCs and analog modules should be mounted on a vertical plane and at the minimum distances shown on the figure below, in order to maintain a natural circulation of air.
• Mounting positions
- Vertical plane
1 End stops AB1-AB8P35
2 Cover
2
2
1 1 1
- Horizontal plane : Do not mount on a horizontal plane.
• Minimum clearances to be observed
2 a
2
1
1 Switchgear, enclosure or machine frame.
2 Cable ducting or clips.
a
≥
20 mm b
≥
40 mm
Avoid mounting heat generating devices (transformers, power supplies, contactors, etc) beneath the PLCs.
___________________________________________________________________________
2/3
A
___________________________________________________________________________
2/4
3
3 Connections
3.1
I/O wiring rules and precautions
3.1-1 General precautions and rules
The connection terminals on TSX Nano PLCs are protected by a removable cover which protects users when the PLC is powered up. Each terminal can take up to two 1 mm 2
(16 AWG) wires fitted with open or closed cable ends. Coupling torque of terminal screws : max. 0.5 Nm.
Dimensions:
3
1 5.5 mm
1 1 2 3.2 mm
3 5 mm
2
When using closed cable ends, it is necessary to remove the cover in order to take out the screw needed for fixing the cable ends.
A
!
CAUTION
HAZARD OF EQUIPMENT DAMAGE
Be sure to remove power from any device before connecting or disconnecting inputs or outputs to terminals.
Failure to observe this precaution can cause equipment damage.
Removing the cover
L N
100/240VAC
2
1
IN
COM
0
+
24VDC
—
OUT
TSX Nano
QAD
3
I
0
RUN ERR
O
0
COM
I/O
1
2
1
2
3
3
4
5
4
5
SG
A
INPUTS 24 VDC
OUTPUTS 2A Ry
OUT
COM
0
1
2
OUT
COM
3
TSX Nano PLCs have integral protective devices on the I/O, which give them a good resistance to industrial environments. However, certain rules must be observed so as to maintain this immunity.
• Discrete inputs
All multi-core cables carrying sensor data must include the sensor common.
• Discrete outputs
Relay outputs : the following must be connected in parallel with the terminals of the output :
- An RC or MOV (ZNO) protection circuit for AC.
- A freewheel diode for DC.
• Cable routing
- External to the device
All I/O wiring must be routed in cable ducting which is separate from those carrying high voltage cables, and at least 100 mm (4 inches) from parallel power cables.
- Inside the device
Power cables (power supply, contactors, etc) must be kept separate from input
(sensors) and output wiring.
If possible, I/O wiring should be routed in separate cable ducting.
____________________________________________________________________
3/1
A
3.1-2 Special precautions for connecting low noise immunity inputs
Some inputs can be configured as :
• Fast counters or frequency meter inputs, with a frequency of 5 or 10 kHz (input %I0.0).
• Up/down counter inputs, 1 kHz (inputs : upcounter %I0.0, downcounter %I0.3).
• Latching inputs (inputs %I0.0 to %I0.5).
• Discrete inputs without filter (%I0.0 to %I0.3 and %I0.4 to %I0.7).
The noise immunity of the inputs which have been configured in this way is reduced, and certain connection precautions must be taken.
• Input %I0.0 used as a fast counter or frequency meter input (5 or 10 kHz), 1 kHz counter input, latching input or discrete input without filter :
A shielded cable must be used with :
- the cable shield connected to terminal C (COM), the input common (to the power supply - with positive logic (sinking) inputs or to the power supply + with negative logic
(sourcing) inputs),
- terminal C (COM) connected to the machine protected ground.
Example : Wiring diagram for connecting input %I0.0 to a 3-wire sensor wired for positive logic
Sensor supply
+ shielded cable
3-wire sensor
+ S
PLC supply
3A shield connection < 20 cm protected machine ground
C 0 1 2 3 4 5 13
TSX 07 ii ii
02/08/12/22/28
Note : When using the 1 kHz up/down counting function, input %I0.3, which is used as the downcounting input, will be connected following the same principle as for input %I0.0
___________________________________________________________________________
3/2
Connections 3
A
• Other inputs used as latching inputs (%I0.1 to %I0.5) or discrete inputs without filter (%I0.1 to I0.7) :
The general principle is to group together on the same cable all the wires relating to the sensor which is controlling the input. Thus one cable is used per I/O point.
Example : Wiring diagram with inputs wired for positive logic (sinking)
PLC supply
- + S cable
+ cable
+ -
3A
C 0 1 2 3 4 5 13
TSX 07 ii ii
02/08/12/22/28
____________________________________________________________________
3/3
A
3.2
Connection of power supply
• 24 VDC power supply
–
+ a
Q
KM
3A
–
+ to DC power input terminals
+ – to a output power supply
+ a 24V
–
TSX 07
●● ●●●
2
Q Master switch
KM Line contactor or circuit breaker (not essential on small installations)
3A Fuse for protecting the PLC power supply (3A)
• 100 to 240 VAC power supply
N c
L
Q
KM
Note : The 24VDC power input is not available on the
TSX 07 21 1648 115 VAC input model.
3A
+
– to DC power input terminals
L N
100/240V c
+ – to c output power supply a a 24V
TSX 07
●● ●●●
8
Q Master switch
KM Line contactor or circuit breaker (not essential on small installations)
Fu1 Fuse for protecting the PLC power supply (3A)
Key : c AC, a DC
___________________________________________________________________________
3/4
Connections 3
A
3.3
Discrete input connections
3.3-1 24V input connections
• Connection of the positive logic (sinking) inputs
On PLCs with AC supply :
- 10 I/O : TSX 07
●
0 1008, TSX 07
●
0 1028
- 16 I/O : TSX 07
●
1 1608, TSX 07
●
1 1628
- 24 I/O : TSX 07
●
1 2408, TSX 07
●
1 2428 c 100/240V
3A
L N
3-wire prox. sens.
–
PNP
+
+
+ – C 0 1 2 3 4 5
+
2-wire prox. sens.
–
13 a a 24V
Inputs
TSX 07
●● ●●
08/28
On PLCs with DC supply :
- 10 I/O : TSX 07
●
0 1002, TSX 07
●
0 1012, TSX 07
●
0 1022
- 16 I/O : TSX 07
●
1 1602, TSX 07
●
1 1612, TSX 07
●
1 1622
- 24 I/O : TSX 07
●
1 2402, TSX 07
●
1 2412, TSX 07
●
1 2422
+ a 24V
–
3A
+ –
3-wire prox. sens.
–
PNP
+
+
2-wire prox. sens.
+
–
C 0 1 2 3 4 5 13
Inputs
TSX 07
●● ●●
02/12/22
____________________________________________________________________
3/5
A
• Connection of the negative logic (sourcing) inputs
On PLCs with AC supply :
- 10 I/O : TSX 07
●
0 1008, TSX 07
●
0 1028
- 16 I/O : TSX 07
●
1 1608, TSX 07
●
1 1628
- 24 I/O : TSX 07
●
1 2408, TSX 07
●
1 2428 c 100/240V
3A
L N
+
3-wire prox. sens.
–
NPN
–
+ – C 0 1 2 3 4 5
+
–
2-wire prox. sens.
13 a a 24V
Inputs
TSX 07
●● ●●
08/28
On PLCs with DC supply :
- 10 I/O : TSX 07
●
0 1002, TSX 07
●
0 1012, TSX 07
●
0 1022
- 16 I/O : TSX 07
●
1 1602, TSX 07
●
1 1612, TSX 07
●
1 1622
- 24 I/O : TSX 07
●
1 2402, TSX 07
●
1 2412, TSX 07
●
1 2422
+
3A
+ a 24V
–
–
+
3-wire prox. sens.
–
NPN
–
C 0 1 2 3 4 5
+
–
2-wire prox. sens.
13
Inputs
TSX 07
●● ●●
02/12/22
___________________________________________________________________________
3/6
Connections 3
A
3.3-2 Connection of 115 VAC inputs
• PLC : TSX 07
●
1 1648 c 115V
N L c 100/240V
3A
3A
L N C 0 1 2 3 4 5 6 7 8
Inputs
TSX 07
●
1 1648
3.4
Connection of discrete outputs
3.4-1 Connection of relay outputs
(except TSX 07
●
1 1648)
• PLCs with 10 I/O : TSX 07
●
0 1022, TSX 07
●
0 1028
TSX 07
●●
1022/1028
Outputs
C 0 1 2 C 3
*
L N
* c 24...240V/ a 24V
L N
3/7
A
Connection of relay outputs (continued)
• PLCs with 16 I/O : TSX 07
●
1 1622, TSX 07
●
1 1628
TSX 07
●●
1622/1628
Outputs
C 0 1 2 3 C 4 5 C 6
*
L N
*
L N
*
L N c 24...240V/ a 24V
★ :
fuse rated for load c 24...240V/ a 24V
• PLCs with 24 I/O : TSX 07
●
1 2422, TSX 07
●
1 2428
Outputs
TSX 07
●●
2422/2428
C 0 1 2 3 C 4 5 6 7 C 8 C 9
*
L N
*
L N
*
L N
*
L N c 24...240V/ a 24V c 24...240V/ a 24V
★ :
fuse rated for load
Essential protection for each output terminal
• An RC circuit or MOV (ZNO) suppressor circuit for AC
• A freewheel diode for DC
+
– c (AC) a (DC)
___________________________________________________________________________
3/8
Connections 3
A
3.4-2 Connection of relay outputs on TSX 07
●
1 1648 PLC
TSX 07
●
1 1648
Outputs
C 0 1 2 3 C 4 C 5 C 6
*
L N
*
L N
*
L N
*
L N c 24...240V/ a 24V
★ :
fuse rated for load
Essential protection for each output terminal
• An RC circuit or MOV (ZNO) suppressor for AC
• A freewheel diode for DC c 24...240V/ a 24V c (AC)
3.4-3 Connection of negative logic (sinking) transistor outputs
• PLCs with 10 I/O : TSX 07
●
0 1002 and TSX 07
●
0 1008
TSX 07
●
0 1002/1008
Outputs
+
– a (DC)
C 0 1 2 3
+
V
–
*
+ a 24V
:
fuse rated for load
3/9
A
Connection of negative logic (sinking) transistor outputs (continued)
• PLCs with 16 I/O : TSX 07
●
1 1602 and TSX 07
●
1 1608
TSX 07
●
1 1602/1608
Outputs
C 0 1 2 3 C 4 5 6 + V
–
*
+ a 24V
★ :
fuse rated for load
• PLCs with 24 I/O : TSX 07
●
1 2402 and TSX 07
●
1 2408
TSX 07
●
1 2402/2408
Outputs
C 0 1 2 3 4 C 5 6 7 8 9
+
V
–
*
+ a 24V
★ :
fuse rated for load
___________________________________________________________________________
3/10
Connections 3
A
3.4-4 Connection of positive logic (sourcing) transistor outputs
• PLC with 10 I/O : TSX 07
●
0 1012
TSX 07
●
0 1012
Outputs
C 0 1 2 3
-
V
*
+ – a 24V
★ :
fuse rated for load
• PLC with 16 I/O : TSX 07
●
1 1612
Outputs
TSX 07
●
1 1612
C 0 1 2 3 C 4 5 6
-
V
*
+ – a 24V
★ :
fuse rated for load
____________________________________________________________________
3/11
A
Connecting positive logic transistor (sourcing) outputs (continued)
• PLC with 24 I/O : TSX 07
●
1 2412
TSX 07
●
1 2412
Outputs
C 0 1 2 3 4 C 5 6 7 8 9
-
V
*
+ – a 24V
★ :
fuse rated for load
___________________________________________________________________________
3/12
Connections 3
A
3.5
I/O extension connections
The I/O extension is connected to the base PLC via a shielded twisted pair cable :
• Cable length 30 cm (12 inches) : reference TSX CA 0003.
• If a longer cable is required, use :
- either a UNI-TELWAY shielded twisted double pair cable :
TSX CSA 100 : length 100 meters (330 feet), or TSX CSA 200 : length 200 meters
(650 feet)
- or a shielded twisted pair cable, the main characteristics of which are defined below :
Structure Mechanical characteristics :
Tinned copper core, 18 to 24 gauge, tinned copper shield
Electrical characteristics :
Load resistance per unit length of one wire :
≤
85
Ω
/ Km
Load resistance per unit length of shield :
≤
12
Ω
/ Km copper core
PVC insulation tinned copper shield
PVC insulation
The maximum authorized distance between the base PLC and the I/O extension is
200 meters (650 feet).
Base PLC
TSX Nano
I/O extension
TSX Nano
A white
B blue
SG green extension link shielded twisted pair cable
Note :
Colors shown refer to connection using cable TSX CA 0003 white
A B green
SG blue shield
____________________________________________________________________
3/13
A
3.6
Connection of peer PLCs
Peer PLCs are connected to the base PLC in the same way as I/O extensions, that is via a shielded twisted pair cable (for the cable to use see the previous page).
The maximum permitted distance between the base PLC and the last peer PLC is
200 meters (650 feet).
• Connection of an I/O extension to the base PLC, and a peer PLC.
Base PLC
TSX Nano
A B SG A
I/O extension
TSX Nano
B SG A
Peer PLC 2
TSX Nano
B SG shield shielded twisted pair cable shielded twisted pair cable
Note :
If peer PLCs 3 and 4 are used, the continuity of the extension link is provided by a shielded twisted pair cable with identical connections to those between the I/O extension and peer PLC 2.
• Connection of peer PLCs only to the base PLC.
A
Base PLC
TSX Nano
B SG A
Peer PLC 2
TSX Nano
B SG A
Peer PLC 3
TSX Nano
B SG shield shielded twisted pair cable shielded twisted pair cable
Note :
If peer PLC 4 is being used, the continuity of the extension link is provided by a shielded twisted pair cable with identical connections to those between the I/O extension and peer PLCs 2 and 3.
___________________________________________________________________________
3/14
Connections 3
A
3.7
Connection of analog inputs
3.7-1 Connection with input 0 of the TSX Nano wired as source (negative logic)
+
24 VDC
–
FG
supply
(1)
+ —
24V DC
TSX NANO
INPUT
………
SINK
SCE
POWER
ANALOG INPUT
ANALOG
INPUT
+ —
TO TSX
(IN 0)
+ — IN
COM
0
TSX 07 •• ••••
(except TSX 07 •1 1648)
(2)
Sensor
SCE
(1) Maximum 2 meters with Ø 0.5 mm shielded cable
(2) Maximum 50 meters with Ø 0.5 mm shielded cable (shielding connected at module end)
3.7-2 Connection with input 0 of the TSX Nano wired as sink (positive logic)
+ 24 VDC
–
FG supply
(1)
+ —
24V DC
TSX NANO
INPUT
………
SINK
SCE
POWER
ANALOG INPUT
ANALOG
INPUT
+ —
TO TSX
(IN 0)
SINK
+ —
IN
COM
0
TSX 07 •• ••••
(except TSX 07 •1 1648)
(2)
Sensor
(1) Maximum 2 meters with Ø 0.5 mm shielded cable
(2) Maximum 50 meters with Ø 0.5 mm shielded cable (shielding connected at module end)
____________________________________________________________________
3/15
A
3.8
Connection of analog outputs
3.8-1 Connection with source output 0 of the TSX Nano (positive logic)
TSX 07 3• ••12
OUT
COM
0 1 2 3 -V
+ —
24V DC
TSX NANO
OUTPUT
………
SCE
SINK
POWER
ANALOG OUTPUT
ANALOG
OUTPUT
+ —
TO TSX
(OUT 0)
SINK
(1)
+
–
FG
24 VDC supply
(2)
Speed controller
(1) Maximum 2 meters with Ø 0.5 mm shielded cable
(2) Maximum 50 meters with Ø 0.5 mm shielded cable (shielding connected at module end)
3.8-2 Connection with sink output 0 of the TSX Nano (negative logic)
TSX 07 3• ••02/08
OUT
COM
0 1 2 3 +V
+ —
24V DC
TSX NANO
OUTPUT
………
SCE
SINK
POWER
ANALOG OUTPUT
ANALOG
OUTPUT
+ —
TO TSX
(OUT 0)
SCE
(1)
+
–
FG
24 VDC supply
(2)
Speed controller
(1) Maximum 2 meters with Ø 0.5 mm shielded cable
(2) Maximum 50 meters with Ø 0.5 mm shielded cable (shielding connected at module end)
(3) These references will be marketed in 1997.
___________________________________________________________________________
3/16
4
4 Special functions
4.1
RUN/STOP input
Principle
The RUN/STOP input is used to start or stop program execution.
On a base or peer PLC, one of the first 6 inputs (%I0.0 to %I0.5) may, after configuration via the terminal, be assigned to this function.
When powering up the PLC, the PLC state is determined by the RUN/STOP input (if configured):
• PLC in STOP if the configured RUN/STOP input is at state 0,
• PLC in RUN if the configured RUN/STOP input is at state 1.
While the PLC is powered, a rising edge on the RUN/STOP input sets the PLC to RUN.
The PLC is forced to STOP if the RUN/STOP input is at 0. If the RUN/STOP input is at state 0, a RUN command from a connected terminal will be ignored by the PLC.
Example : RUN/STOP switch on input %I0.3
A
Base PLC RUN/STOP
C 0 1 2 3 4 5
C 0 1 2
PLC status
RUN
STOP
1 status %I0.3
0
4.2
PLC status (SECURITY) output
Principle
When the PLC is powered up and if no PLC error (blocking fault see appendix A.6) is detected, the PLC status (security) output changes to 1. It can be used in safety circuits external to the PLC, for example to control :
• The power supply to output devices.
• The PLC power supply.
On a base or peer PLC, one of the first 4 outputs (%Q0.0 to %Q0.3) may, after configuration via the terminal, be assigned to the PLC status (SECURITY) function.
Base PLC
PLC running
PLC stopped or faulty
Output %Q0.0
1
C 0 1 2
KA
0
Appearance of a fault which stops the PLC
Power supply to outputs
Example : output
%Q0.0 configured as PLC status
4/1
A
4.3
Latching inputs
Principle
When a pulse is shorter than one scan and has a value greater than or equal to
100
µ s (1), the PLC latches the pulse, which is then updated in the next scan.
On a base PLC or peer PLC, each of the first 6 inputs (%I0.0 to %I0.5) can be assigned to the special latching function, after configuration via the terminal.
Base PLC
C 0 1 2 3 4 5
PLC scan
C 0 1 2
PLC scan
PLC scan
PLC scan
PLC scan
PLC scan
I P O I P O I P O I P O I P O
Physical input status
1
0
Latching of the physical input status for
1
0 processing during next scan
Key :
• I : read inputs
• P : process program
• O : update outputs.
Note :
A pulse which lasts longer than one scan will be treated as a pulse received at a standard input.
4/2
Special functions 4
A
4.4
I/O associated with fast counting
The TSX Nano PLC has a fast counter which can be used in three different ways :
• As a fast counter (maximum frequency 10 kHz).
• As a frequency meter (maximum frequency 10 kHz) which can, in particular, be used to manage an analog input module.
• As a fast up/down counter (maximum frequency 1 kHz).
Sensors with transistor outputs must be used with up/down counter inputs %I0.0 and
%I0.3. NOTE: Do not use sensors with contact outputs with fast counter inputs, as this kind of sensor is susceptible to bounce because of low noise immunity.
Proximity sensor
C 0 1 2 3 4 5
Photoelectric sensor
Pulse generator
Functions
C 0 1 2
Upcounter
Counter set
(reset counter to 0)
Enable
Downcounter
Read the current value (2)
Threshold output 0 (HSC_Out) -
-
Threshold output 1 (HSC_Out) -
-
-
Base PLC
Inputs
%I0.0
%I0.1
%I0.2 %I0.3
%I0.4
-
● -
● (1)
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
● (1) -
-
-
-
● -
-
-
-
● (1)
-
-
Outputs
%Q0.1 %Q0.2
-
-
-
-
-
-
-
● (1)
-
-
● (1)
The parameters of the function to be performed (fast counter, frequency meter, up/down counter) are set using a special %FC function block (see Part B, Section 3.3-5).
(1) These I/O are optional. Their use must be declared during configuration.
(2) Available only for the up/down configuration of the fast counter.
___________________________________________________________________________
4/3
A
4.4-1 Use as a fast counter
The fast counter (FC) function enables counting at a maximum frequency of 10 kHz or
5 kHz depending on the selection made at configuration, with the possibility of counting from 0 to 65535 pulses.
(1)
(1) 50
µ s at 10 kHz
100
µ s at 5 kHz
Counting input
Set input to 0
Enable counter input
C 0 1 2
Base PLC
C 1 2
FC threshold output 0
FC threshold output 1
The counter receives the pulses to be counted at the PLC input (%I0.0). If the counter enable input (%I0.2) is configured and at state 1, the pulses are counted by the counter and the counting value (current value FC.V) is constantly compared to 1 or 2 thresholds,
FC.S0 and FC.S1, which are defined during configuration but can be modified by the program.
Resetting the counter to 0 is prompted by the rising edge of the input (%I0.1).
The FC threshold outputs 0 and 1 (%Q0.1 and %Q0.2) are controlled directly by the fast counter (without waiting for the outputs to be updated at the end of the scan).
The user can program outputs to be either 0 or 1 under any of the following conditions:
when FC.V < threshold 0 < threshold 1
when threshold 0
≤
FC.V
≤
threshold 1
when threshold 0 < threshold 1 < FC.V
Certain commands (enable counter, set current value to 0), can also be executed from the user program.
Note :
The software setup (configuration, special instructions, etc) and the timing diagram of the fast counter operation are explained in Part B, Section 3.3-5.
___________________________________________________________________________
4/4
Special functions 4
A
4.4-2 Use as a frequency meter
The frequency meter function measures the frequency of a periodic signal (in Hz). The principle of this measurement is to count the number of pulses received within a specified period or time base. The frequency range which can be measured is from 1
Hz to 10 kHz. This function can, in particular, be used to manage an analog input module.
Time base
100ms
1s
Measurement range Accuracy
10Hz-10kHz 0.1% for 10kHz
10% for 100Hz
1Hz-10kHz
Refresh
10 times per second
0.01% for 10kHz Once per second
10% for 10Hz
Counting input Enable counter input
C 0 2
Base PLC
The frequency meter receives pulses at the PLC input (%I0.0). If the counter enable input (%I0.2) is configured and at state 1, the pulses are accepted by the counter, and the counting value (current value FC.V) changes throughout the measuring period. At the end of the measuring period, the current value FC.V corresponding to the frequency is read.
Input (%I0.1) resets the current value FC.V to 0.
This command (enable counter) can also be executed from the user program.
Note :
The software setup (configuration, special instructions) and the timing diagram of the frequency meter operation are explained in Part B, Section 3.3-5.
___________________________________________________________________________
4/5
A
4.4-3 Use as an up/down counter
The fast up/down counter function counts up or down at a maximum frequency of 1 kHz with the possibility of counting from 0 to 65535 pulses.
Set input Enable up/down counter input
Counting input Down counting input
Base PLC
C 0 1 2 3 4
Read current value input
C
FC threshold output 0
1 2
FC threshold output 1
The counter receives the pulses to be upcounted at PLC input (%I0.0) and the pulses to be downcounted at PLC input (%I0.3). If the up/down counting enable input (%I0.2) is configured and at state 1, the pulses are taken into account and the up/down counting value (current value FC.V) is constantly compared to 1 or 2 thresholds FC.S0 and
FC.S1, which are defined during configuration and can be modified by the program.
Information about whether the counter is counting up or down is available as a bit in system word SW111.
The preset value (0 to 65535), which is defined during configuration and can be changed by the program, is loaded into the current value on the rising edge of the input (I0.1).
Input (%I0.4) is used to read the current value FC.V on the fly.
Fast counter threshold outputs 0 and 1 (%Q0.1 and %Q0.2) are controlled directly by the fast up/down counter (without waiting for the outputs to be updated at the end of the scan).
The user can program outputs to be either 0 or 1 under any of the following conditions:
when FC.V < threshold 0 < threshold 1
when threshold 0
≤
FC.V
≤
threshold 1
when threshold 0 < threshold 1 < FC.V
Certain commands (up/down counter enable, set) can also be executed from the user program.
Note :
The software setup (configuration, special instructions) and the timing diagram of the up/down counter operation are explained in Part B - Section 3.3-5.
___________________________________________________________________________
4/6
Special functions 4
A
4.5
PULSE output : generating a pulse train
On a base or peer PLC, output %Q0.0 can be assigned to the special "PULSE" function, after configuration via the terminal.
Principle
A user-defined function block (%PLS) can generate a signal on output %Q0.0. This signal has a variable period but has a constant duty cycle, or on to off ratio, of 50% of the period.
1
%Q0.0
0
Constant on to off ratio
T/2 T/2 T1/2 T1/2
Variable period
T T1
The value of period T and the number of pulses to be generated are defined by configuration of function block %PLS.
Configuration parameters :
• Definition of the period : T = TB x %PLS.P
TB = time base
- 0.1 ms (can only be used on a PLC with transistor outputs)
- 10 ms (default value), or 1s.
%PLS.P = preset value :
- 0
≤
%PLS.P < 32767 with TB = 10ms or 1s
- 0
≤
%PLS.P < 255 with TB = 0.1ms
• Definition of number of pulses to be generated on output %Q0.0 : %PLS.N
The number of pulses to be generated in period T (%PLS.N) can be limited or unlimited depending on the definition made at configuration :
- 0 < %PLS.N <32767
- %PLS.N=0 : unlimited generation
Range of periods available include :
• 0.2 ms to 26 ms in steps of 0.1ms (38 Hz to 4.9 kHz).
• 20 ms to 5.45 min in steps of 10 ms
• 2 s to 9.1 hours in steps of 1s.
Note : The complete parameter setting for function block %PLS is defined in Part B, Section 3.3-4.
Example of application : control of a stepper motor
Base PLC
C 0 1 2 3 4 5
%PLS function block
Stepper
Amplifier/ translator
Stepper motor
C 0 1 2
___________________________________________________________________________
4/7
A
4.6
PWM output : pulse width modulation
On a base or peer PLC, output %Q0.0 can be assigned to the specific "PWM" function, after configuration via the terminal. This function, from TSX07 version V3 or later, can be used, in particular, to manage analog output modules.
Principle
A user-definable function block (%PWM) generates a signal on output %Q0.0. This signal has a constant period with the possibility of varying the duty cycle, or on to off ratio.
1
%Q0.0
0
50%T Variable on to off ratio 75%T
T
Constant period
T
The value of period T and the percentage of the signal at state 1 in a period are defined in the configuration of function block %PWM :
Configuration parameters :
• Definition of period : T = TB x %PWM.P
TB = time base :
- 0.1ms (obligatory for analog output management; can only be used on a PLC with transistor outputs),
- 10ms (default value), or 1s
%PWM.P = preset value (not used for analog output management) :
- 0 < %PWM.P
≤
32767 with time base 10ms or 1s
- 0 < %PWM.P
≤
255 with time base 0.1ms
• Definition of period ratio : %PWM.R = Tx(%PWM.R/100)
%PWM.R gives the percentage of signal at state 1 in a period (0<%PWM.R
≤
100).
Range of periods available :
• 0.2 ms to 26 ms in steps of 0.2 ms (38 Hz to 4.9 kHz).
• 20 ms to 5.45 min in steps of 10 ms.
• 2 s to 9.1 hours in steps of 1s.
Note : The complete parameter setting for function block %PWM is defined in Part B, Section 3.3-3.
Example of application : control of a dimmer switch
Base PLC
C 0 1 2 3 4 5
%PWM function block
C 0 1 2
___________________________________________________________________________
4/8
5.1
Power supply characteristics
5
5 Characteristics/Service conditions
A
PLC
Power supply
Supply voltage nominal
Frequency limit nominal limit
Power required
Integral and electronically
fused(1) sensor supply duration Micro-cuts
Primary/ground isolation
IEC 1131-2 conformity
TSX 07
●● ●●
08/28/48 c (AC)
100 to 240V
85 to 264V
50/60 Hz
47 to 63 Hz
≤
30VA a 24V /150 mA
≤
10ms
2000V rms -50/60 Hz yes
TSX 07
●● ●●
02/12/22 a (DC)
24V
-
19.2 to 30V
-
-
≤
14W
≤
1 ms
2000V rms -50/60 Hz yes
(1) Except on TSX 07
●
1 1648 PLC
___________________________________________________________________________
5/1
A
5.2
24VDC and 115VAC discrete input characteristics
PLC
Type
Logic (1)
Sensor common
Type
Nominal input values voltage current peak current on activation sensor supply
TSX 07 a
●● ●●
02/08/12/22/28
24V (resistive) pos. (sink) to + of supply isolated
24V
-
7 mA (2)
neg. (source) to - of supply -
24V
7mA (2) isolated
110/120V
10 mA
300 mA (at 110V)
19.2 to 30V (including ripple)
TSX 07
●
1 1648
c 115V (capacitive)
Input limit values
Filtering frequency current limitation N/A state 1 voltage current state 0 voltage current
≥
11V
≥
2.5 mA at 11V
≤
5V
≤
1.2 mA
50 to 60 Hz
≤
1.5A
≤
8V
≥
2.5
mA at 8V
N/A
≥
79 V
≥
4mA at 79V
Vps - 5V
≤
20V
≤
1.2
mA
≤
2 mA frequency default values
-
0 to 1 12 ms programmable values
-
12 ms
47 to 63 Hz
12 ms
1 to 0 12 ms 12 ms 12 ms
0 to 1 100
µ s/3ms/12ms on %I0.0 to %I0.7
375
µ s/3ms/12ms on %I0.8 to %I0.13
1 to 0 100
µ s/3ms/12ms on %I0.0 to %I0.7
375
µ s/3ms/12ms on %I0.8 to %I0.13
-
-
-
-
Isolation between groups 1500V rms -50/60 Hz of I/O points
Compatibility 2-wire prox sens yes (TE) yes (TE)
1500V rms -50/60 Hz yes (TE)
Compatibility 3-wire prox sens yes yes -
IEC 1131-2 conformity yes (type 1) N/A yes (type 1)
Note : The I/O characteristics are given for a load rate of 100% for PLCs with 10 I/O and 80% for
PLCs with 16 and 24 I/O.
Load = total number of I/O simultaneously at state 1 divided by total number of I/O in the PLC.
(1) Positive or negative logic depending on the wiring (sink or source).
5/2
Characteristics/Service conditions 5
5.3
24VDC discrete transistor output characteristics
PLC
Type
DC load
Limit values nominal voltage nominal current tungsten filament lamp voltage (including ripple) current inrush
TSX 07
●● ●●
02/08
Unfused transistors (sink) a 24V
0.5 A
≤
10W
19.2 to 30V
0.625 A at 30V
4.0A for 10 ms
L/R 60 ms load resistance (minimum) 48
Ω load inductance (maximum 2.88 H
Logic
Load common
Leakage current at state 0
Voltage drop at state 1
Response time on resistive load
0 to 1
1 to 0
Electronic fusing for short-circuits and overloads overvoltages polarity inversions negative (sink) to + of power supply
≤
1 mA
≤
1.5 V (for I = 0.5 A)
≤
1 ms
≤
1 ms none (fit 1 fuse per output common) yes yes
TSX 07
●● ●●
12
Electronically fused transistors (source) c 24V
0.5 A
≤
10W
19.2 to 30V
0.625 A at 30V
1.5 A for 50 ms
automatically current limited
60 ms
48
Ω
2.88 H positive (source) to - of power supply
≤
1 mA
≤
2V (for I = 0.5 A)
≤
1 ms
≤
1 ms yes yes yes
Isolation between groups of I/O points 1500V rms -50/60 Hz
IEC 1131-2 conformity N/A
1500V rms -50/60 Hz yes
Notes :
• The I/O characteristics are given for a load rate of 100% for PLCs with 10 I/O and 80% for PLCs with 16 and 24 I/O.
Load rate = total number of I/O simultaneously at state 1 divided by total number of I/O in the PLC.
• In this case, it is possible to place 2 outputs in parallel. A discharge diode must be placed on the
PLC output terminals (not the load terminals).
___________________________________________________________________________
5/3
A
A
5.4
Discrete relay output characteristics
PLC
Type
AC load
TSX 07
●● ●●
22/28/48 relay voltage c 24V
AC12 resistive duty current 2A (1)
1A (2)
AC15 inductive
(continuous) duty voltage c 24V current 1A (1)
0.5A (3) c 48V
1A (2) c 48V
0.5A (3)
0.2A (5) c 110V
1A (2)
0.5A (4) c 110V c 220V
1A (3)
0.5A (4) c 220V
0.45A (3) 0.22A (3)
0.090A (5) 0.045A (5)
DC load
Response time
DC12 resistive duty
DC13 inductive duty opening closing
Electronic fusing for overloads and short-circuits inductive c overvoltages voltage a current 1A (1) voltage
24V a 24V -
-
-
-
-
-
-
-
current 0.4A (3)
≤
5 ms
≤
10 ms
none, fit 1 fuse per I/O point or group of I/O points none, an RC circuit or an MOV (ZNO) suppressor must be fitted in parallel with the terminals of each output inductive a overvoltages none, a freewheel diode must be fitted in parallel with the terminals of each output
Isolation betw. grps of I/O points 1500V rms - 50/60 Hz
IEC 1131-2 conformity yes yes yes yes
Note :
The I/O characteristics are given for a load rate of 100% for PLCs with 10 I/O and 80% for PLCs with 16 and 24 I/O.
Load rate = total number of I/O simultaneously at state 1 divided by total number of I/O in the PLC
(1) 0.3 x 10 6 operations
(2) 0.5 x 10 6 operations
(3) 1 x 10 6 operations
(4) 2 x 10 6 operations
(5) 10 x 10 6 operations
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5/4
Characteristics/Service conditions 5
5.5
Characteristics of analog I/O
Characteristics common to analog inputs and outputs
Supply
Isolation
Shocks
Vibrations
Climatic environment nominal voltage limit voltages nominal current at 24V inrush current power drawn voltage between supply and ground
a 24V a 21V to 30V
104 mA
10 A max
2.5 W c 1500 V voltage between input or output and ground c 1500 V resistance between supply and ground (500V) > 10 M
Ω resistance between input or output and ground (500V) > 10 M
Ω
300 m/s
2
, 3 shocks per axis, 3 axes
5 to 55Hz, 60 m/s
2
, 2 hours per axis, 3 axes operating temperature storage temperature relative humidity (without condensation)
0 to 60
°
C
-25
°
C to 70
°
C
45 to 85 %
0 to 2000m altitude
Characteristics of analog inputs
Input point number input impedance
Conversion permissible voltage without damage conversion method resolution conversion time precision (full scale)
Frequency output nominal voltage logic (switch on front panel)
1 ( high level )
6.6 M
Ω
(1) 250
Ω
(2)
+/- 16 V
U (V)
→
F (HZ)
10 bits or 12 bits
125 ms (3) /500ms (4)
+/- 1% at 25
°
C
a 24V positive or negative
Isolation protection against short-circuits no voltage between input and frequency output c 500 V resistance between input and frequency output >10 M
Ω
(1) 0/10V and -10/+10V modules (2) 4/20 mA module
5/5
A
A
Characteristics of analog outputs
Output point number
Conversion output signal value load impedance permissible voltage without damage protection against short-circuits conversion method
Frequency input resolution conversion time precision (full scale) nominal voltage logic (switch on front panel)
Isolation
1 ( high level )
0/10 V
≤
5 K
Ω
(1)
≤
250
Ω
(2)
+/- 12 V yes (continuous)
F (Hz)
→
U (V)
8 bits from 0 to 90%: 500ms max
+/- 1% at 25
°
C a 24V positive or negative input frequency 312.5 Hz voltage between output and frequency input c 500 V resistance between output and frequency input >10 M
Ω
(1) 0/10V and -10/+10V modules (2) 4/20 mA module
___________________________________________________________________________
5/6
Characteristics/Service conditions
5
5.6
Service conditions
5.6-1 Standards
TSX Nano PLCs have been developed to comply with the main national and international standards concerning electronic industrial control devices.
• Specific PLC requirements: operating characteristics, filtering, ruggedness, safety, etc.
EN61131-2 (IEC1131-2), CSA 22.2,
UL508
• Strict limitation of electromagnetic interference generated: CE marking
(European Directives on Low Voltage and EMC)
• Electrical qualities and self-extinguishing capability of insulating materials: UL
746C, UL 94, etc.
A
5.6-2 Environment, normal service conditions
• Climatic environment, normal conditions
Temperature
Operating temperature : 0 to 60 ° C (1)
Storage temperature : - 25
°
C to + 70
°
C
Humidity and altitude
Relative humidity : 5% to 95%
(non-condensing)
Altitude : 0 to 2000 meters (0-6500 feet)
• Resistance to vibration : In accordance with IEC 68-2-6 FC tests
• Resistance to mechanical shocks : In accordance with IEC 68-2-27 EA tests
(1) 0 to 55
°
C with TSX 07
●● ●●
12 when mounting vertically (on vertical plane)
___________________________________________________________________________
5/7
A
___________________________________________________________________________
5/8
6
6 Setup
A
6.1
Procedure for first power-up
The TSX Nano incorporates several selftests which continually monitor its operation.
The results of these self-tests are displayed on the front panel of the PLC. They can be made more detailed using the terminal.(1)
The diagram below shows the procedure for powering up the PLC for the first time.
TSX Nano PLC
Terminals
1
Power up, outputs not powered
OK: RUN
NOK: ERR NOK: I/O
2
ERR
Initialize the PLC memory
(see Part D,
Section 1) memory initialized by the terminal
OK: RUN
(see Part D,
Section 1)
• Connect the terminal.
• Initialize PLC memory by clearing the whole memory (Prg menu, Clr command).
: if using the PL7-07 software, create a
"new" application and transfer it to the PLC.
3
OK: RUN
Possible actions
• Check I/O connections.
• Configure and enter the program from the terminal :
- either directly into PLC memory (TSX mode)
- or into terminal memory (FTX mode), then transfer to the PLC memory.
• Set to RUN using RUN/STOP input %10.
● if it is configured, or via the terminal.
Key
LED flashing
LED lit continuously
(1) herein, the word "terminal" represents the FTX 117 Handheld terminal, or a PC compatible terminal or FTX 417/517 running PL7-07 PC programming software for the TSX Nano PLC.
___________________________________________________________________________
6/1
A
Summary
▼
Power up the PLC
▼
Connect the terminal and clear the
PLC memory from the terminal
(FTX 117) or create a new application
▼
Configure the application and enter program from the terminal :
• either directly into PLC memory
(TSX)
• or into terminal memory (FTX)
▼
No
▼
Enter program in terminal memory
Yes
Transfer the program to the PLC
RAM and EEPROM memories
▼
RAM EEPROM
CLR
PRG
TRF
Start program execution using the RUN command :
• either by the RUN/STOP input if it has been configured
• or from the terminal, using the
RUN command
RUN/STOP
RUN
___________________________________________________________________________
6/2
Setup 6
A
6.2
Checking the I/O connections
• Principle
This check ensures that :
- data from the sensors is received by the inputs and transmitted to the processor,
- commands from the processor activate the outputs and are transmitted to the corresponding output devices.
• Recommendations
In order to avoid any random movement of the machine, it is recommended that :
- power fuses be removed from the motor controls,
- pneumatic and hydraulic inputs be closed.
• Procedure
- Power up for the first time, as shown in Section 5.2. Ensure that the I/O
LED is not lit continuously.
- Leave the PLC in STOP.
- Select the Data Editor on the FTX 117 terminal, or the PL7-07 software.
TSX Nano PLC
Terminals
- Change the state of system bit %S8 (PLC status output) to state 0.
- Check the inputs by activating each sensor :
- Check that the LED on the front panel for the corresponding input changes state.
- Check on the terminal screen that the corresponding bit also changes state.
- Check the outputs using the terminal :
- Force the bit corresponding to each output to state 1.
- Check that the LED for the corresponding output changes state, as well as the associated output device.
- Using the terminal :
- Remove all forcing
- Reset system bit %S8 to state 1 (the outputs are set at 0).
Note : If the PLC does not contain the application program, this entire procedure can be performed in RUN. In this case, bit %S8 can remain at state 1 (default state).
___________________________________________________________________________
6/3
A
___________________________________________________________________________
6/4
7
7 Addendum
7.1
Power outages and returns
• Characteristics of power outages
- If power outages < power supply ridethrough : normal execution of the program
- If power outages > power supply ridethrough : processor powered down with context (data & program) saved.
!
CAUTION
UNEXPECTED EQUIPMENT OPERATION
If the PLC was in RUN when power was interrupted, the PLC will come up in
RUN when power is restored. Be sure to make PLC operation on power returns conditional on a manual operation, using system bits %S0, %S1, and %S9.
Failure to observe this precaution can result in equipment damage or personal injury.
• Warm restart : PLC restarts with the contents of the data memory in the same state as at the time of the power outage.
List of possible causes :
- PLC restart after power outage > power supply ridethrough
- System bit %S1 set to state 1 by the program or the terminal
Consequences upon return of power
- System bit %S1 set to state 1,
- Non-forced input bits set to state 0 (warning: setting to zero generates a
"false" rising edge on an input physically at 1 during a warm restart, see part
B, section 2.1-2).
- All I/O bits set to 0,
- All unsaved internal bits set to state 0 (%M64 to %M127)
- The state of the stored internal bits (%M0 to %M63) and current values of the function blocks (timers, counters, etc) are maintained
- The scan is restarted from the point at which it stopped at the power outage, without updating the outputs at the end of the scan. The scan is then restarted normally :
Reading the inputs
→
program processing
→
updating the outputs and setting system bit %S1 to 0
• Cold restart : PLC restarts with loss of contents of the data memory
List of possible causes :
- Back-up battery defective or absent
- System bit %S0 set to 1 by the program or the terminal
- Initialization of the PLC by the terminal
Consequences upon return of power
- System bit %S0 set to state 1
- All internal bits, I/O bits and internal words set to state 0
- The current values of the function blocks (timers, counters, etc), registers and step counters set to state 0
- Adjustment values modified by the terminal lost, and preset values defined during
A
7/1
A
- System bits and words initialized (except %S0 and the schedule block (RTC) data)
- Forcing cancelled
- Grafcet reinitialized
- Scan restarted from the beginning :
Reading the inputs
→
program processing
→
updating the outputs and setting system bit %S0 to 0
Programming example
In order to avoid automatic restarting of the control system when power returns, the program below enables manual intervention by pressing a "RESTART" button and keeps the outputs at 0 during the power outage. This program must be added to the application program.
One part of this program must be at the start of the program (pre-processing zone), the other part must be at the end of the program (post-processing zone).
%S0
%S1
Start of program
%M10
S
%S9
%M10
>>
%L0
%L0
%M10 %I0.1
%M10
R
End of program
000 LD %S0 If %S0 is at logic level 1: cold restart
001 OR %S1 OR %S0 is at logic level 1: warm restart
002 OR %M10 OR %M10 is at logic level 1: latch
003 S %M10
004 ST %S9
005 JMPC %L0 Jump to label %L0 if %S9 is at 1
006
007
Set internal bit %M10 to 1
Set outputs to 0
----
----
098
099
100 %L0 : Jump address
101 LD %M10 If %M10 is at logic level 1
102 AND %I0.1 AND input 1 is at logic level 1: RESTART
103 R %M10
104 END
Set internal bit %M10 to 0
End of program in preprocessing zone (start of program)
Application program in post-processing zone (end of program)
___________________________________________________________________________
7/2
Addendum 7
A
7.2
Initializing the PLC
Presentation
The PLC can be initialized by the program by setting system bit %S0 to 1, which corresponds to a cold restart (see Section 7.1). During a warm restart, it may be necessary to initialize the PLC. The example below shows how this can be programmed.
Initialization can also be requested from the terminal using the INIT command.
Programming
%S1 %S0
LD %S1
ST %S0
If %S1 = 1 (warm restart), set %S0 to 1 to initialize the PLC. These two bits are reset to 0 by the system at the end of the following scan.
IMPORTANT
System bit %S0 must not be set to 1 for more then one PLC scan.
7.3
Saving the program and data
Saving in the RAM
The user program and the data are contained in the PLC RAM memory. A battery in the
PLC provides the memory with independent operation for 30 days.
WARNING
This independence is ensured only if the battery is charged for at least 6 consecutive hours before the PLC is stopped.
___________________________________________________________________________
7/3
A
EEPROM storage
It avoids the risk of corrupting the program held in the RAM during a battery failure or a power outage lasting longer than 30 days.
On power-up, the PLC checks the integrity of the programs contained in the RAM and
EEPROM memories. In the event of data corruption, the program contained in the
EEPROM is automatically transferred to the RAM if the MST option (autoloading) has been selected (see part C, section 12.4).
PLC memory
RAM program and data
EEPROM program
WARNING
Once the application has been debugged, it is advisable to transfer it into EEPROM with the MST option selected.
___________________________________________________________________________
7/4
Description of
Instruction List and Ladder languages
Contents
Part B
Section
1 Introduction
1.1
General
1.2
Instruction List (List or IL)
1.3
Grafcet
1.4
Ladder diagrams
1.4-1 Programming principles
1.4-2 Reversibility
1.4-3 Reversible List programming conventions
2 Combinational and sequential instructions 2/1
2.1
Boolean processing
2.1-1 Definition of the main bit objects
2.1-2 Introduction to Boolean instructions
2.1-3 Load instructions LD, LDN, LDR, LDF
2.1-4 Assignment instructions ST, STN, S, R
2.1-5 Logic AND instructions AND, ANDN, ANDR, ANDF
2.1-6 Logic OR instructions OR, ORN, ORR, ORF
2.1-7 Exclusive OR instructions XOR, XORN, XORR, XORF
2.1-8 NOT instruction : N
2.1-9 Using parentheses
2.1-10 Instructions MPS, MRD, MPP
2.1-11 Special Ladder instructions OPEN and SHORT
2.2
Standard function blocks 2/11
2.2-1 Bit and word objects associated with standard function blocks 2/11
2.2-2 Programming principles 2/12
2.2-3 Timer function blocks %TMi
2.2-4 Up/down counter function blocks %Ci
2/13
2/17
2.2-5 LIFO/FIFO register function blocks %Ri
2.2-6 Drum controller function block %DRi
2/20
2/23
___________________________________________________________________________
B/1
2/1
2/1
2/2
2/4
2/4
2/5
2/5
2/6
2/7
2/7
2/9
2/10
Page
1/1
1/1
1/1
1/3
1/4
1/6
1/8
1/9
B
Description of
Instruction List and Ladder languages
Contents
Part B
B
Section
2.3
Grafcet instructions
2.3-1 Description
2.3-2 Program structure
2.4
Program instructions
2.4-1 Program end instructions END, ENDC, ENDCN
2.4-2 NOP instruction
2.4-3 Jump instructions JMP, JMPC, JMPCN to a label %Li
2.4-4 Subroutine instructions SRn, SRn:, RET
2.4-5 Master control relay instructions MCR and MCS
3 Numerical and special instructions
3.1
Numerical processing
3.1-1 Definition of word objects
3.1-2 Structured objects
3.1-3 Introduction to numerical instructions
3.1-4 Assignment instructions
3.1-5 Comparison instructions
3.1-6 Arithmetic instructions
3.1-7 Logic instructions
3.1-8 Shift instructions
3.1-9 Conversion instructions
3.2
Potentiometers
3.3
Dedicated function blocks 3/15
3.3-1 Bit and word objects associated with dedicated function blocks 3/15
3.3-2 Programming principles 3/15
3.3-3 Pulse width modulation output %PWM
3.3-4 Pulse generator output %PLS
3.3-5 Fast counting functions, frequency meter, and up/down
3/16
3/18 counter %FC
3.3-6 Transmitting/Receiving messages and controlling data exchanges
3.3-7 Shift bit register function blocks %SBRi
3/20
3/29
3/44
3.3-8 Step counter function blocks %SCi 3/46
___________________________________________________________________________
B/2
3/1
3/1
3/3
3/5
3/5
3/8
3/9
3/11
3/12
3/13
3/14
Page
2/26
2/26
2/28
2/29
2/29
2/29
2/30
2/31
2/32
3/1
Description of
Instruction List and Ladder languages
Contents
Part B
Section
3.4
Communication between PLCs
4 Managing analog I/O
4.1
Presentation
4.2
Analog input modules
4.2-1 Configuring analog inputs
4.2-2 Programming analog inputs
4.2-3 Response time of analog inputs
4.2-4 Example of analog input programming
4.2-5 Characteristics of analog inputs
4.3
Analog output modules
4.3-1 Configuring analog outputs
4.3-2 Programming analog outputs
4.3-3 Response time of analog outputs
4.3-4 Example of analog output programming
4.3-5 Characteristics of analog outputs
5 Clock functions
5.1
Introduction
5.2
Schedule blocks
5.2-1 Characteristics
5.2-2 Time dating by program
5.3
Time/date stamping
5.4
Setting the date and time
5.4-1 Setting the date and time using the terminal
5.4-2 Updating date and time using system words
___________________________________________________________________________
B/3
Page
3/48
B
4/1
4/1
4/5
4/5
4/5
4/6
4/7
4/7
4/1
4/1
4/2
4/3
4/4
4/4
5/1
5/1
5/1
5/1
5/2
5/3
5/4
5/4
5/4
Description of
Instruction List and Ladder languages
Contents
Part B
B
Section
6 Role of system bits and words
6.1
System bits
6.1-1 List of system bits
6.1-2 Detailed description of system bits
6.2
System words
6.2-1 List of system words
6.2-2 Detailed description of system words
7 Programming guide
7.1
Programming advice
7.2
Reactivating protected transistor outputs on TSX 07
●● ●●
12
7.3
Reversibility conditions
7.4
Reversibility rules
7/1
7/1
7/4
7/6
7/6
Page
6/1
6/1
6/1
6/2
6/7
6/7
6/9
___________________________________________________________________________
B/4
Preface
Part B contains 2 levels of information :
• That which enables the user to carry out simple functions. In this case, it is not necessary to read the entire manual, only to refer to the paragraphs in gray.
• That which enables the user to carry out all the functions offered by the TSX Nano. In this case, the whole manual is relevant.
B
1
A
B
2
1 Introduction
1.1
General
The control decisions a PLC makes are based on a control program that you create.
Creating a TSX Nano PLC control program consists of writing a program in one of the control languages supported by the TSX07 PLCs.
The FTX 117 Handheld Terminal supports the List Programming Language. The List language is a line based textual boolean-like language which can also process numerical operations.
The PL7-07 PC Programming Software supports the List and Ladder programming languages. Ladder is a rung-based graphical Boolean language. Further, PL7-07 allows you to reverse a program from Ladder to List and from List to Ladder.
In addition, the TSX Nano PLCs support Grafcet List instructions.
B
1.2
Instruction List (List or IL)
Program structure
A program in PL7 language comprises a series of instructions (up to 1000 instructions) of various types.
Each program line has a number which is generated automatically, an instruction code and a bit or word type operand.
Example of an instruction : 003 LD %I0.1
Number
Instruction code
Operand
Ladder diagrams are a graphical means of displaying a logical expression. An alternative to a Ladder diagram is an Instruction List program. An Instruction List program is a series of logical expressions written as a sequence of Boolean instructions. All the Boolean instructions, except for LOAD, STORE and NOT, operate on two operands, which can be either TRUE or FALSE, and produce a single value, either
TRUE or FALSE.
As written, List instructions have only one explicit operand; the other is implied. The implied operand is the Boolean accumulator. In operation, a List instruction performs the specified operation on the contents of the accumulator and the operand, and replaces the contents of the accumulator with the result.
For example, the operation AND %I1.2 would perform a logical AND between the contents of the accumulator and Input 1.2, and would replace the contents of the accumulator with that result.
___________________________________________________________________________
1/1
B
The LOAD and STORE instructions either load the accumulator with the value of the operand, or store the accumulator to the operand, respectively. The NOT instruction has no explicit operands and simply inverts the state of the accumulator.
Instructions
Types of instruction
• Bit instruction
• Block instruction
• Word instruction
• Program instruction
• Grafcet instruction
Example
004 LD %M10
008 IN %TM0
Reads internal bit %M10
Starts the timer %TM0
010 [%MW10 := %MW50+100] Addition
015 SR5 Calls up subroutine #5
020 -*-8 Step #8
___________________________________________________________________________
1/2
Introduction 1
1.3
Grafcet
Grafcet is an analytical method which divides any sequential control system into a series of steps, with which actions, transitions and conditions are associated.
PL7-07 language has specific Grafcet instructions.
Graphical Grafcet is not supported in PL7-07 PC Programming Software.
B
3
%M10
4 5
%I0.7
%M15
6 7
=1
Graphical Grafcet
LD
#
-*-
LD
#
...
-*-
LD
#
#
-*-
4
5
4
3
%M10
%I0.7
6
5
%M15
7
Grafcet list
Grafcet Ladder
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1/3
B
1.4
Ladder diagrams
Ladder diagrams are similar to relay logic diagrams used to represent relay control circuits. The main differences between the two are that in ladder programming, all inputs are represented by contact symbols ( -| |- ) and all outputs are represented by coil symbols ( -( )- ), and that numerical operations are included in the graphical Ladder instruction set.
LS1 PB1 CR1
LS2 SS1
M1
LS1
%I0.0
PB1
%I0.2
CR1
%I0.4
LS2
%I0.1
SS1
%I0.7
M1
%Q0.4
The figure above illustrates a simplified wiring diagram of a relay logic circuit and its equivalent Ladder diagram. Notice that in the Ladder diagram, all inputs associated with a switching device in the relay logic diagram are shown as contacts. The M1 output coil in the relay logic diagram is represented with an output coil symbol in the Ladder diagram. The address numbers appearing above each contact/coil symbol in the
Ladder diagram reference the location of the external input/output connections to the
PLC.
A program written in Ladder is composed of rungs—sets of specific graphical instructions drawn between the two vertical outer bars representing potential—that are executed sequentially by the PLC. The set of graphical instructions represent:
• the inputs/outputs of the PLC (push buttons, sensors, relays, pilot lights...),
• the functions of the PLC (timers, counters...),
• the math and logic operations (addition, division, and, xor...),
• the comparison operators and other numerical operations (A < B, A = B, shift, rotate...),
• the internal variables in the PLC (bits, words...).
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1/4
Introduction 1
These graphical instructions are arranged with vertical and horizontal connections leading ultimately to one or several outputs and/or actions.
A rung cannot support more than one group of linked instructions.
For example, this Ladder program is composed of two rungs.
%I0.1
%I0.3
%M42
%M42 %Q1.2
%MW22 := %MW15 + KW1
B
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1/5
B
Lines
1
2
3
4
5
6
7
1.4-1 Programming principles
Each Ladder rung is comprised of 7 lines and 11 columns and are organized in two zones:
Columns 1 2 3 4 5 6 7 8 9 10 11
MAIN
Programming Worksheet Ladder Diagram
SR PRE POST
RUNG
%
Test zone
Action zone
• a test zone which contains the conditions that must be true for an action to take place.
• an action zone which contains the output or operation that results from the tests connected to it.
The rung is visualized by a 7 by 11 programming grid, starting in the upper-leftmost cell of the grid. You program test instructions, comparisons, and functions in the test zone and these test instructions are left-justified. This test logic then provides continuity to the action zone where you program coils, numerical operations and program flow control instructions. These action instructions are right-justified. The rung is solved, or executed
(tests made and outputs assigned), from top to bottom and from left to right.
In addition to the rung, there is the Rung Header that appears directly above the rung.
The rung header is used to document the logical intent of the rung. The rung header contains the rung number, any labels (%Li:) or subroutine declarations (SRi:), the rung title, and rung comments. For more information about the Rung Header, and its correspondence to List Line Comments, see section B.1.4-2.
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1/6
Introduction 1
• Contacts, coils and program flow instructions
Contacts, coils and program flow (jump and call) instructions occupy a single cell of the programming grid. Function blocks,
Comparison blocks and Operate blocks occupy multiple cells.
• Function Blocks
Function blocks are placed in the Test
Zone of the programming grid. The block must appear in the first line; no Ladder instructions or lines of continuity may appear above or below the Function block.
Ladder test instructions lead to the Function block's input side, and test instructions and/or action instructions lead from the block's output side.
Function blocks are vertically orientated and occupy 2 columns by 4 rows of the programming grid.
• Comparison Blocks
Comparison blocks are placed in the Test
Zone of the programming grid. The block may appear in any line or column in the test zone as long as the entire length of the instruction resides in the test zone.
Comparison blocks are horizontally orientated and occupy 2 columns by 1 row of the programming grid.
R
S
%C0
E
D
CU
CD
F
%MW0 = %SW50
• Operate Blocks
Operate blocks are placed in the Action
Zone of the programming grid. The block may appear in any line in the action zone.
The instruction is right-justified; therefore, it appears on the right and ends in the last column.
Operate blocks are horizontally orientated and occupy 4 columns by 1 row of the
%MW120 := SQRT (%MW15)
1/7
B
B
1.4-2 Reversibility
In this manual, the term reversibility refers to the ability of the PL7-07 Programming software for the TSX Nano to convert TSX Nano application programs from the Ladder programming language to the List language and back again. PL7-07 programs can be displayed in either format at will by setting a preference for one or the other. You can even convert (reverse) individual Ladder rungs to List and back simply by selecting the
Tools menu’s Toggle Ladder/List option.
%Q0.4
%I0.5
%I0.4
LD %I0.5
OR %I0.4
ST %Q0.4
Understanding of reversibility lies in the relationship of the “Rung”—the collection of
Ladder programming instructions that constitute a logical expression—and the
“Sequence”—the collection of List programming instructions that accomplish the same.
The figure above demonstrates an example of a common rung in Ladder in any user program. Next to the Ladder rung is the equivalent program logic expressed as a List sequence.
In essence, the program you write, whether it be in Ladder or List, is kept internally as
List. PL7-07 takes advantage of the program structure similarities between the two languages and uses this internal List image of your program to display it in the List /
Ladder Viewer and Editors as either a List program (its basic form), or graphically as a
Ladder diagram, depending upon the preference you select. Therefore, everything created in Ladder can always be reversed to List, but some List logic may not reverse to Ladder. To ensure reversibility from List to Ladder, it is important to follow the set of
List programming conventions contained in section B.1.4-3.
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1/8
Introduction 1
1.4-3 Reversible List programming conventions
The structure of a reversible function block in List language requires the use of certain specific instructions. They are :
- BLK which marks the block start, and defines the beginning of the rung and the start of the input portion to the block,
- OUT_BLK (marks the beginning of the output portion of the block)
- END_BLK (obviously, marks the end of the block and the rung).
The use of the reversible Function Block instructions are not mandatory for a properly functioning List program. For some instructions it is possible to program in List which is not reversible. Non-reversible List programming is described in the Function Block descriptions in section B2.2.
Another important convention is to avoid the use of certain List instructions, or certain combinations of instructions and operands, which have no equivalence in Ladder. For example, the N instruction (bit Not inverses the boolean accumulator) has no equivalent
Ladder instruction. In the table below is a listing of all the List programming instructions that will not reverse to Ladder.
List Instruction
JMPCN
N
ENDCN
XORN
Operand
%Li none none any
Description
Jump Conditional Not
Negation (NOT)
End Conditional Not
XORN preceded by OR logic
B
Unconditional rungs also follow a List programming convention to ensure List-to-Ladder reversibility. An unconditional rung is a rung in which there are no tests or conditions; the output and/or action instruction(s) is (are) energized, or executed, all the time. The figure below illustrates unconditional rungs and List equivalent sequences.
%MW5 := 0
%Q0.4
LD
ST
1
%Q0.4
LD 1
[%MW5 := 0]
JMP %L6
>>
%L6
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1/9
B
Notice that each of the unconditional List sequences, with one exception, begin with a
Load instruction followed by the number 1. The combination sets the boolean accumulator value to one, and therefore sets the coil (store instruction) to one and sets %MW5 to zero on every scan of the program. The exception is the unconditional jump instruction. This List instruction is executed regardless of the value of the accumulator, and consequently does not need the accumulator set to one as do the previous two examples.
If you try to reverse a List program that is not completely reversible, the reversible portions are displayed in Ladder and the irreversible portions are displayed in “Ladder
List Rungs.” Ladder List Rungs function just like a small list editor, enabling you to view and modify the irreversible parts of a Ladder program.
Program Documentation
The List editor allows you to document your program with List Line Comments. These comments may appear on the same line as programming instructions, or they may appear on lines of their own. The Ladder Editor allows you to document your program with Rung Headers found directly above the rung.
PL7-07 uses these comments for reversibility. When reversing a program from List to
Ladder, PL7-07 uses some of the List comments to construct a Rung Header. Simply, the comments that may be found between List sequences are used for the Rung
Headers.
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Introduction 1
The first comment found on a line by itself (no instruction appears on the line with it) after the end of a List sequence is used for the Rung Title. Then, the next comments found after the first, if any exist, are used for the body of the rung. Once the body lines of the header are occupied, then the rest of the line comments between List sequences are ignored, as are any comments that are found on List lines that also contain List instructions.
When a Ladder rung that contains a Rung Header is reversed to List, the Rung Header documentation is inserted between the List sequences. Any labels or subroutine declarations (%Li: or SRi:) are placed on the next line following the header, immediately prior to the beginning of the List Sequence. If the rung that is reversed was originally written in List, and there were comments ignored when List was reversed to Ladder, those comments will reappear in the List Editor.
B
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1/11
B
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1/12
2 Combinational and sequential instructions
2.1
Boolean processing
2.1-1 Definition of the main bit objects
• I/O bits
The addressing system for these bits is described in Part A, Section 1.5.
These bits are the "logical images" of the electrical state of the I/O. They are stored in the data memory and updated during each scan of the program logic.
• Internal bits
Internal bits are internal storage areas available to the user for program use.
Note : I/O bits which are not in use cannot be used as internal bits.
• System bits
System bits %S0 to %S127 are used to monitor the correct operation of the PLC as well as the correct execution of the application program. The role and use of these bits are explained in Part B, Section 5.
• Step bits
Bits %X1 to %X62 are the bits associated with the Grafcet steps. Step bit Xi is set to 1 when the corresponding step is active, and to 0 when the step is deactivated.
• Bits extracted from words : see Section 3.1-1
List of operand bits
The following table lists all types of operand bits.
Type
Immediate value
Bits input output
Bits internal
Bits system
Bits of Grafcet steps (5)
Bits of function blocks
Bits of reversible function blocks
Bits word extracts
Address
(or value)
Maximum number
0 or 1
%I0.i or %I1.i (2)
-
28
%Q0.i or %Q1.i (2) 20
%Mi 128 (3)
%Si
%Xi
128
62
%TMi.Q, %DRi.F, etc
E,D,F,Q,TH0,TH1 varies varies
Write access (1)
no yes yes depends on i yes no (4) no varies
(1) Written by the program or in the Data editor by the terminal.
(2) Where i = 0 for a PLC base or a peer PLC, i = 1 for an I/O extension, and j = I/O point. I/O bits can be forced to 0 or 1 in the Data editor.
(3) The first 64 are saved in the event of a power outage.
(4) Except for %SBRi.j and %SCi.j, these bits can be read and written.
See
Sect.
-
1.5
Pt. A
5.1
2.3-1
2.2-1
3.3-1
3.1-1
B
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2/1
B
2.1-2 Introduction to Boolean instructions
Boolean instructions can be compared to Ladder language elements.
Test elements, example : the LD (LOAD) instruction is equivalent to an open contact.
LD %I0.0
%I0.0
Contact closed when the controlling bit is at state 1.
Action elements, example : the ST (STORE) instruction is equivalent to a coil.
ST %Q0.0
%Q0.0
The associated bit object takes the logical value of the bit accumulator (result of previous logic).
Boolean equation :
LD %I0.0
AND %I0.1
ST %Q0.0
%I0.0 %I0.1
%Q0.0
The Boolean result of the test elements is applied to the action element.
Rising and falling edge
Test instructions can be used to detect rising or falling edges on the PLC inputs. An edge is detected when the state of an input has changed between scan n-1 and the current scan n, and it remains detected during the current scan.
The LDR instruction (R : Rising edge) is equivalent to a rising edge detection contact :
%I0.0
LDR %I0.0
P
(1)
Rising Edge : detects a change of the controlling input from 0 to 1.
The LDF instruction (F : Falling edge) is equivalent to a falling edge detection contact :
LDF %I0.0
%I0.0
N
(2)
Falling Edge : detects a change of the controlling input from 1 to 0.
time
%I0.2
Boolean result
1 PLC scan time
%I0.2
Boolean result
1 PLC scan time time
Instructions on a rising or falling edge apply to inputs %I, but it is possible to detect edges on any other bit (or Boolean result) using 2 internal bits.
LD %M0
ANDN %M10
ST %M11
%M0 %M10 %M11
LD %M0
ST %M10
%M0 %M10
In the example opposite, bit %M11 records the rising edge of bit %M0.
(1) Positive transition sensing contact
(2) Negative transition sensing contact
(3) On a cold or warm restart, the application detects a rising edge even if the input has remained at 1. This phenomenon can be masked by starting the program on LD %S1 and
ENDC instructions.
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2/2
Combinational and sequential instructions 2
Instruction format
The Boolean instruction described appears in bold type. Each equation is illustrated by the corresponding Ladder diagram.
B
Load instructions LD, LDN, LDR, LDF
The instructions LD, LDN, LDR and LDF correspond respectively to the open, closed, rising edge and falling edge contacts.
%I0.1
%Q0.3
%M0
%I0.2
P
%I0.3
N
%Q0.2
%Q0.4
%Q0.5
LD %I0.1
ST %Q0.3
LDN %M0
ST %Q0.2
LDR %I0.2
ST %Q0.4
LDF %I0.3
ST %Q0.5
Code Operand
LD 0/1,%I,%Q,%M,%S,%X,%BLK.x,%•:Xk,[
LDN %I,%Q,%M,%S,%X,%BLK.x,%•:Xk,[
LDR %I
LDF %I
List of operands
0/1
%I
%Q
%M immediate value 0 or 1
PLC input %Ii.j
PLC output %Qi.j
internal bit %Mi
[
%S
%X system bit %Si step bit %Xi
%BLK.x function block bit, e.g. %TMi.Q
%•:Xk word bit, e.g. %MWi:Xk
Comparison expression e.g. [%MWi<1000]
LD
%I0.1
%M0 %I0.2
%I0.3
%Q0.3
%Q0.2
%Q0.4
%Q0.5
%Q0.3
LDN LDR LDF
Timing diagram
The 4 timing diagrams have been grouped together.
LD Timing diagram for the LD instruction
Input state
%I0.1
Output state
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2/3
B
2.1-3 Load instructions LD, LDN, LDR, LDF
The instructions LD, LDN, LDR and LDF correspond respectively to the open, closed, rising edge and falling edge contacts (LDR and LDF only on PLC inputs).
%I0.1
%Q0.3
%M0
%I0.2
P
%I0.3
N
%Q0.2
%Q0.4
%Q0.5
LD %I0.1
ST %Q0.3
LDN %M0
ST %Q0.2
LDR %I0.2
ST %Q0.4
LDF %I0.3
ST %Q0.5
LD LDN
Code Operand
LD 0/1,%I,%Q,%M,%S,%X,%BLK.x,%•:Xk,[
LDN %I,%Q,%M,%S,%X,%BLK.x,%•:Xk,[
LDR %I
LDF %I
%I0.1
%M0
%Q0.3
%Q0.2
2.1-4 Assignment instructions ST, STN, S, R
LDR
%I0.2
LDF
%I0.3
%Q0.4
%Q0.5
The instructions ST, STN, S and R correspond respectively to the direct, inverse, set and reset coils.
%I0.1
%Q0.3
%Q0.2
LD
ST
%I0.1
%Q0.3
STN %Q0.2
S %Q0.4
%I0.2
%Q0.4
S
%Q0.4
R
LD
R
%I0.2
%Q0.4
Code Operand
ST %Q,%M,%S,%BLK.x,%•:Xk
STN %Q,%M,%S,%BLK.x,%•:Xk
S
R
%Q,%M,%S,%X,%BLK.x,%•:Xk
%Q,%M,%S,%X,%BLK.x,%•:Xk
ST
%I0.1
STN
%I0.1
S
%I0.1
R
%I0.2
%Q0.3
%Q0.2
%Q0.4
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2/4
Combinational and sequential instructions 2
2.1-5 Logic AND instructions : AND, ANDN, ANDR, ANDF
These instructions perform a logic AND between the operand (or its inverse, or its rising or falling edge) and the Boolean result of the preceding instruction.
%I0.1
%M1
%M2 %I0.2
%I0.3
%I0.4
P
%M3 %I0.5
N
%Q0.3
%Q0.2
%Q0.4
S
%Q0.5
S
LD %I0.1
AND %M1
ST
LD
%Q0.3
%M2
ANDN %I0.2
ST
LD
%Q0.2
%I0.3
ANDR %I0.4
S %Q0.4
LD %M3
ANDF %I0.5
S %Q0.5
AND ANDN ANDR ANDF
Code Operand
AND 0/1,%I,%Q,%M,%S,%X,%BLK.x,%•:Xk,[
ANDN %I,%Q,%M,%S,%X,%BLK.x,%•:Xk,[
ANDR %I
ANDF %I
%I0.1
%M1
%M2
%I0.2
%I0.3
%I0.4
%M3
%I0.5
%Q0.3
%Q0.2
%Q0.4
%Q0.5
2.1-6 Logic OR instructions : OR, ORN, ORR, ORF
These instructions perform a logic OR between the operand (the inverse of the operand, a rising or falling edge) and the Boolean result of the preceding instruction.
%I0.1
%Q0.3
%M1
%M2
%I0.2
%M3
%I0.4
P
%I0.5
N
%I0.6
N
%Q0.2
%Q0.4
S
%Q0.5
S
LD
OR
ST
LD
%I0.1
%M1
%Q0.3
%M2
ORN %I0.2
ST %Q0.2
LD %M3
ORR %I0.4
S %Q0.4
LDF %I0.5
ORF %I0.6
S %Q0.5
OR ORN ORR ORF
%I0.1
%M2 %M3 %I0.5
Code Operand
OR 0/1, %I,%Q,%M,%S,%X,%BLK.x,%•:Xk
ORN %I,%Q,%M,%S,%X,%BLK.x,%•:Xk
ORR %I
%M1 %I0.2
%I0.4
%I0.6
B
2/5
B
2.1-7 Exclusive OR instructions : XOR, XORN, XORR, XORF
These instructions perform an exclusive OR between the operand (the inverse of the operand, a rising or falling edge) and the Boolean result of the preceding instruction. The
XOR instruction can be used in either of the following ways, for example:
%I0.1
%M1
XOR
%Q0.3
LD %I0.1
XOR %M1
ST %Q0.3
%I0.1
%M1
%M1 %I0.1
%Q0.3
LD %I0.1
ANDN %M1
OR( %M1
ANDN %I0.1
)
ST %Q0.3
Code Operand
XOR %I,%Q,%M,%S,%X,%BLK.x,%•:Xk
XORN %I,%Q,%M,%S,%X,%BLK.x,%•:Xk
XORR %I
XORF %I
XOR
%I0.1
%M1
%Q0.3
Special cases
• In Ladder, XOR contacts cannot be
- situated at the left (first position) of a rung,
- placed in parallel.
For example, attempting to enter the following rung will generate a Validation error.
%M13 %I1.5
XOR
%M10
%Q1.10
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2/6
Combinational and sequential instructions 2
2.1-8 NOT instruction : N
This instruction negates the Boolean result of the preceding instruction.
LD
OR
ST
%I0.1
%M2
%Q0.2
N
AND %M3
ST %Q0.3
Code Operand
N -
Note : The instruction N is not reversible.
%I0.1
%M2
%Q0.2
%M3
%Q0.3
2.1-9 Using parentheses
The instructions AND and OR can use parentheses. These parentheses are used for parallel branches in Ladder diagrams. Opening the parenthesis is associated with the
AND or OR instruction. Closing the parenthesis is an instruction, which must be given for each open parenthesis.
Example : AND(...)
%I0.0
%I0.1
%Q0.0
%I0.2
LD %I0.0
AND %I0.1
OR
ST
%I0.2
%Q0.0
%I0.0
%I0.1
%I0.2
%Q0.0
)
LD %I0.0
AND( %I0.1
OR %I0.2
ST %Q0.0
Example : OR(...)
%I0.0
%I0.2
%I0.1
%I0.3
%Q0.0
LD %I0.0
AND %I0.1
OR( %I0.2
)
AND %I0.3
ST %Q0.0
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2/7
B
B
The following modifiers can be assigned to parentheses N, F, R or [ :
• N negation, for example, AND(N or OR(N
• R rising edge, for example, AND(R or OR(R
• F falling edge, for example, AND(F or OR(F
• [ comparison, see Section 3.1-5
%I0.0
%I0.1
%I0.2
%I0.3
%Q0.0
LD %I0.0
AND %I0.1
OR(N %I0.2
AND %I0.3
)
ST %Q0.0
Nesting parentheses
It is possible to nest up to 8 levels of parentheses.
Example
%I0.0
%I0.1
%I0.2
%M3
%Q0.0
LD %I0.0
AND( %I0.1
OR(N %I0.2
)
AND %M3
)
ST %Q0.0
Example
%I0.1
%I0.2
%I0.3 %I0.4
%Q0.0
%I0.5
%I0.6
%I0.7 %I0.8
LD %I0.1
AND( %I0.2
AND %I0.3
OR( %I0.5
AND %I0.6
)
AND %I0.4
OR( %I0.7
AND %I0.8
)
)
ST %Q0.0
Note :
• Each parenthesis opened must be closed again.
• %Li: labels and SRi: subroutines must not be placed in expressions between parentheses. This is also the case for jump (JMP), subroutine (SRi) and function block instructions. See Section 2.4-3 for more information.
• Assignment instructions ST, STN, S and R must not be programmed between
2/8
Combinational and sequential instructions 2
2.1-10 Instructions MPS, MRD, MPP
These 3 types of instruction are used to process the routing to the coils.
They use a temporary storage area referred to as the stack which can store up to 8
Boolean expressions.
The instruction MPS pushes the accumulator (the result of the last logical operation) onto the top of the stack and shifts the other values towards the bottom of the stack.
The instruction MRD reads the top of the stack into the accumulator.
The instruction MPP pops the top of the stack into the accumulator and shifts the other values towards the top of the stack.
Examples :
%I0.0
%M0 %I0.1
%Q0.0
MPS
MRD
MPP
%I0.2
%I0.3
%I0.4
%Q0.1
%Q0.2
%Q0.3
LD %I0.0
AND %M0
MPS
AND %I0.1
ST %Q0.0
MRD
AND %I0.2
ST %Q0.1
MRD
AND %I0.3
ST
MPP
%Q0.2
AND %I0.4
ST %Q0.3
B
%I0.0
%I0.1
%I0.3
%I0.4
%M10
%M0
%M1
%Q0.0
%Q0.1
%Q0.2
%Q0.3
LD
MPS
%I0.0
AND %I0.1
MPS
AND( %I0.3
OR %M0
)
ST
MPP
%Q0.0
ANDN %M1
ST %Q0.1
MRD
AND %I0.4
ST
MPP
%Q0.2
AND %M10
ST %Q0.3
Note : These instructions cannot be used within an expression between parentheses.
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2/9
B
2.1-11 Special Ladder instructions OPEN and SHORT
As a special convenience to the Ladder programmer, there are two instructions that can be used during, debugging and troubleshooting. The OPEN and SHORT instructions provide a means to alter the logic of a rung by either "shorting" the continuity of the rung
(allow continuity to pass through the rung regardless of the result of the last logical operation), or by "opening" the continuity of the rung (discontinuing the continuity of the rung regardless of the result of the last logical operation).
In list, the OR and AND instructions accompanied by the immediate values of 1 and 0 are used to create the OPEN and SHORT instructions.
%I0.1
%Q1.5
%I0.9
SHORT
%M3
OPEN
%Q0.1
%Q1.6
LD
OR
%I0.1
%Q1.5
ANDN %M3
AND 0
ST
LD
%Q0.1
%I0.9
OR
ST
1
%Q1.6
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2/10
Combinational and sequential instructions 2
2.2
Standard function blocks
2.2-1 Bit and word objects associated with standard function blocks
Function blocks set up bit objects and specific words.
• Bit objects :
These correspond to the block outputs.
They can be accessed by Boolean test instructions.
They can be addressed :
- either directly (for example, LD E) if they are wired to the block in reversible programming (see Section 2.2-2),
- or by specifying the block type (for example, LD %Ci.E),
Inputs can be accessed in the form of instructions.
R
%Ci
E
S
ADJ Y D
%Ci .P 9999
CU
CD
F
Up/down counter block
• Word objects :
These correspond to :
- The block configuration parameters. These parameters can be accessed (for example, preset parameter) or not (for example, time base) by the program.
- The current values (for example, %Ci.V current count value).
List of function block bit and word objects which can be accessed by the program
Standard function blocks
Timer
%TMi (i=0 to 31)
Up/down counter
%Ci (i=0 to 15)
Associated words and bits
Word
Bit
Word
Bit
LIFO/FIFO register Word
%Ri (i= 0 to 3)
Drum controller
%DRi (i=0 to 3)
Bit
Word
Bit
Current value
Preset value
Timer output
Current value
Preset value
Underflow output (empty)
Preset output reached
Overflow output (full)
%TMi.V
%TMi.P
%TMi.Q
%Ci.V
%Ci.P
%Ci.E
%Ci.D
%Ci.F
Access to register
Register output
Register output full
Register output empty
%Ri.I
%Ri.O
%Ri.F
%Ri.E
Current step number %DRi.S
Last step equals current step %DRi.F
Address Write no no no yes yes no no yes yes access no yes no no yes
See
Sect.
2.2-3
2.2-4
2.2-5
2.2-6
B
___________________________________________________________________________
2/11
B
2.2-2 Programming principles
Standard function blocks can be programmed in two different ways :
• Using function block instructions (for example, BLK %TM2): This reversible method of programming for the Ladder language enables operations to be performed on the block in a single place in the program.
• Using specific instructions (for example, CU %Ci): This non-reversible method enables operations to be performed on the block's inputs in several places in the program (for example, line 100 CU %C1, line 174 CD %C1, line 209 LD %C1.D).
Principles of reversible programming of standard function blocks
This programming uses instructions BLK, OUT_BLK and END_BLK.
BLK indicates the start of the function block.
OUT_BLK is used to directly "wire" the block outputs.
END_BLK indicates the end of the block.
Example of reversible programming with wired outputs
%I1.1
N
%I1.2
%M0
%C8
R E
S
ADJ Y D
%Ci .P 9999
CU
%M1 %Q0.4
CD
F
BLK %C8
LDF %I1.1
R
LD %I1.2
AND %M0
CU
OUT_BLK
LD D
AND %M1
ST %Q0.4
END_BLK
Input processing
Output processing
Example of reversible programming without output wiring
%I1.1
N
%I1.2
%M0
%C8
R E
S
ADJ Y D
%Ci .P 9999
CU
F
CD
%C8.D %M1 %Q0.4
BLK %C8
LDF %I1.1
R
LD %I1.2
AND %M0
CU
END_BLK
LD %C8.D
AND %M1
ST %Q0.4
Input processing
Output processing
Note :
Only test and input instructions on the relevant block can be placed between BLK and OUT_BLK
2/12
Combinational and sequential instructions 2
2.2-3 Timer function blocks %TMi
%TMi
IN Q
TYPE TON
TB 1 min
ADJ Y
%TMi.P 9999
Timer block
Note: The larger the preset value, the greater the timer accuracy.
There are 3 types of timer :
• TON : this type of timer is used to control on-delay actions. This delay is programmable and can be modified via the terminal.
• TOF : this type of timer is used to control off-delay actions. This delay is programmable and can be modified by the terminal.
• TP : this type of timer is used to create a pulse of an exact duration. This duration is programmable and can be modified by the terminal.
B
Characteristics
Timer number
Type
Time base
Current value
Preset value
Data Editor
Setting input
(or instruction)
Timer output
%TMi
TON
TOF
TP
TB
%TMi.V
%TMi.P
Y/N
IN
Q
0 to 31
• on-delay (by default)
• off-delay
• pulse (monostable)
1min (by default), 1s, 100ms, 10ms, 1ms (for
TM0 and TM1).
Word which increments from 0 to %TMi.P
when the timer is running. Can be read and tested but not written by the program (1).
0 ≤ %TMi.P
≤ 9999. Word which can be read, tested and written by the program. It is set to
9999 by default. The length or delay generated is equal to %TMi.P x TB.
Y : possibility of changing the preset value
%TMi.P in the Data editor.
N : no access in the Data editor.
The timer starts on a rising edge (type TON or TP) or a falling edge (type TOF).
Associated bit %TMi.Q is set to 1 depending on the function performed: TON, TOF or TP
(1) %TMi.V can be modified via the terminal in the Data editor.
___________________________________________________________________________
2/13
B
Using as an on-delay timer : type TON
IN
Q
%TMi.P
%TMi.V
The timer is started on a rising edge at input IN (1) : the current value %TMi.V
increases from 0 to %TMi.P by one unit for each pulse of the time base TB. Output bit
%TMi.Q changes to 1 when the current value reaches %TMi.P and then remains at 1 as long as a falling edge is not detected at input IN.
When a falling edge is detected at input IN
(2), the timer is stopped, even if the timer has not reached % TMi.P.
Using as an off-delay timer: type TOF
IN
Q
%TMi.P
%TMi.V
The current value %TMi.V is set to 0 on a rising edge at input IN (1) (even if the timer is still running). When the falling edge is detected on input IN, the timer is started.
The current value increases to %TMi.P by one unit on each pulse of the time base
TB. Output bit %TMi.Q changes to 1 when a rising edge is detected on input IN and the timer returns to 0 when the current value reaches %TMi.P.
Using as a pulse : type TP
IN
Q
%TMi.P
%TMi.V
The timer is started on a rising edge at input IN (1) : the current value %TMi.V is set to 0 if the timer has not already started.
The current value increases from 0 to
%TMi.P by one unit for each pulse of the time base TB. Output bit %TMi.Q changes to 1 when the timer is started and returns to 0 when the current value reaches
%TMi.P.
This timer cannot be reset. Once %TMi.V
equals %TMi.P, and the input IN is at state
0, %TMi.V is set to 0.
(1) or activation of instruction IN.
(2) or deactivation of instruction IN.
___________________________________________________________________________
2/14
Combinational and sequential instructions 2
Programming and configuration
Timer function blocks are programmed in the same way irrespective of how they are to be used. The function TON, TOF, and TP is selected during configuration.
%I0.1
%TM1
IN Q
TYPE TON
TB 1 min
ADJ Y
%TMi.P 9999
%Q0.3
Reversible programming
BLK %TM1
LD %I0.1
IN
OUT_BLK
LD Q
ST %Q0.3
END_BLK
B
Configuration
The following parameters must be entered during configuration.
• Type : TON, TOF or TP
• TB : 1min, 1s, 100ms, 10ms or 1ms
• %TMi.P : 0 to 9999
• Adjust : Y or N
Non-reversible programming
LD
IN
LD
ST
%I0.1
%TM1
%TM1.Q
%Q0.3
Special cases
• Effect of a cold restart : (%S0=1)
- forces the current value to 0,
- sets output %TMi.Q to 0,
- the preset value is reset to the value defined during configuration.
• Effect of a warm restart : (%S1=1) has no effect on the current value of the timer, nor on the preset value. The current value does not change during a power outage.
• Effect of a PLC stop : stopping the PLC does not freeze the current value.
• Effect of a program jump : Jumping over a timer block does not freeze the timer. The timer will continue to increment until it reaches the preset value (%TMi.P). At that point, the done bit (%TMi.Q) assigned to output Q of the timer block changes state; however, the associated output wired directly to the block output is not activated and not scanned by the PLC.
• Testing of bit %TMi.Q (done bit) : it is advisable to test bit %TMi.Q only once in the program.
• Effect of master control relay instructions MCS/MCR : a timer block programmed between 2 MCS/MCR instructions is reset when the MCS instruction is active.
• Effect of modifying the preset %TMi.P : modifying the preset value via an instruction or by adjusting it only takes effect when the timer is next activated.
___________________________________________________________________________
2/15
B
Timers with 1ms time base (TSX 07 3• ••••)
The 1 ms time base is only available on %TM0 and %TM1 timers.
If the user so requires, he can use the four system words %SW76, %SW77, %SW78 and
%SW79 as "hourglasses".
These four system words are decremented individually by the system every millisecond
if they have a positive value.
Multiple timing can be achieved by successive loading of one of these words or by testing the intermediate values.
If one of these four system words is less than 0, it will not be modified, a timer can thus be "frozen" by setting corresponding bit 15 to 1 then "unfrozen" by resetting it to 0.
Programming example:
LDR %I0.1
(launching the timer on rising edge of %I0.1)
[%SW76:=XXXX] (XXXX= required value)
LD %I0.2
ST %SW76:X15
(optional management of the freeze, input I0.2 freezes)
LD [%SW76=0] (timer end test)
ST %M0
...........
%I0.1
P
%I0.2
%SW76:=XXXX
%SW76:X15
%M0
%SW76=0
___________________________________________________________________________
2/16
Combinational and sequential instructions 2
2.2-4 Up/down counter function blocks %Ci
R
%Ci
E
The up/down counter function block is used to up/down count events. These two operations can be simultaneous.
S
ADJ Y D
%Ci .P 9999
CU
F
CD
Up/down counter block
Characteristics
Counter number
Current value
%Ci
%Ci.V
Preset value
Edit via terminal
%Ci.P
Y/N
R
0 to 15
Word incremented or decremented according to inputs (or instructions) CU and CD.
Can be read and tested but not written by the program (1).
0
≤
%Ci.P
≤
9999. Word can be read, tested and written (default value: 9999).
Y : possibility of modifying the preset value in the Data editor. N : no access in the Data editor.
At state 1 : %Ci.V = 0.
Reset input (or instruction)
Set input
(or instruction)
Upcount input
(or instruction)
Downcount input
(or instruction)
Underflow output
S
CU
CD
E (Empty)
At state 1: %Ci.V = %Ci.P.
Increments %Ci.V on a rising edge.
Decrements %Ci.V on a rising edge.
Preset output reached
Overflow output
D (Done)
F (Full)
The associated bit %Ci.E=1, when downcounter %Ci.V changes from 0 to 9999
(set to 1 when %Ci.V reaches 9999, and reset to 0 if the counter continues to count down).
The associated bit %Ci.D=1, when
%Ci.V=%Ci.P.
The associated bit %Ci.F =1 when %Ci.V
changes from 9999 to 0 (set to 1 when %Ci.V
reaches 0, and reset to 0 if the counter continues to count up).
2/17
B
B
Operation
• Upcount : when a rising edge appears at the upcounting input CU (or instruction CU is activated), the current value is incremented by one unit. When this value is equal to the preset value %Ci.P, the "preset reached" output bit %Ci.D assigned to output
D changes to state 1. Output bit %Ci.F (upcount overflow) changes to state 1 when
%Ci.V changes from 9999 to 0, and is reset to 0 if the counter continues to count up.
• Downcount : when a rising edge appears at the downcounting input CD (or instruction CD is activated), the current value %Ci.V is decremented by one unit.
Output bit %Ci.E (underflow) changes to state 1 when %Ci.V changes from 0 to 9999, and is reset to 0 if the counter continues to count down.
• Up/downcount : to use both the upcount and the downcount functions simultaneously
(or to activate instructions CD and CU), the two corresponding inputs CU and CD must be controlled. These two inputs are then scanned in succession. If they are both at 1, the current value remains unchanged.
• Reset : when this input is set to state 1 (or the instruction is activated), the current value %Ci.V is forced to 0, outputs %Ci.E, %Ci.D and %Ci.F are at 0. The reset input has priority.
• Set : if input S is at state 1 (or instruction S is active) and the reset input is at state
0 (or instruction R is inactive), the current value %Ci.V takes the value of %Ci.P, and output %Ci.D is set to 1.
Special cases
• Effect of a cold restart : (%S0=1)
- The current value %Ci.V is set to zero.
- Output bits %Ci.E, %Ci.D and %Ci.F are set to zero.
- The preset value is initialized with the value defined during configuration.
• Effect of a warm restart (%S1=1), of a PLC stop : this has no effect on the current value of the counter (%Ci.V).
• Effect of modifying the preset %Ci.P : modifying the preset value via an instruction or by adjusting it takes effect when the block is processed by the application
(activation of one of the inputs).
___________________________________________________________________________
2/18
Combinational and sequential instructions 2
Configuration and programming
Example: Count a number of items up to 5000. Each pulse on input %I1.2 (when internal bit %M0 is at 1) increments the upcounter %C8 up to its final preset value (bit
%C8.D=1). The counter is reset by input %I1.1.
%I1.2
%I1.1
%M0
%C8
R E
S
ADJ Y D
%Ci .P 9999
CU
Configuration
The following parameters must be entered during configuration :
• %Ci.P, set to 5000 in this example
• Adjust : Y
F
CD
%C8.D
%Q0.0
B
Reversible programming
BLK %C8
LD %I1.1
R
LD %I1.2
AND %M0
CU
END_BLK
LD
ST
%C8.D
%Q0.0
Non-reversible programming
LD
R
LD
%I1.1
%C8
%I1.2
AND %M0
CU %C8
LD
ST
%C8.D
%Q0.0
___________________________________________________________________________
2/19
B
2.2-5 LIFO/FIFO register function blocks %Ri
R
%Ri
E
A register is a memory block which is used to store up to 16 words of 16 bits in two different ways :
• Queue (First In, First Out) known as
FIFO.
• Stack (Last In, First Out) known as LIFO.
I
TYPE FIFO
F
O
Register block
Characteristics
Register number
Type
Input word
Output word
Storage input
(or instruction)
Retrieval input
(or instruction)
Reset input
(or instruction)
Empty output
Full output
%Ri
FIFO
LIFO
%Ri.I
%Ri.O
I (In)
O (Out)
R (Reset)
0 to 3
Queue (default selection)
Stack
Register input word. Can be read, tested and written.
Register output word. Can be read, tested and written.
On a rising edge, stores the contents of word
%Ri.I in the register.
On a rising edge, loads a data word into word
%Ri.O.
At state 1 initializes the register.
E (Empty)
F (Full)
The associated bit %Ri.E indicates that the register is empty. Can be tested.
The associated bit %Ri.F indicates that the register is full. Can be tested.
___________________________________________________________________________
2/20
Combinational and sequential instructions 2
Operation
FIFO (First In, First Out)
The first data item entered is the first to be retrieved.
When a storage request is received (rising edge at input I or activation of instruction I), the contents of input word %Ri.I (which have already been loaded) are stored at the top of the queue (Fig a).
When the queue is full (output F=1), no further storage is possible.
When a retrieval request is received (rising edge at input O or activation of instruction O) the data word lowest in the queue is loaded into output word
%Ri.O and the contents of the register are moved down one place in the queue (Fig b).
When the register is empty (output E=1) no further retrieval is possible. Output word %Ri.O does not change and retains its value.
The queue can be reset at any time (state 1 at input
R or activation of instruction R).
Example :
Storage of the contents of %Ri.I at the top of the queue.
20
%Ri.I
(a)
20
80
50
Retrieval of the first data item which is then loaded into %Ri.O
20
80
50
20
80
(b)
%Ri.O
50
LIFO (Last In, First Out)
The last data item entered is the first to be retrieved.
When a storage request is received (rising edge at the input or activation of instruction I), the contents of input word %Ri.I (which have already been loaded) are stored at the top of the stack (Fig c).
When the stack is full (output F at 1), no further storage is possible.
When a retrieval request is received (rising edge at input O or activation of instruction O) the highest data word (last word to be entered) is loaded into word %Ri.O (Fig d).
When the register is empty (output E=1), no further retrieval is possible. Output word %Ri.O does not change and retains its last value. The stack can be reset at any time (state 1 at input R or activation of instruction R). The element indicated by the pointer is then the highest in the stack.
Example :
Storage of the contents of %Ri.I at the top of the stack.
20
%Ri.I
(c)
Retrieval of the data word highest in the stack.
20
80
50
20
80
50
%Ri.O
20
(d)
80
50
___________________________________________________________________________
2/21
B
B
Special cases
• Effect of a cold restart : (%S0=1) initializes the contents of the register Output bit
%Ri.E, assigned to output E, to 1 and resets %Ri.I and %Ri.O words to 0.
• Effect of a warm restart : (%S1=1) has no effect on the contents of the register, nor on the state of its output bits.
Programming and configuration
%M1
%I0.3
%I0.3 %R2.E
R
%R2
I
TYPE FIFO
F
O
E
The programming example shows word
%MW34 being loaded into %R2.I at the storage request %I0.2, if register R2 is not full (%R2.F=0). The storage request in the register is made by %M1. The retrieval request is made by input %I0.3 and %R2.O
is loaded into %MW20 if the register is not empty (%R2.E=0).
%MW20:=%R2.O
%I0.2 %R2.F
%R2.I:=%MW34
Configuration
The only parameter which must be entered during configuration is the type of register : FIFO (default) or LIFO.
%M1
Reversible program
I
BLK %R2
LD %M1
LD
O
%I0.3
END_BLK
LD %I0.3
ANDN %R2.E
[%MW20:=%R2.O]
LD %I0.2
ANDN %R2.F
[%R2.I:=%MW34]
ST %M1
Non-reversible program
I
LD %M1
%R2
LD
O
%I0.3
%R2
ANDN %R2.E
[%MW20:=%R2.O]
LD %I0.2
ANDN %R2.F
[%R2.I:=%MW34]
ST %M1
___________________________________________________________________________
2/22
Combinational and sequential instructions 2
2.2-6 Drum controller function block %DRi
R
%DRi
F
U
STEPS 8
Drum controller block
The drum controller operates on a similar principle to an electromechanical drum controller, which changes step according to external events. On each step, the high point of a cam gives a command which is executed by the control system. In the case of a drum controller, these high points are symbolized by state 1 for each step and are assigned to output bits %Qi.j or internal bits %Mi, known as control bits.
B
Characteristics
Number
Current step number
Number of steps
Return to step 0 input (or instruction)
Advance input
(or instruction)
Output
Control bits
%DRi
%DRi.S
0 to 3
0
≤
%DRi.S
≤
7. Word which can be read and tested.
Can only be written in the program with a decimal immediate value.
1 to 8 (default)
R (RESET) At state 1, sets the drum controller to step 0.
U (UP)
F (FULL)
On a rising edge, causes the drum controller to advance by one step and updates the control bits.
Indicates that the current step equals the last step defined. The associated bit %DRi.F can be tested (for example, %DRi.F=1 if %DRi.S= number of steps configured - 1).
Outputs or internal bits associated with the step (16 control bits) and defined in the
Configuration editor.
___________________________________________________________________________
2/23
B
Operation
The drum controller comprises :
• A matrix of constant data (the cams) organized in 8 steps (0 to 7) and 16 data bits (state of the step) arranged in columns numbered 0 to F.
• A list of control bits (1 per column) corresponding either to outputs %Q0.i or %Q1.i, or to internal bits %Mi. During the current step, the control bits take on the binary states defined for this step.
The table below summarizes the main characteristics of the drum controller.
Column
Control bits
Step 0
Step 1
0 1 2
%Q0.1 %Q0.3 %Q1.5
0
1
0
0
1
1
D E F
%Q0.6 %Q0.5 %Q1.0
1
1
1
0
0
0
Step 5
Step 6
Step 7
1
0
1
1
1
1
1
1
1
0
0
1
0
1
0
0
0
0
In the example above, step 5 is the current step, control bits %Q0.1; %Q0.3 and %Q1.5
are set to state 1; control bits %Q0.6; %Q0.5 and %Q1.0 are set to state 0.
The current step number is incremented on each rising edge at input U (or on activation of instruction U). The current step can be modified by the program.
Operating diagram
Input
Input
Step No.
Output
U:
R:
%DRi.S
0
%DRi.F
1 2 3 L-1 0 1 2 0 1
Special cases
• Effect of a cold restart : (%S0=1) resets the drum controller to step 0 (updating the control bits).
• Effect of a warm restart : (%S1=1) updates the control bits, after the current step.
• Effect of a program jump : If the drum controller is not scanned, the control bits are not reset to 0.
• Updating the control bits : only occurs when there is a change of step or in the case of a warm or cold restart.
• Effect of master control relay instructions MCS/MCR : Having a drum controller between 2 MCS/MCR instructions means that the control bits are reset to 0 if the
Boolean result of the instruction preceding the MCS instruction is 0.
___________________________________________________________________________
2/24
Combinational and sequential instructions 2
Programming and configuration
In this example, the first 6 outputs %Q0.0 to %Q0.5 are activated in succession, each time input %I0.1 is set to 1.
Input I0.0 resets the outputs to 0.
Reversible programming
%I0.0
%I0.1
R
%DR1
F
U
STEPS 6
%Q0.8
BLK %DR1
LD
R
%I0.0
LD %I0.1
U
OUT_BLK
LD F
ST %Q0.8
END_BLK
B
Configuration
The following information is defined during configuration :
• The number of steps : 6
• The output states (control bits) for each drum controller step.
Q0. 1: 2: 3: 4: 5:
Step 1 : 0 0 0 0 0
Step 2 : 1 0 0 0 0
Step 3 : 0 1 0 0 0
Step 4 : 0 0 1 0 0
Step 5 : 0 0 0 1 0
Step 6 : 0 0 0 0 1
• Assignment of the control bits
1: %Q0.0
4: %Q0.1
2: %Q0.2
5: %Q0.3
3: %Q0.4
6: %Q0.5
Non-reversible programming
LD
R
LD
U
LD
ST
%I0.0
%DR1
%I0.1
%DR1
%DR1.F
%Q0.8
___________________________________________________________________________
2/25
B
2.3
Grafcet instructions
2.3-1 Description
Grafcet instructions in PL7 language offer a simple method of translating a control sequence (Grafcet chart).
The PL7 language comprises a maximum of 62 steps, including the initial step(s). The number of steps active at any one time is limited only by the total number of steps.
The table below lists all the instructions and objects required to program a Grafcet chart.
Graphic representation
Transcription in PL7 language
Role
Initial step
Transition
Step
=*= i
# i
-*- i
#
#Di
=*= POST
%Xi
Start the initial step (1)
Activate step i after deactivating the current step
Start step i and validate the associated transition (1)
Deactivate the current step without activating any other steps
Deactivate step i and the current step
Start post-processing and end sequential processing
Bit associated with step i, can be tested and written (max. no. of steps :
62).
Xi
LD %Xi, LDN %Xi, Test the activity of step i
AND %Xi, ANDN %Xi
OR %Xi, ORN %Xi
XOR %Xi, XORN %Xi
Xi
S
Xi
R
S %Xi Activate step i
R %Xi Deactivate step i
(1) The first step =*=i or -*-i written indicates the start of sequential processing and thus the end of preprocessing.
___________________________________________________________________________
2/26
Combinational and sequential instructions 2
Examples
Linear sequence
1
%I0.1
2
%I0.2
3
Alternative sequence
4
%I0.3
5
%I0.5
7
%I0.4
6
%I0.6
=*= 1
%I0.1
-*- 2
%I0.2
-*- 4
%I0.3
%I0.4
-*- 5
%I0.5
-*- 6
%I0.6
Simultaneous sequences
8
%I0.7
9
%I0.8
11
%M0
13
10
%I0.9
12
-*- 8
%I0.7
-*- 9
%I0.8
-*- 10
%I0.9
Note
For a Grafcet Chart to be operational, at least one active step must be declared using the =*=i instruction
(initial step) or the chart should be pre-positioned during preprocessing using system bit %S23 and the instructions S %Xi. See example of prepositioning a chart in appendix A.10
-*- 11
%M0 %X12
-*- 12
%M0 %X11
12
#
12
#D
13
#
11
#D
13
#
9
#
10
#
11
#
6
#
5
#
7
#
7
#
3
#
2
#
=*=1
LD %I0.1
# 2
-*- 2
LD %I0.2
# 3
-*- 4
LD %I0.3
# 5
LD %I0.4
# 6
-*- 5
LD %I0.5
# 7
-*- 6
LD %I0.6
# 7
-*- 8
LD %I0.7
# 9
# 10
-*- 9
LD %I0.8
# 11
-*- 10
LD %I0.9
# 12
-*- 11
LD %M0
AND %X12
#D 12
# 13
-*- 12
LD %M0
AND %X11
#D 11
# 13
2/27
B
B
2.3-2 Program structure
A PL7 Grafcet program has 3 parts, each of which has a specific role.
Processing Example
Preprocessing
This comprises a series of instructions for processing :
• power returns
• faults
• changes of operating mode
• prepositioning Grafcet steps
• input logic
%I0.6
%I0.6
P
%S22
S
%M0
%S21
S
000 LDN
001 S
%I0.6
%S22
002 ST %M0
003 LDR %I0.6
004 S %S21
Preprocessing ends with the first =*= or -*- instruction which occurs.
Sequential processing
This comprises the chart
(instructions representing the chart) :
• steps
• actions associated with steps (see appendix A.11
part G)
• transitions
• transition conditions
Sequential processing ends with execution of the =*=POST instruction
= * = 1
%I0.2
%I0.3
%I0.3
– * – 2
%I0.4
– * – 3
%I0.5
%I0.2
2
#
3
#
1
#
1
#
005 =*= 1
006 LD %I0.2
007 ANDN %I0.3
008 #
009 LD
2
%I0.3
010 ANDN %I0.2
011 #
012 -*-
013 LD
014 #
015 -*-
016 LD
017 #
3
2
%I0.4
1
3
%I0.5
1
Post-processing
This comprises a series of instructions for processing :
• commands from the sequential processing for controlling the outputs
• safety interlocks specific to the outputs.
%X1
%X2
%X3
%M1 %I0.2 %I0.7
%Q0.1
%Q0.2
%Q0.3
018 =*= POST
019 LD
020 ST
021 LD
%X1
%Q0.1
%X2
022 ST
023 LD
%Q0.2
%X3
024 OR( %M1
025 ANDN %I0.2
026 AND %I0.7
027 )
028 ST %Q0.3
Note :
The scan cycle is that defined in Part A, Section 1.3. In sequential processing, only active steps at the start of the scan and their associated instructions are executed.
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2/28
Combinational and sequential instructions 2
2.4
Program instructions
2.4-1 Program end instructions END, ENDC, ENDCN
The end of the execution of a program scan is defined using the instructions END, ENDC and ENDCN :
END : unconditional end of program
ENDC : end of program if Boolean result of preceding test instruction is 1
ENDCN : end of program if Boolean result of preceding test instruction is 0.
By default (normal mode) when the end of program is activated, the outputs are updated and the next scan is started.
If scanning is periodic, when the end of period is reached the outputs are updated and the next scan is started.
Example :
%M1 %Q0.1
%M2 %Q0.2
LD %M1
ST %Q0.1
LD %M2
ST %Q0.2
.....................
END
END
B
%M1
%M2
%I0.2
%M2
%Q0.1
%Q0.2
END
%Q0.2
LD %M1
ST %Q0.1
LD %M2
ST %Q0.2
.....................
LD %I0.2
ENDC
LD %M2
ST %Q0.2
....................
END
If %I0.2 =1, end of program scanning.
If %I0.2 =0, continues program scanning until new END instruction.
END
2.4-2 NOP Instruction
The NOP instruction does not perform any operation. It is used for "reserving" lines in a program which allow the user to insert instructions later without modifying the line numbers.
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2/29
B
2.4-3 Jump instructions JMP, JMPC, JMPCN to a label %Li:
Instructions JMP, JMPC and JMPCN cause the execution to be interrupted immediately and the program to be continued from the line after the program line containing label %Li
(i = 0 to 15).
JMP : unconditional program jump
JMPC : program jump if Boolean result of preceding logic is 1
JMPCN : program jump if Boolean result of preceding logic is 0.
Examples :
000 LD %M15
001 JMPC %L8
002 LD [%MW24>%MW12]
003 ST %M15
004 JMP %L12
005 %L8:
006 LD %M12
007 AND %M13
008 ST %M2
009 JMPCN %L12
010 OR %M11
011 S %Q0.0
012 %L12:
013 LD %I0.0
.......................................
Jump to label %L8 if %M15 is at 1
Unconditional jump to label %L12 :
Jump to label %L12 if %M2 is at 0
Note :
• These instructions are not permitted between parentheses, and they must not be placed between the instructions AND(, OR(, and a close parenthesis instruction ")".
• The label can only be placed before a LD, LDN, LDR, LDF or BLK instruction.
• The label number of label %Li must be defined only once in a program.
• The program jump is performed to a line of programming which is downstream or upstream. When the jump is upstream, attention must be paid to the program scan time. Extended scan time can cause the watchdog timer to expire.
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2/30
Combinational and sequential instructions 2
2.4-4 Subroutine instructions SRn, SRn:, RET
The SRn instruction calls the subroutine referenced by label SRn: if the result of the preceding Boolean instruction is 1.
The RET instruction placed at the end of the subroutine commands the return to the main program.
The subroutine is referenced by a label SRn: with n=0 to 15.
Example :
000 LD %M15
001 AND %M5
002 ST %Q0.0
003 LD [%MW24>%MW12]
004 SR8
005 LD %I0.4
006 AND %M13
007 .
008 .
009 .
010 END
011 SR8:
012 LD 1
013 IN
014 LD
015 ST
%TM0
%TM0.Q
%M10
016 RET
.......................................
Note :
• A subroutine should not call up another subroutine.
• This instruction is not permitted between parentheses, and thus it must not be placed between the instructions AND(, OR(, and a close parenthesis instruction ")".
• The label can only be placed before a LD or BLK instruction marking the start of a Boolean equation (or rung).
• Calling the subroutine must not be followed by an assignment (e.g. output or transfer) instruction, example :
%I0.0
SR0
%Q0.0
LD %I0.0
SR0
ST %Q0.0
%I0.0
%Q0.0
LD %I0.0
ST %Q0.0
SR0
SR0
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2/31
B
B
2.4-5 Master control relay instructions MCR and MCS
When the Boolean result of the instruction preceding the MCS instruction is 0, the execution of the program lines following this instruction are modified as shown in the table below until the MCR instruction is (unconditional) executed. (See also Part C,
Section 4.6.)
Instructions / blocks
ST, STN
S, R
SRi, JMP, JMPC, JMPCN
%TMi
%DRi
%FC
% PWM, %PLS
Other function blocks
Operation blocks
Behavior
Associated object set to 0
Instructions not executed
Not executed
Reinitialized
Control bits set to 0
Counter stopped and threshold outputs reset to 0
Generation of output signals stopped
Not executed (maintain their current state)
Not executed
%I0.1
Example :
...............
002 LD
003 MCS
004
005
LD
ST
006 LD
007 S
007 MCR
...............
%I0.1
%M1
%Q0.1
%l0.2
%Q0.2
When %I0.1 is at 0, the MCS instruction is activated, %Q0.1 is forced to 0, and output
%Q0.2 is maintained.
It is possible to use several MCS instructions for a single MCR instruction.
All the MCS instructions are deactivated by a single MCR instruction.
When %I0.1 is at 0, sequences 1 and 2 are modified, sequence 3 is executed normally.
When %I0.1 is at 1 and %I0.2 is at 0, sequence 2 is modified, and sequences 1 and 3 are executed normally.
If no MCR instruction is programmed after an MCS instruction, the MCS instruction is effective until the END instruction or the end of the program.
%M1
%I0.2
%I0.1
%I0.2
Sequence 1
Sequence 2
Sequence 3
MCS
%Q0.1
%Q0.2
S
MCR
MCS
MCS
MCR
!
CAUTION
UNEXPECTED EQUIPMENT OPERATION
Do not use MCS and MCR instructions in subroutines, transition conditions or Grafcet actions.
Failure to observe this precaution can cause equipment damage and personal injury.
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2/32
3 Numerical and special instructions
3.1
Numerical processing
3.1-1 Definition of word objects
Word objects are addressed in the form of words of 16 bits, which are stored in the data memory, and which can contain an integer value between -32768 and 32767 (except for the fast counter which is between 0 and 65535).
B
Immediate values
These are integer values of the same format as the 16-bit words, which enable values to be assigned to these words. They are stored in the program memory and contain a value between -32768 and 32767.
Word formats
The contents of the words or values are stored in the user memory in 16-bit binary code
(two's complement) using the following convention :
15
0
±
14
1
13
0
12
1
11
0
10
0
9
1
8
0
7
0
6
1
5
0
4
0
3
1
2
1
1
0
0
1
Bit position
Bit state
Bit value
In signed binary notation, bit 15 is allocated by convention to the sign of the coded value:
• Bit 15 at 0 : the content of the word is a positive value.
• Bit 15 at 1 : the content of the word is a negative value (negative values are expressed in two's complement logic).
Words and immediate values can be entered or retrieved in the following format :
• Decimal 1579 (max : 32767, min :-32768)
• Hexadecimal 16#A536 (max : 16#FFFF, min : 16#0000) alternate syntax : #A536.
Internal words
Internal words are used to store values during the operation.
They are stored in the data memory.
Words %MW0 to %MW255 are read or written to directly by the program. They are used as working words.
%MW0
%MW255
16 bits
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3/1
B
Constant words
Constant words store constant values or alphanumeric messages. Their contents can only be written or modified by the terminal
(in the CONFIGURATION editor). Constant words %KW0 - %KW63 have readonly access by the program.
%KW0
16 bits
%KW63
I/O exchange words
I/O exchange words %IW/QW are assigned to PLCs connected by extension cable.
They are used for exchanges between PLCs (see Section 3.4).
System words
These 16-bit words have several functions. They provide access to data coming directly from the PLC by reading %SWi words (for example, potentiometers). They are used to perform operations on the application (for example, adjusting the schedule blocks). The role of each of these words is explained in Section 5.
Bit objects extracted from words
It is possible to extract one of the 16 bits from some words. The position of the extracted bit separated by a colon is added to the word address.
Syntax : % Word object : Xk where k = 0 to 15 position of the bit in the object word.
Example : %MW5:x6 : bit position 6 of internal word %MW5.
List of word operands
Type Address
(or value)
Maximum number
Immediate values
• base 10
• base 16
Internal words
Constant words
System words
Function block words
Exchange words
Input words
Output words
Bits extracted from words
• internal
• system
• constant
• input
• output example : 2103 example : 16#AF0D
%MWi
%KWi
%SWi
%TMi.P %Ci.P etc.
%IWi.j
%QWi.j
%MWi:Xk
%SWi:Xk
%KWi:Xk
%IWi.j:Xk
%QWi.j:Xk
8
8
256
64
128
256 x 16
128 x 16
64 x 16
8 x 16
8 x 16
(1) constant words are entered in configuration mode.
Write access
No
Yes
No (1) depends on i
No
Yes
Yes depends on i
No
No
Yes
See
Sect.
-
-
5.2
2.2-1
3.3
3.5
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3/2
Numerical and special instructions 3
3.1-2 Structured objects
Bit string
Bit strings are series of adjacent object bits of the same type and of a defined length :
L.
Example of bit strings :
%M8 %M9 %M10 %M11 %M12 %M13
%M8:6 (1)
B
Type
Discrete input bits
Discrete output bits
System bits
Grafcet Step bits
Internal bits
Address
%I0:L or %I1:L
%Q0:L or %Q1:L
%Si:L with i multiple of 8
%Xi:L with i multiple of 8
%Mi:L with i multiple of 8
Maximum size
0<L<17
0<L<17
0<L<17 and i+L
≤
128
0<L<17 and i+L
≤
63
0<L<17 and i+L
≤
128
Write access
No
Yes
Depending on i
Yes (by program)
Yes
Bit strings can be used with the assignment instruction := (see assignment instruction,
Section 3.1-4).
Word tables
Word tables are series of adjacent words of the same type and of a defined length : L.
Example of word tables :
%KW10 16 bits
%KW10:7
%KW16
Type
Internal words
Constant words
System words
Address
%MWi:L
%KWi:L
%SWi:L
Maximum size
0<L<256 and i+L
≤
256
0<L and i+L
≤
64
0<L and i+L
≤
128
Write access
Yes
No
Depending on i
Word tables can be used with the assignment instruction := (see assignment instruction,
Section 3.1-4).
(1) %M8:6 is acceptable (8 is a multiple of 8)
%M10:16 is unacceptable (10 is not a multiple of 8)
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3/3
B
Indexed words
• Direct addressing
The addressing of an object is said to be direct when the address of the objects is fixed and defined when the program is written.
Example : %M26 (internal bit with the address 26)
• Indexed addressing
In indexed addressing, an index is added to the direct address of an object : the content of the index is added to the object address. The index is defined by an internal word
%MWi. The number of "index words" is unlimited.
Example : %MW108[%MW2] : word with direct address 108 + contents of word
%MW2.
If word %MW2 has a value of 12, writing to %MW108[%MW2] is equivalent to writing to %MW120.
Type
Internal words
Constant words
Address
%MWi[%MWj]
%KWi[%MWj]
Maximum size
0
≤ i+%MWj<256
0
≤ i+%MWj<64
Write access
Yes
No
Indexed words can be used with the assignment instruction := (see assignment instruction, Section 3.1-4) and in comparison instructions (see comparison instructions Section 3.1-5).
This type of addressing enables series of objects of the same type (internal words, constant words, etc) to be scanned in succession, by modifying the content of the index word via the program.
• Index overflow, system bit %S20
There is an overflow of the index when the address of an indexed object exceeds the limits of the memory zone containing the same type of object, that is to say when :
• The object address + the content of the index is less than 0,
• The object address + the content of the index is greater than 255 (for words %MWi) or 63 (for words %KWi).
In the event of an index overflow, the system sets system bit %S20 to 1 and the object is assigned an index value of 0.
Note: The user is responsible for monitoring any overflow : bit %S20 must be read by the user program for possible processing. The user must see that it is reset to 0.
%S20 (initial state = 0) :
• On index overflow : set to 1 by the system.
• Acknowledgment of overflow : set to 0 by the user, after modifying the index.
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3/4
Numerical and special instructions 3
3.1-3 Introduction to numerical instructions
Numerical instructions generally apply to 16-bit words (see Section 3.1-1). They are written between square brackets. If the result of the preceding logical operation was true
(the Boolean accumulator = 1), the numerical instruction is executed. If the result of the preceding logical operation was false (the Boolean accumulator = 0), the numerical instruction is not executed and the operand remains unchanged.
Note : Numerical instructions are displayed in 2 or 3 lines on an FTX117 terminal.
B
3.1-4 Assignment instructions
These are used to load operand Op2 into operand Op1
Syntax : [Op1:=Op2] <=> Op2->Op1
The following assignment operations can be performed :
• On bit strings
• On words
• On word tables
Assignment of bit strings (see bit string object in Section 3.1-2)
Operations can be performed on the following bit strings : bit string -> bit string (ex 1) bit string -> word (ex 2) word -> bit string (ex 3) immediate value -> bit string
Examples
%I0.2
%I0.3
P
%Q0:8:=%M64:12
%MW100:=%I0:16
%M104:16:=%KW0
LD 1
[%Q0:8:= %M64:12]
LD %I0.2
[%MW100:= %I0:16 ]
LDR %I0.3
[%M104:16:=%KW0]
(ex 1)
(ex 2)
(ex 3)
Usage rules
• For bit string -> word assignment : the bits in the string are transferred to the word starting on the right (first bit in the string to bit 0 in the word), and the word bits which are not involved in the transfer (length<16) are set to 0.
• For word -> bit string assignment : the word bits are transferred from the right (word bit 0 to the first bit in the string).
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3/5
B
Syntax
Operator
:=
Syntax
[Op1: = Op2 ]
Operand 1 (Op1) Operand 2 (Op2 )
%MWi,%QWi, %SWi Immediate value, %MWi,
Operand 1 (Op1) assumes
%MWi[MWi],
%Mi:L,%Qi:L,%Si:L, the value of operand 2 (Op2) %Xi:L
%KWi,%IW,%QW,%SWi,
%BLK.x,%MWi[MWi],
%KWi[MWi], %Mi:L,%Qi:L,
%Si:L,%Xi:L, %Ii:L
Note : The abbreviation %BLK.x (e.g. %C0.P) is used to describe any function block word.
Assignment of words
Assignment operations can be performed on the following words : word -> word (ex 1) word -> indexed word indexed word -> word immediate value -> word (ex 3) bit string -> word indexed word -> indexed word (ex 2) immediate value -> indexed word word -> bit string
Examples :
%SW112:=%MW100
%I0.2
%MW0[%MW10]:=%KW0[%MW20]
LD 1
[%SW112 := %MW100]
LD %I0.2
[%MW0[%MW10] :=
%KW0[%MW20] ]
(ex 1)
(ex 2)
%I0.3
P
%MW10:=100 LDR %I0.3
[%MW10:=100] (ex 3)
Syntax
Operator
:=
Syntax
[Op1: = Op2 ]
Operand 1 (Op1) assumes
Operand 1 (Op1) Operand 2 (Op2 )
%MWi,%QWi, %SWi Immediate value, %MWi,
%MWi[MWi],
%Mi:L,%Qi:L,%Si:L, the value of operand 2 (Op2) %Xi:L
%KWi, %IW, %QW, %SWi,
%BLK.x, %MWi[MWi],
%KWi[MWi], %Mi:L,%Qi:L,
%Si:L,%Xi:L,%Ii:L
Notes :
• The abbreviation %BLK.x (e.g. R3.I) is used to describe any function block word.
• For bit strings %Mi:L, %Si:L and %Xi:L, the base address of the first of the bit string must be a multiple of 8 (0, 8, 16, …, 96, …).
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3/6
Numerical and special instructions 3
Assignment of word tables (see word table object in Section 3.1-2)
Assignment operations can be performed on the following word tables : immediate value -> word table (ex 1) word -> word table (ex 2) word table -> word table (ex 3)
Examples
%I0.2
%I0.3
P
%MW0:10:=100
%MW0:10:=%MW11
%MW10:20=%KW30:20
LD 1
[%MW0 :10:= 100]
LD %I0.2
[%MW0:10 := %MW11]
LDR %I0.3
[%MW10:20=%KW30:20]
(ex 1)
(ex 2)
(ex 3)
B
Syntax
Operator
:=
Syntax
[Op1: = Op2 ]
Operand 1 (Op1) assumes the value of operand 2 (Op2)
Operand 1 (Op1)
%MWi:L,%SWi:L
Operand 2 (Op2 )
%MWi:L, %KWi:L, %SWi:L lmmediate value, %MWi,
%KWi, %IW, %QW, %SWi,
%BLK.x
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3/7
3.1-5 Comparison instructions
Comparison instructions are used to compare two operands.
B
> : test if operand 1 is greater than operand 2.
>= : test if operand 1 is greater than or equal to operand 2.
< : test if operand 1 is less than operand 2.
<= : test if operand 1 is less than or equal to operand 2.
= : test if operand 1 is equal to operand 2.
<> : test if operand 1 is different from operand 2.
Structure
The comparison is executed inside square brackets following instructions LD, AND and
OR. The result is 1 when the comparison requested is true.
%Q0.3
%MW10>100
%M0
%I0.2
%MW20<%KW35
%Q0.2
%Q0.4
LD
ST
[%MW10 > 100]
%Q0.3
LD %M0
AND [%MW20 < %KW35]
ST %Q0.2
LD %I0.2
OR [%MW30 >= %MW40]
ST %Q0.4
%MW30>=%MW40
Syntax
Operator
>,>=,<,<=
=, <>
Syntax
LD[ Op1 Operator Op2]
AND[ Op1 Operator Op2]
OR[Op1 Operator Op2]
Operand 1 (Op1)
%MWi,%KWi,%IW,
Operand 2 (Op2)
Immediate value, %MWi,
%QWi,%SWi,%BLK.x
%KWi,%IW,%QW,%SWi,
%BLK.x,%MWi[%MWi],
%KWi[%MWi]
Note
Comparison instructions can be used within parentheses.
Example :
LD %M0
AND( [%MW20>10]
OR %I0.0
)
ST %Q0.1
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3/8
Numerical and special instructions 3
3.1-6 Arithmetic instructions
These instructions are used to perform arithmetic operations between two operands or on one operand.
+ : add two operands REM : remainder of division of the two operands
: subtract two operands
* : multiply two operands
/ : divide two operands
SQRT : square root of an operand
INC : increment an operand
DEC : decrement an operand
Structure
Arithmetic operations are performed as follows :
%M0
%I0.2
%I0.3
P
%MW0:=%MW10+100
%MW0:=SQRT(%MW10)
INC %MW100
LD %M0
[%MW0 := %MW10 + 100]
LD %I0.2
[%MW0 := SQRT(%MW10) ]
LDR %I0.3
[INC %MW100]
B
Syntax
This depends on the operators used : see the table below.
Operator Syntax
+,-,*,/,REM (1) [Op1: = Op 2 Operator Op3]
Operand 1 (Op1) Operands 2 and 3 (Op2 & 3)
%MWi,%QWi, %SWi Immed.value (2),%MWi,%KWi,
SQRT
INC, DEC
[Op1: = SQRT(Op2)]
[Operator Op1]
%IW,%QW,%SWi,%BLK.x
Rules for use
• Addition : Overflow during operation
If the result exceeds the limits of -32768 or +32767, bit %S18 (overflow) is set to 1. The result is then, in itself, not correct (see next page). The user program manages bit %S18.
Example :
%M0
%S18
%S18
%MW0:=%MW1+%MW2
%MW10:=%MW0
%MW10:=32767
%S18
R
LD %M0
[%MW0 := %MW1+ %MW2]
LDN %S18
[%MW10 := %MW0 ]
LD %S18
[%MW10 := 32767 ]
R %S18
If %MW1 =23241 and %MW2=21853, the real result (45094) cannot be expressed in one 16-bit word, bit %S18 is set to 1 and the result obtained (-20442) is incorrect. In this example when the result is greater than 32767, its value is fixed at 32767.
(1) with TSX 07s V2.2 or lower, the result (Op1) of division (/) or of the remainder (REM) is not significant when the contents of operand 3 (Op3) is greater then 255.
3/9
B
Absolute overflow of the result (unsigned arithmetic) :
During certain calculations, it may be necessary to interpret an operand in unsigned arithmetic (bit 15 then represents the value 32768). The maximum value for an operand is 65535. Adding 2 absolute values (unsigned) whose result is greater than 65535 causes an overflow. This is signaled by system bit %S17 (carry) changing to 1, which represents the value 65536.
Example 1 : [%MW2:=%MW0 + %MW1] where %MW0 =65086, %MW1=65333
Word %MW2 contains the number 64883. Bit %S17 is set to 1 and represents the value
65536. The unsigned arithmetic result is then equal to :
65536 + 64883 = 130419.
Example 2 : [%MW2:=%MW0 + %MW1] where %MW0 =45736 (that is, a signed value of -19800), %MW1=38336 (that is, a signed value of 27200).
The two system bits %S17 and %S18 are set to 1. The signed arithmetic result (+18536) is incorrect. In unsigned arithmetic, the result (18536 + the value of %S17, that is 84072) is correct.
• Subtraction :
Negative result
If the result of a subtraction is less than 0, system bit %S17 is set to 1.
• Multiplication :
Overflow during operation
If the result exceeds the capacity of the result word, bit %S18 (overflow) is set to 1 and the result is not significant.
• Division/Remainder :
Division by 0
If the divider is 0, the division is impossible and system bit %S18 is set to 1. The result is then incorrect.
Overflow during operation
If the division quotient exceeds the capacity of the result word, bit %S18 is set to 1.
• Square root extraction :
Square root extraction is only performed on positive values. Thus, the result is always positive. If the square root operand is negative, system bit %S18 is set to 1 and the result is incorrect.
Note : The user program is responsible for managing system bits %S17 and %S18.
These are set to 1 by the PLC and must be reset by the program so that they can be reused (see previous page for example).
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3/10
Numerical and special instructions 3
3.1-7 Logic instructions
The associated instructions are used to perform a logic operation between two word operands or on one word operand.
AND : AND (bit-wise) between two operands
OR : Logic OR (bit-wise) between two operands
XOR : Exclusive OR (bit-wise) between two operands
NOT : Logic complement (bit-wise) of an operand
B
Structure
Logic operations are performed as follows :
%M0
%MW0:=%MW10 AND 16#FF00
%I0.3
%MW0:=%KW5 OR %MW10
LD %M0
[%MW0 := %MW10 AND 16#FF00]
LD 1
[%MW0 := %KW5 OR %MW10]
LD %I0.3
[%MW102:= NOT (%MW100)]
%MW102:=NOT (%MW100)
Syntax
This depends on the operators used : see table below.
Operator Syntax
AND, OR, XOR [Op1: = Op2 Operator Op3]
NOT [NOT (Op2)]
Operand 1 (Op1) Operands 2 and 3 (Op2 & 3)
%MWi,%QWi, %SWi Immed. val. (1), %MWi,%KWi,
%IW,%QW,%SWi, %BLK.x
Example : [%MW15:=%MW32 AND %MW12]
(1) with NOT, Op2 cannot be an immediate value.
___________________________________________________________________________
3/11
B
3.1-8 Shift instructions
Shift instructions consists of moving bits of an operand a certain number of positions to the right or to the left.
There are two types of shift operation :
F 0
• Logic shift :
- SHL(op2,i) logic shift of i positions to the left.
%S17 0
- SHR(op2,i) logic shift of i positions to the right.
%S17
F 0
• Rotate shift :
- ROL(op2,i) rotate shift of i positions to the left.
F
%S17 - ROR(op2,i) rotate shift of i positions to the right.
0
%S17
Structure
Logic operations are performed as follows :
As the operand to be shifted is a single length operand, the variable i must be between 1 and 16.
The state of the last output bit is stored in bit %S17.
%I0.1
P %MW0:=SHL(%MW10,5)
LDR %I0.1
[%MW0 := SHL(%MW10,5)]
%I0.2
P %MW10:=ROR(%KW9,8)
LDR %I0.2
[%MW10 := ROR(%KW9,8)]
Syntax
This depends on the operators used : see the table below.
Operator
SHL, SHR
ROL, ROR
Syntax
[Op1: = Operator(Op2,i)]
Operand 1 (Op1) Operand 2 (Op2)
%MWi,%QWi, %SWi %MWi,%KWi,
%IW,%QW,%SWi, %BLK.x
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3/12
Numerical and special instructions 3
3.1-9 Conversion instructions
There are two types of conversion instruction :
• BTI : BCD --> Binary conversion
• ITB : Binary --> BCD conversion
Review of the BCD code :
The BCD code (Binary Coded Decimal) represents a decimal digit (0 to 9) by coding 4 bits. A 16-bit word object can thus contain a number expressed in four digits
(0
≤
N
≤
9999).
During a conversion, if the value isn't a BCD one, the system bit %S18 is placed at 1.This
bit must be tested and reset to 0 by the user program.
Decimal
BCD
0
0000
1
0001
2
0010
3
0011
4
0100
5 6
0101 0110
7
0111
8
1000
9
1001
Example :
• Word %MW5 expresses the BCD value "2450" which corresponds to the binary value : 0010 0100 0101 0000
• Word %MW12 expresses the decimal value "2450" which corresponds to the binary value : 0000 1001 1001 0010
Word %MW5 is converted to word %MW12 by using instruction BTI.
Word %MW12 is converted to word %MW5 by using instruction ITB.
Structure
Conversion operations are performed as follows :
%M0
%MW0:=BTI(%MW10)
LD %M0
[%MW0 := BTI (%MW10)]
%I0.2
%MW10:=ITB(%KW9)
LD %I0.2
[%MW10 := ITB (%KW9)]
B
Syntax
This depends on the operators used : see the table below.
Operator Syntax Operand 1 (Op1)
BTI, ITB [Op1: = Operator (Op2)]
Operand 2 (Op2)
%MWi,%QWi, %SWi %MWi,%KWi, %IW,%QW,
%SWi, %BLK.x
Application examples
The BTI instruction is used to process a setpoint value at PLC inputs via BCD encoded thumbwheels.
The ITB instruction is used to display numerical values (for example, the result of a calculation, the current value of a function block) on BCD coded displays.
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3/13
B
3.2
Potentiometers
Review from Part A, Section 1.8 :
The TSX 07 PLCs have on the front panel :
• One potentiometer for TSX Nano PLCs with 10 I/O
• Two potentiometers for TSX Nano PLCs with 16 and 20 I/O.
Programming
The numerical values from 0 to 255 corresponding to the analog values provided by these potentiometers are contained in the following two system words :
• %SW112 for the first potentiometer (leftmost, potentiometer no.0)
• %SW113 for the second potentiometer (rightmost, potentiometer no.1)
These words can be used in arithmetic operations. They can be used for any type of adjustment, for example, presetting a time-delay or a counter, adjusting the frequency of the pulse generator or machine preheating time.
Example :
Adjusting the duration of a time-delay from
5 to 10s using potentiometer no.0.
For this adjustment practically the entire adjustment range of the potentiometer from
0 to 250 is used.
10s
5s
The following parameters are selected at configuration for the time-delay block
%TM0 :
• Type TON
• Time base TB : 10ms
0 250
The preset value of the time-delay is calculated from the adjustment value of the potentiometer using the following equation %TM0.P :=2*%SW112+500.
%MW0:=2*%SW112
%TM0.P:=%MW0+500
%I0.0
IN
%TM0
Q
%Q0.0
LD 1
[%MW0:=2*%SW112]
[%TM0.P:=%MW0+500]
BLK %TM0
LD
IN
%I0.0
OUT_BLK
LD Q
ST %Q0.0
END_BLK
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3/14
Numerical and special instructions 3
3.3
Dedicated function blocks
3.3-1 Bit and word objects associated with dedicated function blocks
Dedicated function blocks use the same type of dedicated words and bits as standard function blocks (See Section 2.2).
Function block bit and word objects accessible by the program
Dedicated function blocks
Pulse width modulation output
%PWM
Pulse generator
%PLS
Fast counter %FC
Send message %MSG
Shift bit register
%SBRi (i=0 to 7)
Step counter
%SCi (i=0 to 7)
Associated words and bits
Word
Word
Bit
Word
Bit
Address Write access
% of pulse at 1 in relation to the total period
Preset period
Preset value
No. of pulses to generate
Current output
Generation done output
%PWM.R
%PWM.P
%PLS.P
yes
No yes
%PLS.N
yes
%PLS.Q
no
%PLS.D
no
Threshold i (i = 0 or 1)
Current value
Preset value
%FC.Si
%FC.V
%FC.P
yes no yes
Overrun output %FC.F
no
Overrun threshold i output %FC.THi
no
Bit
Bit
Comm. fault output
Comm. done output
Register bit, j=0 to 15
%MSG.E
no
%MSG.D
no
%SBRi.j
yes
Bit Step counter bit, j=0 to 255 %SCi.j
no
See
Sect.
3.3-3
3.3-4
3.3-5
3.3-6
3.3-7
3.3-8
B
3.3-2 Programming principles
As with standard function blocks, special function blocks can be programmed in 2 different ways :
• Non-reversible programming : using special instructions.
• Reversible programming : by simulating Ladder language function blocks.
See Section 2.2-2.
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3/15
B
3.3-3 Pulse width modulation output % PWM
IN
%PWM
TB
%PWM.P
The %PWM function block is used to generate a square wave signal on PLC output %Q0.0. The signal width (duty cycle) can be varied by the program (for description, see Part A, Section 4.6).
This function can also be used to control an analog output module wired to the output %Q0.0 (see Section B-4).
%PWM block
Tp
T programmable width fixed period which can be configured
Characteristics
Time base
Preset period
TB
%PWM.P
0.1ms (1), 10ms, 1s (default value)
0<%PWM.P
≤
32767 if time base is 10ms or 1s.
0<%PWM.P
≤
255 if time base is 0.1ms
(0= function not in use)
The preset value and the time base can be modified during configuration. They are used to fix the signal period T = %PWM.PxTB.
The lower the ratios to be obtained, the greater the selected %PWM.P must be.
Range of periods obtained :
Ratio of the period
Pulse generation input
(or instruction)
%PWM.R
IN
• 0.2 to 26ms in steps of 0.1ms
• 20ms to 5.45 min in steps of 10ms
• 2s to 9.1 hours in steps of 1s
0
≤
%PWM.R
≤
100 (2), this word gives the percentage of the signal at state 1 in a period
(0 = default value).
The "width" Tp is thus equal to :
Tp = T x (%PWM.R/100)
Word %PWM.R is written by the user program.
It is this word which performs the width modulation.
At state 1, the pulse width modulated signal is generated at output %Q0.0.
At state 0, output %Q0.0 is set to 0.
(1) This time base is not advisable for TSX Nano PLCs with relay outputs.
(2) Values greater than 100 will be considered as being equal to 100.
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3/16
Numerical and special instructions 3
Operation
The frequency of output signal %Q0.0 is set during configuration by selecting the time base TB and the preset %PWM.P. The width of the signal is modulated by modifying the
%PWM.R ratio in the program.
Input IN
Ratio %PWM.R
80%
50%
20%
Output %Q0.0
Programming and configuration
In this example, the signal width is modified by the program according to the state of PLC inputs %I0.0 and %I0.1.
The signal period is set at 500 ms during configuration. (See configuration note below.)
If %I0.0 and %I0.1 are set to 0, the %PWM.R ratio is set at 20%, the duration of the signal at state 1 is then : 20% x 500 ms = 100 ms.
If %I0.0 is set to 0 and %I0.1 is set to 1, the %PWM.R ratio is set at 50% (duration 250 ms).
If %I0.0 and %I0.1 are set to 1, the %PWM.R ratio is set at 80% (duration 400 ms).
%I0.0 %I0.1
%I0.0 %I0.1
%I0.0 %I0.1
%I0.2
%PWM
IN
%PWM.R:=20
%PWM.R:=50
%PWM.R:=80
LDN %I0.0
ANDN %I0.1
[%PWM.R:=20]
LD %I0.0
ANDN %I0.1
[%PWM.R:=50]
LD %I0.0
AND %I0.1
[%PWM.R:=80]
BLK %PWM
LD %I0.2
IN
END_BLK
Configuration
Output %Q0.0 = output %PWM TB= 10ms %PWM.P=50
Special cases
• Effect of a cold restart : (%S0=1) sets the %PWM.R ratio to 0
• Effect of a warm restart : (%S1=1) has no effect
• Effect of a PLC stop :
The output %Q0.0 is set to 0 regardless of the state of system bit %S8. For PLCs, version 2.2 or lower, the output %Q0.0 is set to 0 if %S8 is at 1 or maintained (signal generation) if %S8 = 0.
• With 0.1 ms time base, forcing output %Q0.0 using a programming device does not stop the signal generation.
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3/17
B
B
3.3-4 Pulse generator output % PLS
%PLS
IN Q
TB
%PLS.P
Adjust
R D
%PLS block
The %PLS function block generates a square wave signal (on to off ratio, or duty cycle, of 50%) at PLC output %Q0.0.
This signal can be :
• of limited length, the number of pulses and the period are written by the program
(or during configuration).
• of unlimited length, the period is written by the program or during configuration.
(see description in Part A, Section 4.5).
Characteristics
Time base
Preset
Number of pulses
Adjustment via the terminal
Pulse generation input (or instruction)
Reset input
(or instruction)
Current pulse generation output
Pulse generation done output
PLS counter (2)
TB
%PLS.P
%PLS.N
Y/N
IN
R
%PLS.Q
%PLS.D
T variable period
0.1 ms (1), 10ms, 1s (default value)
0<%PLS.P<32767 if TB =10 ms or 1s.
0<%PLS.P<255 if TB = 0.1ms (1)(2)
(0 = output at 0, 1 = output at 1). The preset value is used to modulate the signal period T = %PLS.PxTB.
Range of periods obtained :
• 0.2 to 26ms in steps of 0.1ms
• 20ms to 5.45 min in steps of 10ms
• 2s to 9.1 hours in steps of 1s.
Note: %PLS.P must be an even number
0<%PLS.N
≤
32767, this word gives the number of pulses of the train to be generated.
0 = square wave signal of unlimited length (by default).
%PLS.N is tested and written by the program.
Y : possible to modify the preset value
%PLS.P.N in the Data editor.
N : no access in the Data editor
At state 1, generates the signal on output %Q0.0.
At state 0 sets output %Q0.0 to 0.
At state 1, resets the number of pulses of outputs %PLS.Q, and %PLS.D to zero
State 1, pulse signal is generated at %Q0.0.
State 1, signal generation is done
N=no, Y=yes. This option enables input %I0.0 to be used as a counting input.
(1) This time base is not advisable for TSX 07s with relay outputs.
(2) The PLS counting option is required when a time base of 0.1 ms is selected. In order for the
PLS to work properly, it is necessary to physically loop output %Q0.0 to input %I0.0. In this type of operation, the %PLS.P must be greater than or equal to 6 (max. freq. =1.6 Khz) to ensure
3/18
Numerical and special instructions 3
Input IN
Number of pulses
Output %Q0.0
Output %PLS.Q
Output %PLS.D
Special cases
• Effect of a cold restart : (%S0=1) sets the value of %PLS.P to that defined during configuration
• Effect of a warm restart : (%S1=1) : no effect
• Effect of a PLC stop : see effect of a PLC stop page 3/17.
• Effect of modifying the preset %PLS.P : modifying the preset value %PLS.P via an instruction or by adjusting it takes effect instantly
• With the time base of 0.1 ms, forcing the loop input %I0.0 does not stop generation.
B
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3/19
B
3.3-5 Fast counting functions, frequency meter and up/down counter %FC
IN
S
%FC
%FC.P
%FC.S0
%FC.S1
%FC block
F
TH0
TH1
The %FC function block can be used to perform one of the three following functions :
• Fast counting
• Frequency meter
• Up/down counting
(see detailed description, Part A,
Section 4.4). The function is selected during configuration.
Note : Fast counting functions can be used without any programming, simply by configuring the I/O and the parameters.
Characteristics of block %FC
The function block offers a group of words, input and output bits which are used to generate the 3 counting functions. To fully understand the role of each object in the function to be performed, refer to the detailed description of the function.
Current value %FC.V
Word incremented or decremented according to the inputs and the function selected.
Can be read and tested but not written.
Preset value %FC.P
Threshold value S0 (1) %FC.S0
Threshold value S1 (1) %FC.S1
Enable input
(or instruction)
Set input
(or instruction)
IN
S
Only used by the up/down counting function :
0
≤
%FC.P
≤
65535. Word can be read, tested and written.
0
≤
%FC.S0
≤
65535 word containing the value of threshold 0, defined during configuration can be read and written by the program.
0
≤
%FC.S1
≤
65535 word containing the value of threshold 1, defined during configuration can be read and written by the program.
At state 1, validates the current function.
At state 0, inhibits the current function.
Overflow output %FC.F
At state 1 :
• sets the current value to the preset value (up/ down counting function) or resets the current value to 0.
• initializes operation of the threshold outputs
(HSC_Out)
• takes into account threshold values %FC.S0
and %FC.S1 modified by the program.
State 1, when the current value %FC.V exceeds
65535. %FC.F can be cleared by a Preset (%I0.1
or S instruction) or a cold restart.
Threshold bit 0 (2)
Threshold bit 1 (2)
%FC.TH0
State 1, when the current value is greater than or equal to the threshold value %FC.S0
%FC.TH1
State 1, when the current value is greater than or equal to the threshold value %FC.S1
(1) Threshold value %FC.S0 must be less than threshold value %FC.S1.
3/20
Numerical and special instructions 3
Fast counting function
The fast counting function counts at a maximum frequency of 10 kHz in fast mode (or
5 kHz in normal mode, selected during configuration), with a range of 1- 65535.
The counter receives the signals to be counted at PLC input %I0.0. The counting value
(current value %FC.V) is compared to 2 thresholds %FC.S0 and %FC.S1, which are defined during configuration and can be modified by the program (modification is taken into account when the Set input is activated).
Fast counter
Diagram :
Counting input %I0.0
&
Counter
Enable inputs %I0.2
IN %FC
Set inputs
(preset to 0)
%I0.1
S %FC
Instruction [READ %FC.V]
Threshold value 0 %FC.S0
Threshold value 1 %FC.S1
1
1
Current value
Comparison
&
%FC.F
%FC.V
Overflow output
Current value
%FC.TH0
%FC.TH1
Threshold bit 0
Threshold bit 1
%Q0.1
Threshold output 0
B
& %Q0.2
Threshold output 1
Enable %SW111:X1
Comment : Apart from counting input %I0.0, all other function block discrete I/O are optional (they can be selected during configuration). The equivalent programming objects and instructions are available for each of these (marked by a box on the diagram).
Threshold outputs : Threshold outputs are controlled directly by the fast counter
(without waiting for the outputs to be updated at the end of the scan) according to the settings established by the user during configuration.
Output
%Q0.1
%Q0.2
FC.V< thres.0<thres.1
0 or 1
0 or 1 thres.0
≤
FC.V
≤ thres.1 thres.0<thres.1<FC.V
0 or 1 0 or 1
0 or 1 0 or 1
When they are initialized the threshold outputs must be enabled by a fast counter preset command. Programming example :
BLK %FC
LD %S0 IN
%FC
S %S0
S
END_BLK
LD %S0
S %SW111:X1 (enable bit %SW111:X
%S0
%SW11:X1
S
3/21
B
Reading the current value
The current %FC.V value is updated at the end of each PLC scan. %FC.V can also be updated by the READ instruction : syntax : [READ %FC.V] Timing diagram
Counter input (%I0.0)
65535
Threshold 1 %FC.S1
Threshold 0 %FC.S0
Current value %FC.V
Enable input
IN or %I0.2
Set input
S or %I0.1 (1)
Overflow
%FC.F
Threshold bit 0
%FC.TH0
Threshold bit 1
%FC.TH1
Threshold output 0
%Q0.1 (2)
Threshold output 1
%Q0.2 (2)
(1) Input %I0.1 operates on a rising edge (see timing diagram), while input S operates on a state.
(2) In this timing diagram the status matrix configured by the user is as follows :
Output
%Q0.1
FC.V< thresh 0<thresh 1 thresh 0
≤
FC.V
≤ thresh 1 thresh0<thresh 1<FC.V
0 1 0
%Q0.2
1 0 0
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3/22
Numerical and special instructions 3
Frequency meter function
The frequency meter function is used to measure the frequency of a periodic signal in Hz on input %I0.0. There is a choice of two modes : fast (10kHz filtering) or normal (5kHz filtering).
The frequency range which can be measured is from 1Hz to 10kHz. The user can choose between 2 time bases, the choice being made by system bit %SW111:X2 (1 = time base of 100 ms, 0 = time base of 1s).
Time base
100ms
1s
Measurement range
100Hz-10kHz
10Hz-10kHz
Precision
0.1% for 10kHz
10% for 100Hz
Update
10 times per second
0.01% for 10kHz Once per second
10% for 10Hz
System bit %SW111:X3 is set to 1 during an update of the current value. The user program must reset the system bit to 0.
Frequency meter
Diagram :
Counter input %I0.0
&
Counter
Enable inputs
(1)
%I0.2
IN %FC
1
Set inputs
(current value to 0)
S %FC
Current
Value
%FC.F
%FC.V
Overflow output
Current value (2)
Select the time base
%SW111:X2
1 s
100 ms
(1) Input %I0.2 is optional, its use is selected during configuration.
(2) Current value FC.V is expressed in Hz.
Note:
This function can also be used to obtain the value of the analog module wired to input
%I0.0 (see part B Section 4: managing analog I/O).
Timing diagram
Counter input (%I0.0)
Enable input
(IN or %I0.2)
Set input (S)
Time base TB
F1 F2 F3
B
3/23
B
Up/down counting function
The up/down counting function counts up or down at a maximum frequency of 1 kHz, with an up/down counting range of 0 to 65535.
The counter receives the signals to be upcounted on PLC input %I0.0, and the signals to be downcounted on PLC input %I0.3. It provides an output indicating the direction of movement : whether the counter is upcounting %SW111:X0 = 1 or downcounting
%SW111:X0 = 0. The up/down counting value (current value %FC.V) is compared with
2 thresholds, %FC.S0 and %FC.S1, which are defined during configuration and can be modified by the program (modification is taken into account when the preset input is activated).
Diagram :
Up/down counter
Upcounter input %I0.0
&
Downcounter input %I0.3
Upcounter %SW111:X0
& downcounter direction of movement
Enable inputs
%I0.2
IN %FC
1
Preset value %FC.P
Preset value
Set inputs
%I0.1
S %FC
%I0.4
Read input
Instruction [READ %FC.V]
Threshold value 0 %FC.S0
Threshold value 1
%FC.S1
1
1
Current value
Comparison
&
%FC.F
Overflow output
Current value
%FC.V
%SW110 Capture value
%FC.TH0
%FC.TH1
Threshold bit 0
Threshold bit 1
%Q0.1
Threshold output 0
& %Q0.2
Threshold output 1
Enable %SW111:X1
Apart from upcounting input %I0.0 and downcounting input %I0.3, all other function block discrete I/O are optional (they can be selected during configuration). The equivalent programming instructions and objects are available for each of these
(marked by a box on the diagram).
Preset : the preset value of 0 to 65535 is defined during configuration and can be modified by the program. The current value is loaded with the preset value on a rising edge at input %I0.1 or at state 1 of input S.
Threshold outputs : see fast counting function
Reading the current value
The value %FC.V is updated automatically at the end of the scan. %FC.V can also be updated by the READ instruction, syntax : [READ %FC.V]
A rising edge on Read input %I0.4 causes the value %FC.V to be copied to %SW110.
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3/24
Numerical and special instructions 3
Upcounter input %I0.0
Downcounter input %I0.3
65535
Threshold 1 %FC.S1
Threshold 0 %FC.S0
Preset value %FC.P
Current value %FC.V
Enable input
IN or %I0.2
Set input
S or %I0.1 (1)
Direction of movement
%SW111:X0
Overflow
%FC.F (2)
Threshold bit 0
%FC.TH0
Threshold bit 1
%FC.TH1
Threshold output %Q0.1 (3)
Threshold output %Q0.2 (3)
(1) Input %I0.1 operates on a rising edge, while input S operates on a state.
(2) The overflow output %FC.F is reset to zero after reinitialization of the counter.
(3) See status matrix for the fast counting function.
B
Important :
If one of the 4 inputs %I0.0, %I0.1, %I0.3, or %I0.4, on a rising or falling edge is at state 1, no action linked to the other 3 will be performed.
___________________________________________________________________________
3/25
B
Special cases (fast counting, frequency meter and up/down counter)
• Effect of a cold restart : (%S0=1) changes the current value, outputs %FC.F,
%FC.TH0, %FC.TH1 and enable bit of the threshold outputs (%SW111:X1) to 0, and copies the values defined during configuration to words %FC.P,%FC.S0/S1.
• Effect of a warm restart : (%S1=1) and PLC stop : has no effect on the current value.
After an activated master control relay instruction MCS, high-speed outputs are set to 0, after deactivation of the MCS, they are only reset after the threshold is crossed in upcounting mode or after an up/down counting action in downcounting mode.
• Displayed %FC values :
For all values related to the %FC function block, values are displayed :
- by the FTX 117 terminal as two's complement numbers (Decimal) or as a direct value
(Hexidecimal).
- by PL7-07 as direct value (Decimal or Hexadecimal).
For example:
%FC.V
Displayed values
(PL7-07) (FTX 117) (PL7-07 - FTX 117)
0
1
2
•
•
•
32766
32767
•
•
32768
•
65533
65534
65535
0
0
1
2
•
•
•
32766
32767
•
•
•
65533
65534
65535
0
0
1
2
•
•
•
32766
32767
•
•
-32768
•
-3
-2
-1
0
0000
0001
0002
•
•
•
7FFE
7FFF
•
•
8000
•
FFFD
FFFE
FFFF
0
___________________________________________________________________________
3/26
Numerical and special instructions 3
Example of the fast counting function
Description of the application
T
Photo-electric cell
M
A-
A+
V
T1
T2
STORE
REJECT
START
B
The parts to be measured are put on a conveyor belt driven continuously without slipping by a motor to which a rotary incremental encoder is attached. The measurement is made by counting the number of pulses during the time cell C detects the moving part. A cylinder V controls the lateral movement of belt T so as to position it opposite conveyor
T1 or conveyor T2, according to the measurement results.
The number of pulses measured is compared to 2 extreme values (length measurement tolerance)
Beam
Pulse
1 part corresponds to
10000 pulses
• If it is between these 2 values, the part is directed towards the
STORE (belt T1, control A+ on cylinder V)
• If this is not the case, the part is directed towards the reject bin
(belt T2, control A- on cylinder
V)
The START pushbutton is used to start the whole operation.
Assigning the I/O
Inputs
• %I0.0 counter input connected to the incremental encoder
• %I0.1 reset input connected to the photoelectric cell
• %I0.2 enable input connected to the start button
Outputs
• %Q0.1 cylinder A+ control output
• %Q0.2 cylinder A- control output
• %Q0.0 belt control output
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3/27
B
Processing the application
The fast counting function can be processed without the need to program the PLC by configuring only the %FC function block.
%FC : counter
Mode : fast
Counting input : %I0.0
Set : %I0.1
Enable input : %I0.2
%FC.S0 : 9950 threshold 0 corresponds to the minimum tolerance level
%FC.S1 : 10000 threshold 1 corresponds to the maximum tolerance level
Output matrix
Output FC.V< thresh 0<thresh 1 thresh 0
≤
FC.V
≤ thresh 1 thresh 0<thresh 1<FC.V
%Q0.1
0 1 0
%Q0.2
1 0 1
Program
%I0.2
%Q0.0
%I0.1
N
%I0.1
P
%I0.2
%SW111:X1
S
%SW111:X1
R
LD
ST
%I0.2
%Q0.0
LDF %I0.1
S %SW111:X1
LDR %I0.1
ORN %I0.2
R %SW111:X1
Operation
Input %I0.0 counts the number of pulses sent from the incremental encoder as soon as the enable input %I0.2 (start button) is activated.
On a rising edge at input %I0.1, the current value of the counter is reset to 0.
When the cell (input %I0.1) detects that there are no more parts on the conveyor belt, outputs %Q0.1 and %Q0.2 are enabled (by bit %SW111:X1) and set to 0 or 1 at this moment depending on the current value of the counter %FC.V (according to the output matrix).
Output %Q0.1 is set to 1 when the part is within tolerance. It controls the output of positioning cylinder A on conveyor belt T1 (see the output matrix).
Output %Q0.2 is set to 1 when the part is outside tolerance (return cylinder A to belt T2).
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Numerical and special instructions 3
3.3-6 Transmitting/Receiving messages and controlling data exchanges
The TSX Nano can communicate with a programming terminal (either the FTX117 or the PL707 software) and with other UNI-TELWAY devices connected to the terminal port. The TSX Nano can also be configured to send and/or receive messages in character mode (ASCII protocol).
PL7 language offers for this :
• EXCH instruction to transmit/receive messages,
• %MSG function block to control the data exchanges.
The TSX Nano determines the protocol according to the pinout of the cable being used, and provides this information to the system bit %S100 (management of /DPT).
An overview of UNI-TELWAY compatible products and configurations appears in Part
F of this manual.
EXCH instruction
The SEND instruction allows the TSX Nano to send and/or receive information to/from
UNI-TELWAY or ASCII devices. The user defines a table of words (%MWi:L or %KWi:L) containing the data to be sent and/or received (up to 64 data words in transmission and/ or reception). The format for the word table is described in the paragraphs about each protocol (ASCII and UNITELWAY).
A message exchange is performed using the EXCH instruction.
Syntax: [EXCH %MWi:L] (1) or [EXCH %KWi:L]
Note: Devices such as XBT or CCX man-machine interfaces, or Inductel identification devices, which support UNI-TELWAY protocol, can send information to, or get information from the TSX
Nano without any special TSX Nano programming.
The TSX Nano must finish the exchange from the first EXCH instruction before a second can be launched. The %MSG block must be used when sending several messages.
(1) L : Number of words in the word table.
Values of the internal word table %MWi:L are such as i+L
≤
255.
B
Note
The PL7-07 V1 software can only be used for transmission, using the SEND instruction for TSX07 V1 and V2.
TSX Nano V3 PLCs authorize transmission and/or reception of messages using the
EXCH instruction (For PL7-07 V1, the EXCH instruction is called SEND).
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B
%MSG function block
The use of the %MSG function block is optional; it can be used to manage data exchanges. The %MSG function block has three purposes:
• Communications error checking
The error checking verifies that the block length (word table) programmed with the
EXCH instruction is large enough to contain the length of the message to be sent
(compare with length programmed in the least significant byte of the first word of the word table). It also verifies that a UNI-TELWAY message was received by the UNI-
TELWAY device.
• Coordination of multiple messages
To ensure the coordination when sending multiple messages, the %MSG function block provides the information required to determine when a previous message is complete.
• Transmission of priority messages
The %MSG function block allows current message transmissions to be stopped, in order to allow the immediate sending of an urgent message.
Exchange control block
R
%MSG
D
The %MSG function block manages exchanges.
Programming it is optional.
%MSG block
E
Characteristics of the %MSG block
Reset input
(or instruction)
Comm. done output
Fault (Error) output
R
%MSG.D
%MSG.E
At state 1, reinitializes communication,
%MSG.E = 0 and %MSG.D = 1
State 1, comm. done if :
• End of transmission if transmission,
• End of reception (end character received),
• Error,
• Reset the block.
State 0, request in progress
State 1 if :
• Bad command,
• Table incorrectly configured
• Incorrect character received (speed, parity, etc)
• Reception table full (not updated)
State 0, message length OK, link OK
If an error occurs when using an EXCH instruction, bits %MSG.D and %MSG.E go to
1 and system word %SW69 contains the error code. See Section 6.2-2.
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Numerical and special instructions 3
Reset input (R): When the Reset input is set to 1, it immediately stops any messages that are being transmitted, resets the Fault (Error) output to 0 and sets the Done bit to 1.
A new message can now be sent.
Fault (Error) output (%MSG.E): The error output is set to 1 either because of a communications programming error or a message transmission error. The error output is set to 1 if the number of bytes defined in the data block associated with the EXCH instruction (word 1, least significant byte) is greater than 128 (80 in hexadecimal).
The error output is also set to 1 if a problem exists in sending a UNI-TELWAY message to a UNI-TELWAY device. In this case, the user should check wiring, and that the destination device supports UNI-TELWAY communication.
Communications Done output (%MSG.D): When the Done output is set to 1, the TSX
Nano is ready to send another message. Use of the %MSG.D bit is recommended when multiple messages are sent. If it is not used, messages may be lost.
Transmission of several successive messages
Execution of the EXCH instruction activates a message block in the application program.
The message is transmitted if the message block is not already active (%MSG.D=1). If several messages are sent in the same cycle, only the first message is transmitted. The user is responsible for managing the transmission of several messages using the program.
Example: Transmission of 2 messages in succession.
%I0.0
%MSG.D
P
%MSG.D %M0
%M0
S
%M0
R
LDR %I0.0
AND %MSG.D
[EXCH %MW2:4]
S %M0
LD %MSG.D
AND %M0
[EXCH %MW8:3]
R %M0
B
Reinitializing exchanges
An exchange is cancelled by activating the input (or instruction) R. This input initializes communication and resets output %MSG.E to 0 and output %MSG.D to 1. It is possible to reinitialize an exchange if a fault is detected.
Example :
%M0
BLK %MSG
LD
R
%M0
END_BLK
%MSG
R D
E
Special cases
• Effect of a cold restart : (%S0=1) forces a reinitialization of the communication.
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3/31
• Effect of a warm restart : (%S1=1) has no effect.
• Effect of a PLC stop : if a message transmission is in progress, the PLC stops its transfer and reinitializes the outputs %MSG.D and %MSG.E.
B
Characteristics of ASCII mode
The ASCII output communications mode is selected by jumpering pins on the terminal port (see Part F for specific information). Status bit %S100 is set to 1 when the TSX Nano is in ASCII mode. It also confirms that, with the necessary jumpers, the cable is connected.
The three possible uses of this instruction are :
• Transmission
• Transmission / Reception
• Reception
The maximum size of the frames transmitted and/or received is 128 bytes.
The word table associated with the EXCH instruction is composed of transmission and reception tables.
Most significant byte
Command
Byte transmitted 1
...
...
Byte transmitted n+1
Byte received 1
...
...
Byte received p+1
Least significant byte
Length LgT / LgR
Byte transmitted 2
...
Byte transmitted n
Byte received 2
...
Byte received p
Control
Transmission table
Reception table
The Length byte (LgT) contains the length to be transmitted, which is overwritten by the number of characters received (LgR) at the end of reception.
The command byte must contain one of the following values :
• 0: Transmission
• 1: Transmission followed by reception
• 2: Reception
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Numerical and special instructions 3
The table can only be type %KWi in the case of transmission.
Reception ends when the end of frame byte is received (1). The value of this byte can be modified by the user (least significant byte of system word %SW68). The default value of this word is H'0D' (carriage return).
(1) Warning :
The system does not manage a reception time-out
B
Sending a message to an ASCII device: Pure transmission
The content of the data block associated with the SEND instruction needed to write data to an ASCII device (such as a display or printer) is as follows:
Most significant byte
0 (transmission)
Least significant byte
Length of message (bytes)
ASCII data
The maximum length of a message is 128 bytes.
Example 1: request to display message "FAULT 10" on a printer using ASCII protocol.
%I0.0
%MSG.D
P
LDR %I0.0
AND %MSG.D
[EXCH %KW10:7]
Word table contents :
Word
%KW10
%KW11
%KW12
%KW13
%KW14
%KW15
%KW16
Contents
12
'DE'
'FA'
'UT'
' 1'
'0 '
16#0A0D
Most significant byte
0
ASCII text
Line return
Least significant byte
Length LgT in bytes
Carriage return
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3/33
B
ASCII Transmission / Reception
At the end of transmission, the TSX Nano switches to wait for reception, then after receiving a response, copies it into the %MWi zone contiguous with the transmission table if the status of the reception is OK and if the length of the question (LgT) and the response (LgR) is less than the %MWi reserved zone (length L). If this is not the case, bit %MSG.E changes to 1.
Reception is ended when the end code is detected (H'0D' by default but may be modified in %SW68) or when the reception table is full.
There is no reception time-out management.
Note
TSX Nano V1 or V2 cannot receive ASCII messages.
The contents of the word table associated with the EXCH instruction necessary for transmission / reception of ASCII data is described below : m
Most significant byte
1 (transmission / reception)
Byte to be transmitted 1
...
...
Byte to be transmitted n+1
Byte received 1
...
...
Byte received p+1
Notes
%KWi type words are prohibited.
Least significant byte
Length LgT or LgR
Byte to be transmitted 2
...
Byte to be transmitted n
Byte received 2
...
Byte received p
End code (H'0D')
Control
Transmission table
Reception table
When the exchange is finished (end of frame character received), the transmission length byte (LgT) contains the number of characters received (LgR).
The transmission length byte must therefore be updated before each exchange.
The message reception zone is aligned to the word following the transmission zone.
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Numerical and special instructions 3
Example:
Words
%MW10
%MW11
%MW12
%MW13
%MW14
Associated program:
LDR %I0.0
AND %MSG.D
[EXCH %MW10:9]
Most signif.
Least signif.
16#0001 16#0007
'V'
'L'
'A'
'U'
'E'
':'
' ' not used
%I0.0 %MSG.D
P EXCH %MW10:9
This program transmits the following frame: VALUE : 7 bytes and waits to receive a response (8 bytes maximum).
The characters received are accessible in the words %MW15 to %MW18.
Calculation of the length of the word table
LgT = 7
LgR = 8
L = 1 + LgT + LgT%2 + LgR + LgR%2 = 9
2 2
Note
TSX 07 2
● ●●●●
Nano-PLCs cannot receive ASCII messages.
B
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3/35
B
Receiving a message from an ASCII device
On execution of the EXCH block, which has been set for reception, the TSX Nano switches to wait for reception, then copies the response into the %MWi zone if the status of the reception is OK and if the length of the response (LgR) is less than the %MWi reserved zone (length L). If this is not the case, bit %MSG.E is set to 1.
Reception is ended when the end code is detected (16#0D by default but may be modified in %SW68) or when the reception table is full.
There is no reception time-out management.
Note
The TSX Nano V1 or V2 cannot receive an ASCII message.
The contents of the word table associated with the EXCH instruction necessary for receiving ASCII data is described below :
Most significant byte
2 (reception)
Byte received 1
...
...
Byte received p+1
Least significant byte
0 (1)
Byte received 2
...
Byte received p
End code (H'0D')
Control
Reception table
Note
%KWi type words are prohibited.
The communication type is managed in the first word of the table.
(1) In reception mode, this least significant byte is not taken into account.
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Numerical and special instructions 3
Exchange control
Exchange control is performed using the %MSG function block and system word
%SW69.
After each exchange, %SW69 (report of EXCH block) is updated and takes one of the following values:
• 0: Exchange OK.
• 1: Transmission table too large (LgT>128).
• 2: Transmission table too small (LgT=0).
• 3: Word table too small (1).
• 7: Bad ASCII command (command byte <> 0, 1 or 2).
• 8: Not used
• 9: Reception error (problem with communication format (speed, parity)).
• 10: %KWi table prohibited in reception or transmission / reception.
(1) L < 1 + LgT + LgT%2 + LgR + LgR%2
2 2
where L in words
LgT and LgR in bytes
B
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3/37
B
Dialog with a UNI-TELWAY device
The word table associated with the EXCH instruction used to send a request to a UNI-
TELWAY device such as ATV speed controllers or man-machine interface devices
(CCX 17 or XBT) is made up of transmission and reception tables.
Most significant byte
Target address
Category code
First word (MSB)
...
Word n-1 (MSB)
Word n (MSB)
00 (forced)
Data received 2
...
Data received p-1
Least significant byte
Length LgT / LgR (bytes)
Request code
First word (LSB)
...
Word n-1 (LSB)
Word n (LSB)
Response code received
Data received 1
...
...
Data received p
Control
Transmission table
Reception table
The maximum size of the messages transmitted and received is 128 bytes.
The message reception zone is always aligned on the word following the transmission zone.
The EXCH block reads the length to be transmitted (LgT) in the transmission length field.
When the exchange has finished, it writes the length of the message received there (LgR).
The transmission length byte must therefore be updated before each transmission.
The response code received is written in the least significant byte of the first word of the reception table. The most significant byte of this word is forced to 0. The following data, if there is any, is aligned on the next word.
Important
From TSX Nano V3, the order for transmitting data from a UNI-TE request becomes
Most Significant byte then Least Significant byte.
Applications operating with TSX Nano V1 or V2 must be modified to take account of this inversion if they are loaded onto a TSX Nano V3.
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Numerical and special instructions 3
Unitelway Master
In this mode, the TSX Nano normally manages two devices distributed over 5 slave addresses. It is possible to control 2 devices and a PL7 07 programming terminal, if the programming terminal is configured on a single address.
The TSX Nano does not manage slave to slave routing.
The TSX Nano Master can transmit a request to any slave address from 1 to 5, using the EXCH block. It uses the source address 0.254.16.
The target address coded in the word table associated with the EXCH block must be one of the following:
• 0: Transmission of a request to slave 4 (compatible with TSX07 2.).
• 1 to 5: Transmission and reception of a request to a slave with address 1 to 5.
If the target address is 0, the characteristics of the EXCH block are as follows:
• The reception buffer is not used,
• The table can be situated in zone %KWi,
• Bit %MSG.D changes to 1 when the response from the slave is received,
• The response from the slave is ignored.
• Only Write and non-solicited Data requests can be used.
If the target address is between 1 and 5:
• The reception table is obligatory (1 word minimum),
• The word table must be situated in zone %MWi,
• Bit %MSG.D changes to 1 when the response from the slave is received,
• The response from the slave is copied into the reception table.
Example of use:
Transmission of the request "Read word" %MW513 (16#0201) to a device at address
2:
Words
%MW10
%MW11
%MW12
Most signif.
Least signif.
02 04
07
02
04
01
Associated program:
LDR %I0.0
AND %MSG.D
[EXCH %MW10:5]
%I0.0 %MSG.D
P EXCH %MW10:5
B
The EXCH block uses %MWi:L as parameters:
• i indicates the number of the first word in the table
• L indicates the number of words in the word table.
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3/39
When bit %MSG.D = 1 and bit %MSG.E = 0, the table contains the following data:
B
Words
%MW10
%MW11
%MW12
%MW13
%MW14
Most signif.
Least signif.
02
07
04
04
02
00
'AB'
01
34
'CD'
The data in bold signifies :
• 4 bytes received,
• response code received = 16#0034,
• value of word %MW513 = 16#ABCD.
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Numerical and special instructions 3
Unitelway Slave
Any device (local or remote) can question the system server from the TSX Nano Slave using Ad0 (server) as a target address.
A TSX Nano slave can transmit (client) a request to any Master or Slave device (address
0 to 98) using the EXCH block (when the master is a TSX 37/57 PLC).
The target address coded in the word table associated with the EXCH block must be between 100 and 198 (when the master is a TSX 47/67/87/107 PLC).
The characteristics of the EXCH block are as follows:
• The reception table is obligatory (1 word minimum),
• The word table must be situated in zone %MWi,
• Bit %MSG.D changes to 1 when the response from the slave is received,
• The response is copied into the reception table.
B
Example of use:
Transmission of the request "Read word" %MW513 to the Master:
Words
%MW10
%MW11
%MW12
Most signif.
Least signif.
00
07
02
04
04
01
Associated program:
LDR %I0.0
AND %MSG.D
[EXCH %MW10:5]
The EXCH block uses %MWi:L as parameters:
• i indicates the number of the first word in the table
• L indicates the number of words in the word table.
When bit %MSG.D = 1 and bit %MSG.E = 0, the table contains the following data:
Words
%MW10
%MW11
%MW12
%MW13
%MW14
Most signif.
Least signif.
00
07
04
04
02
00
'AB'
01
34
'CD'
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3/41
B
The data in bold signifies :
• 4 bytes received,
• response code received = 16#0034,
• value of word %MW513 = 16#ABCD.
Other example:
Transmission of the request "Read word" %MW513 to slave 32:
Words
%MW10
%MW11
%MW12
Most signif.
Least signif.
20 04
07
02
04
01
Associated program:
LDR %I0.0
AND %MSG.D
[EXCH %MW10:5]
The EXCH block uses %MWi:L as parameters:
• i indicates the number of the first word in the table
• L indicates the number of words in the word table.
When bit %MSG.D = 1 and bit %MSG.E = 0, the table contains the following data:
Words
%MW10
%MW11
%MW12
%MW13
%MW14
Most signif.
Least signif.
20 04
07
02
00
'AB'
04
01
34
'CD'
The data in bold signifies :
• 4 bytes received,
• response code received = 16#0034,
• value of word %MW513 = 16#ABCD.
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Numerical and special instructions 3
Exchange control
Exchange control is performed using the %MSG function block and system word
%SW69.
Bit %MSG.D is set to 1 in the following cases:
• When the response has been received.
• If there is a transmission error (negative acknowledgment)
• If the block is re-initialized.
• If the response does not arrive within 7 seconds (application time-out).
Bit %MSG.D changes to 1 for any other errors (detailed in word %SW69):
B
After each exchange, word %SW69 (report of EXCH block) is updated and takes one of the following values:
• 0: Exchange OK.
• 1: Transmission table too large (LgT>128).
• 2: Transmission table too small (LgT=0).
• 3: Word table too small (1).
• 4: Incorrect Unitelway address (target address does not belong to [0...98] or [100...198] in UNI-TELWAY Slave mode or to [1...5] in UNI-TELWAY Master.
• 5: Time-out expired.
• 6: Transmission error (target responds with Nack).
• 7: Bad ASCII command (command byte <> 0, 1 or 2).
• 8: Not used
• 9: Reception error (problem with communication format (speed, parity)).
• 10: %KWi table prohibited in reception or transmission / reception.
(1) L < 1 + LgT + LgT%2 + LgR + LgR%2
2 2
where L in words
LgT and LgR in bytes
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3/43
B
3.3-7 Shift bit register function blocks %SBRi
R
%SBRi
A shift bit register is used to enter binary data (0 or 1) and to move them in one direction or the other.
CU
CD
Shift register block
Characteristics
Register number
Register bit
Reset input
(or instruction)
Shift to left input (or instruction)
Shift to right input (or instruction)
%SBRi
%SBRi.j
R
CU
CD
0 to 7
Bits 0 to 15 (j=0 to 15) of the shift register can be tested by a test instruction and written by an assignment instruction.
On a rising edge, set register bits 0 to 15
%SBRi.j to 0.
On a rising edge, shift a register bit to the left.
On a rising edge, shift a register bit to the right.
Operation
Initial state
CU %SBRi performs a shift to the left
1 1 0 0 0 0 0 0 1 1 0 1 1 1 0 0
Bit 15 Bit 0
Bit 15 is lost
∇ ∇ ∇ ∇ ∇
1 0 0 0 0 0 0 1 1 0 1 1 1 0 0 0
Bit 15 Bit 0
This is also true of a request to shift a bit to the right (bit 15 to bit 0) using instruction CD.
Bit 0 is lost.
If a 16-bit register is not adequate, it is possible, using the program, to cascade several registers.
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Numerical and special instructions 3
Programming
Example : Shift a bit to the left every second : bit 0 assumes the opposite state to bit 15.
%SBR0.15
%SBR0.0
Reversible programming
LDN %SBR0.15
ST %SBR0.0
BLK %SBR0
LD
CU
%S6
END_BLK
%S6
R
%SBR0
CU
CD
Non-reversible programming
LDN %SBR0.15
ST
LD
%SBR0.0
%S6
CU %SBR0
B
Special cases
• Effect of a cold restart : (%S0=1)
- sets all the bits of the register word to 0
• Effect of a warm restart : (%S1=1) has no effect on the bits of the register word.
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3/45
B
3.3-8 Step counter function blocks %SCi
R
%SCi
CU
A step counter is a series of steps to which actions can be assigned. Moving from one step to another depends on external or internal events. Each time that a step is active, the associated bit is set to 1. Only one step of a step counter can be active at a time.
CD
Step counter function block
Characteristics
Step counter number
Step counter bit
%SCi
%SCi.j
Reset input
(or instruction)
Increment input
(or instruction)
Decrement input
(or instruction)
Operation
CU input
CD input
N
°
inactive 0 1
R
CU
CD
2
0 to 7
Step counter bits 0 to 255 (j=0 to 255) can be tested by an LD logical operation and written by an assignment instruction.
On a rising edge, resets the step counter.
On a rising edge, increments the step counter by one step.
On a rising edge, decrements the step counter by one step.
3 2 1 0
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Numerical and special instructions 3
Programming
Example : To program the step counter 0 incremented by input %I0.2. It is reset to 0 by input %I0.3 or when it arrives at step 3.
Step 0 controls output %Q0.1, step 1 controls output %Q0.2 and step 2 controls output
%Q0.3.
Reversible programming
%SC0.3
%I0.3
%I0.2
R
CU
CD
%SC0
ST
LD
ST
LD
ST
BLK %SC0
LD %SC0.3
OR %I0.3
R
LD %I0.2
CU
END_BLK
LD %SC0.0
%Q0.1
%SC0.1
%Q0.2
%SC0.2
%Q0.3
%SC0.0
%Q0.1
Non-reversible programming
%SC0.1
%SC0.2
%Q0.2
%Q0.3
LD %SC0.3
OR %I0.3
R
LD
%SC0
%I0.2
CU %SC0
LD %SC0.0
ST
LD
%Q0.1
%SC0.1
ST
LD
ST
%Q0.2
%SC0.2
%Q0.3
B
Special cases
• Effect of a cold restart : (%S0=1)
- initializes the step counter
• Effect of a warm restart : (%S1=1) has no effect on the step counter.
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3/47
B
3.4
Communication between PLCs
Words %IW and %QW are used to exchange data between PLCs. The diagram below illustrates the exchange words for each PLC.
Base
PLC
2
1
3 4 5
6
0
7
Peer
PLC #2
2
1
3 4 5
6
0
7
Peer
PLC #3
2
1
3 4 5
6
0
7
Peer
PLC #4
2
1
3 4 5
6
0
7
%IW2.0
%IW2.1
%QW2.0
%QW2.1
%IW3.0
%IW3.1
%QW3.0
%QW3.1
%IW4.0
%IW4.1
%QW4.0
%QW4.1
%QW0.0
%QW0.1
%IW0.0
%IW0.1
%QW0.0
%QW0.1
%IW0.0
%IW0.1
%QW0.0
%QW0.1
%IW0.0
%IW0.1
These exchange words are updated automatically when the PLCs are in RUN mode.
The user program for each PLC is limited to :
• Writing to output words %QWi.j
• Reading input words %IWi.j
The update cycle for %IW/%QW words is synchronized with the PLC scan. System bit
%S70 is set to 1 when a complete update cycle has taken place. It is reset to 0 by the program or the terminal.
Bits %S71 / %S72 and word %SW71 are also used to control data exchanges (see
Section 5).
Note : Each PLC address is defined according to the position of the selector switch located on the PLC front panel, and this position is taken into account on every power-up.
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3/48
Numerical and special instructions 3
Example 1 : The base PLC transmits data to peer PLC #2 indicating the end of production (bit %M0=1). Once it has received this data, the peer PLC starts a materials handling machine by activating output %Q0.0.
%M0
%IW0.0:X0
%QW2.0:X0
%Q0.0
Base PLC programming
LD
ST
%M0
%QW2.0:X0
Peer PLC programming
LD
ST
%IW0.0:X0
%Q0.0
B
Example 2 :
The base PLC transmits the current value of the counter 0 to peer PLC #4. When this current value is higher than the threshold contained in word %MW0, the peer PLC stops a machine by deactivating output %Q0.1.
%QW4.0:=%C0.V
Base PLC programming
LD 1
[%QW4.0:=%C0.V]
Peer PLC programming
%Q0.1
%IW0.0>%MW0
LD [%IW0.0>%MW0]
STN %Q0.1
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3/49
B
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3/50
4
4 Managing analog I/O
4.1
Presentation
V3 PLCs can be used to manage analog input or output modules.
• Input module: these modules perform a voltage/frequency conversion which requires the use of input %I0.0 in frequency meter mode on the
PLC. A single input module can be connected by the PLC. The module is managed from the application program via system words %SW100 and %SW101.
• Output module: these modules perform a PWM/voltage conversion, by integrating the signal sent to output %Q0.0 of the PLC (pulse width modulation).
A single module can be connected by the PLC. The module is managed from the application program via system words %SW102 and %SW103.
B
4.2
Analog input modules
4.2-1 Configuring analog inputs
Using input %I0.0 to connect the analog input module requires the following parameter settings:
• Fast counter type:
• Max. frequency : to be set to Frequency to use the input in frequency meter mode to be set to 10 KHz
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4/1
B
4.2-2 Programming analog inputs
The input module is programmed using the two system words %SW100 and %SW101 and by enabling the fast counter %FC (see example in section 4.2-4).
• %SW100 : analog input functions command word
• %SW101 : acquired value of analog input
The operating mode is selected by writing, via the program, word %SW100 and the acquired value of the analog input can be read in word %SW101.
These two words are reset to zero by the system on a cold restart.
Depending on the choice of operating mode, the system offers a scaling function. This scaling is within a range of 0 to +10 000 for unipolar modules (4/20mA and 0/10V input modules) and -10 000 to +10 000 for bipolar modules (-10/+10V).
%SW100 Operation
0 Disable analog input function on %I0.0
1 Operate without scaling
Value range of %SW101
0
2
3
4
5
Scale for unipolar range
(4/20mA, 0/10V)
Scale for bipolar range
(-10/+10V)
Scale for unipolar range
(4/20mA, 0/10V)
Scale for bipolar range
(-10/+10V)
0...1 000
Period of measurement 125 ms
0...10 000
Period of measurement 125 ms
-10 000 ... +10 000
Period of measurement 125 ms
0...10 000
Period of measurement 500 ms
-10 000 ... +10 000
Period of measurement 500 ms
The raw or scaled analog value is available in %SW101 if %SW100 is written with a value of 1 to 5. The validity of this measurement can be checked using system bit %SW111:X3
(set to 1 by the system if the measurement is valid).
If system bit %SW111:X3 is set to zero by the application, an analog acquisition function is launched, measurement acquisitions continue to be made when the PLC is in STOP.
The raw frequency measurement remains available in word %FC,V associated with input %I0.0 but it is a measurement which is a function of the measurement period (eg: the full scale 8KHz will give 1000 for 125ms and 4000 for 500ms). It is therefore recommended, to simplify the application program, that system word %SW101 is used by preference.
Note
The period of measurement can be modified during operation by rewriting word
%SW100 but this mode of use is not recommended because the first measurement after the change in period may be wrong.
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4/2
Managing analog I/O 4
Using analog input modules on V2 PLCs
It is possible to use analog input modules on TSX 07 2 iii
V2 PLCs, according to the following rules:
• use of input %I0.0 as frequency meter (enabling of operation by instruction IN %FC)
• configuration of the measurement period by the application writing bit %SW111:X2.
%SW111:X2=0 measurement every second (default)
%SW111:X2=1 measurement every 100 ms
• the image of the analog input value is available in object %FC,V; the value is interpreted in the following way:
Range
0/10V
4/20 mA
-10/+10V
Formula
U(V) = 1.25 x (%FC,V x 10 -3 )
I(mA) =2 x [(%FC,V x 10 -3 ) + 2]
U(V) = 2.5 x [(%FC,V x 10 -3 ) - 4]
B
Note
In the case of a 4/20 mA module, the frequency is zero between 0 and 4 mA.
4.2-3 Response time of analog inputs
The response time IRT in acquiring an analog input, between the actual variation of the electrical value at the module terminals and the correspondence in word %SW101 of the measured value, depends essentially on the measurement period selected (125/500 ms) and less so on the PLC scan time. The variation of the electrical value has a negligible effect on the response time.
• For acquisition at a period of 125 ms: IRT is less than 500 ms.
• For acquisition at a period of 500 ms: IRT is less than 1.2 s.
Note
A change in the operating mode (changing %SW100) is taken into account by the system on each scan or immediately on a rising edge of "IN %FC". The measurements are linked in realtime one after another at the chosen period (125 ms or 500 ms). The result of the last measurement taken is transmitted at the beginning of the PLC scan to %SW101. The value of this word does not change during the PLC scan.
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4/3
B
4.2-4 Example of analog input programming
(* ENABLE ANALOG INPUT FUNCTIONS *)
LD 1 (* ANA INPUT MODE 0..1000 ON 125 MS *)
[%SW100 := 1] (* SELECTED MODE TAKEN INTO ACCOUNT *)
BLK %FC
LD 1
IN
END_BLK
(* ACQUISITION OF MEASUREMENT*)
LD %SW111:X3
[%MW1 := %SW101]
R %SW111:X3
S %M1
(* MEASUREMENT VALID *)
(* MEMO MEASUREMENT *)
(* MEASUREMENT ACKNOWLEDGED*)
(* MEASUREMENT INDEX VALID *)
(* USE OF THE MEASUREMENT, DEPENDING ON THE APPLICATION *)
LD %M1
...
%SW100:=1
%SW111:X3
S
%FC
IN
%M1
%MW1:=%SW101
%SW111:X3
R
%M1
S
4.2-5 Characteristics of analog inputs
Type Input value
4/20mA 4mA
12mA
20mA
0/10V 0V
10V
-10/+10V -10V
+10V
%SW101 value Resolution (1) %SW101 value Resolution (1) period 125ms /increment period 500ms /increment
0
5000
10000
16
µ
A/10 lsb 0
5000
10000
4
µ
A/2.5 lsb
0
10000
10mV/10 lsb 0
10000
2.5mV/2.5 lsb
-10000
10000
20mV/10 lsb -10000
10000
5mV/2.5 lsb
The values of %SW101 are given for the operating mode with scaling.
(1) Resolution: Minimum value of the input variation to obtain a measurement variation. The measurement variation varies in "steps" called increments.
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4/4
Managing analog I/O
4
4.3
Analog output modules
4.3-1 Configuring analog outputs
Using output %Q0.0 to connect the analog output requires the following parameter settings: B
• %PLS%PWM configured: to be set to PWM to use the output for generating the pulse width modulation signal.
• Time base :
• Preset : to be set to 0.1 ms.
not used in this operating mode.
4.3-2 Programming analog outputs
The output module is programmed using the two system words %SW102 and %SW103 and by enabling output %PWM (see example in Section 4.3-4).
• %SW102 : analog output functions command/status word
• %SW103 : value of analog output to be generated
The operating mode is selected by writing, by the application program, word %SW102 and the value of the analog output to be generated must be written in word %SW103.
These two words are reset to zero by the system on a cold restart.
Depending on the choice of operating mode, the system offers a scaling function. This scaling is within a range of 0 to +10 000 for unipolar modules (4/20mA and 0/10V input modules) and -10 000 to +10 000 for bipolar modules (-10/+10V).
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4/5
B
%SW102 Operation
0 Disable analog output function on %Q0.0
1 Operate without scaling
2
3
Scale for unipolar range
(4/20mA, 0/10V)
Scale for bipolar range
(-10/+10V)
Value range of %SW103
Not used
5...249
0...10 000
-10 000 ... +10 000
The effective resolution of the analog outputs is 245 points.
If the value written in %SW103 is less than the minimum value (eg: less than 0 in unipolar mode), the minimum value in the range will be applied to the output module.
If the value written in %SW103 is greater than the maximum value (eg: greater than
10000 in unipolar mode), the maximum value in the range will be applied to the output module.
These two types of programming error are not indicated to the application.
Important
In the fallback conditions of discrete outputs, the PWM is no longer generated and a signal is no longer sent to the output modules.
From this, the bipolar modules take their lowest value ( -10V).
This fallback mode must be taken into account by the user.
4.3-3 Response time of analog outputs
The response time ORT of an analog output, between writing the setpoint in word
%SW103 and reaching the voltage (and/or current) corresponding to the module terminals, depends on the amplitude of the variation and the PLC scan time.
• For a full scale variation, ORT is less than 500 ms.
The shorter the PLC scan time and the lower the setpoint variation, the shorter the response time will be. For a scan time of 10 ms and a variation of1/10th of the full scale, this response time will go down to approximately 50 ms.
Note
A change in the operating mode (changing %SW102) is taken into account on a rising edge of input
IN of the PWM (execution of the instruction "IN %PWM") or if setpoint %SW103 is changed. A change of setpoint (%SW103) is taken into account by the system on each scan and becomes effective from the next application program scan (Max. delay of 3ms).
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4/6
Managing analog I/O 4
4.3-4 Example of analog output programming
(* ENABLE ANALOG OUTPUT FUNCTION *)
LD 1
[%SW102 := 1]
IN %PWM
(* ANA OUTPUT RAW MODE 5..249 *)
(* MODE TAKEN INTO ACCOUNT *)
(* GENERATION OF SETPOINT IN PWM *)
....
LD 1
(* SETP. CALC. DEPENDING ON APPLICATION *)
[%SW103 := %MW0] (* APPLICATION OUTPUT SETPOINT *)
%SW102:=1
%PWM
IN
S
. . . . . . . . . .
%SW103:=%MW0
B
4.3-5 Characteristics of analog outputs
Type
4/20mA
0/10V
-10/+10V
Value %SW103 value Resolution to be generated to be written by output module at output application program
4mA
12mA
20mA
0
5000
10000
65
µ
A
40mV 0V
5V
10V
-10V
0V
+10V
0
5000
10000
-10000
0
10000
81mV lsb resolution (1)
%SW103
40
40
81
Values of %SW103 are given for the operating mode with scaling.
(1) LSB resolution: Minimum variation to be applied to %SW103 to obtain a variation of the output module equal to its resolution.
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4/7
B
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4/8
5 Clock functions
5.1
Introduction
TSX Nano PLCs (16 and 24 I/O) have a time-of-day clock which is used by the schedule blocks. The time-of-day clock also provides a utility for the program to time-stamp
events and measure duration.
The TSX Nano schedule blocks and the time-of-day clock can be accessed from the TSX
PLC operations menu. Additionally, the time-of-day clock can be set by the program.They
continue to operate for up to 30 days when the PLC is switched off if the battery has been charged for at least 6 consecutive hours before the PLC is switched off.
The time-of-day clock has a 24-hour format and takes leap years into account.
5.2
Schedule blocks
The schedule block is used to control actions at a particular predefined time.
A maximum of 16 schedule blocks can be used, each one performing this function.
These blocks do not require any program entry. They can be configured (see operating modes, Part C).
B
5.2-1
Schedule block number
Output
Characteristics
RTC : n n=0 to 15
Start date
End date
Day
Start hour
End hour
Q :
DD:MMM
DD:MMM
Output assignment is activated by schedule block : %Mi or %Qj.k.
This output is set to 1 when the current date and time are between the setting of the start of the active period and the setting of the end of the active period.
Shows the day from 1 to 31 and the month Jan to Dec of the start of activation of schedule block.
Shows the day from 1 to 31 and the month Jan to Dec of the end of activation of schedule block.
MTWTFSS Shows the days of activation in the week
(M : Monday to S : Sunday) hh:mm hh:mm
Shows in hours (0 to 23) and minutes (0 to 59) the start of activation of schedule block.
Shows in hours (0 to 23) and minutes (0 to 59) the end of activation of schedule block.
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5/1
B
The bits of system word %SW114 enable (bit set to 1) or disable (bit set to 0) the operation of each of the function blocks.
%SW114
Schedule block #15 Schedule block #0
By default (or after a cold restart) all bits of this system word are set to 1. Use of these
bits by the program is optional.
Comments :
• If the same output (%Mi or %Qj.k) is assigned by several blocks, it is the "OR" of the results of each of the blocks which is finally assigned to this object (which means it is possible to have several "operating ranges" for the same output).
Example : Configuration of a schedule block, for summer month spray program.
• RTC 6 : schedule block #6
• Q : %Q0.2 : output activated by the schedule block
• 21 -Jun -> 21-Sep : period of activation
• M•W•F•• : activation days (Monday, Wednesday and Friday)
• 21 : 00 - 22 : 00 : scheduled activation period
RTC:6 Q: %Q0.2
21-Jun --> 21-Sep
M•W•F••
21 : 00 - 22 : 00
%I0.1
%SW114:X6
LD %I0.1
ST %SW114:X6
%I0.1
%Q0.2
21 June
M W F M W F M W F
In this example the user can disable the schedule block using a switch or a humidity detector wired to input %I0.1.
Note:
It is important to check the state of bit %S51 which shows any schedule block errors.
5.2-2 Time dating by program
Date and time are both available in system words %SW50 to %SW53 (see Section 5.2).
It is therefore possible to perform time and date stamping by the PLC program by making arithmetic comparisons between the current date and time and the immediate values or words %MWi (or %KWi) which can contain setpoints.
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5/2
Clock functions 5
5.3
Time/date stamping
System words %SW50 to %SW53 (see Section 6.2) contain the current date and time in BCD format, which is useful for display on or transmission to a peripheral device.
These system words can be used to store the date and time of an event.
To date an event it is sufficient to use assignment operations, to transfer the contents of system words to internal words and then process these internal words (for example, transmission to display unit by EXCH instruction).
Example :
B
%I0.1
P %MW12:4:=%SW50:4
...
LDR %I0.1
[%MW12:4 :=%SW50:4]
...
Once an event is detected, the word table contains :
Coding : Most significant Least significant Example : byte
%MW12 Second
%MW13 Hour
%MW14 Month
%MW15 Century byte
Day of the week (1)
Minute
Day
Year
In hex
3000
1340
0419
1994
Monday 19 April 1994
13H, 40min, 30s
30s, 0=Monday
13H, 40min
4=April, 19
1994
(1) Where 0=Monday, 1=Tuesday, 2=Wednesday, 3=Thursday, 4=Friday, 5=Saturday,
6=Sunday
Reading the date and time of the last stop using system words
System words %SW54 to %SW57 (see Section 5.2) contain the date and time of the last stop, and word %SW58 contains the code showing the cause of the last stop, in BCD format.
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5/3
B
5.4
Setting the date and time
5.4-1 Setting the date and time using the terminal
When the programming terminal is in TSX (online) mode, the date and time can be updated quickly and easily (see operating modes, Part C).
5.4-2 Updating date and time using system words
System words offer 2 other possibilities for updating the date and time :
Updating using system words %SW50 to %SW53
(see Section 6.2)
For this, bit %S50 must be set to 1. This bit :
• cancels the update of words %SW50 to %SW53 via the internal clock
• transmits the values written in words %SW50 to %SW53 to the internal clock.
%S50 %S50
R
%I0.1
P [%SW50:=%MW10]
[%SW51:=%MW11]
LD
R
%S50
%S50
LDR %I0.1
[%SW50:=%MW10]
[%SW51:=%MW11]
[%SW52:=%MW12]
[%SW53:=%MW13]
S %S50
[%SW52:=%MW12]
[%SW53:=%MW13]
%S50
S
Words %MW10 to %MW13 will contain the new date and time in BCD format and will correspond to the coding of words %SW50 to 53.
The word table must contain the new date and time.
Coding : Most significant Least significant Example : Monday 19 April 1994 byte byte Hex 13H 40min 30s
%MW10 Second
%MW11 Hour
Day of the week (1)
Minute
3000
1340
30s, 0=Monday
13H, 40min
%MW12 Month
%MW13 Century
Day
Year
0419
1994
4=April, 19
1994
(1) Where 0=Monday, 1=Tuesday, 2=Wednesday, 3=Thursday, 4=Friday, 5=Saturday,
6=Sunday
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5/4
Clock functions 5
Updating using system word %SW59
Another method of updating is to use enable bit %S59 and adjustment word %SW59.
Setting bit %S59 to 1 enables adjustment of the current date and time by word %SW59.
Word %SW59 is described in Section 5.2. It increments or decrements each of the date and time components on a rising edge.
Example : A front panel is created in order to modify the hour, minutes and seconds of the internal clock.
+ -
Hours
Minutes
Seconds
B
%M0
%I0.2
%I0.2
%I0.3
%I0.3
%I0.4
%I0.4
%I0.0
P
%I0.1
P
%I0.0
P
%I0.1
P
%I0.0
P
%I0.1
P
%S59
%SW59:X3
%SW59:X11
%SW59:X2
%SW59:X10
%SW59:X1
%SW59:X9
LD
ST
%M0
%S59
LD %I0.2
ANDR %I0.0
ST
LD
%SW59:X3
%I0.2
ANDR %I0.1
ST
LD
%SW59:X11
%I0.3
ANDR %I0.0
ST %SW59:X2
LD %I0.3
ANDR %I0.1
ST
LD
%SW59:X10
%I0.4
ANDR %I0.0
ST %SW59:X1
LD %I0.4
ANDR %I0.1
ST %SW59:X9
(hour)
(minute)
(second)
• Inputs %I0.2, %I0.3 and %I0.4 are controlled by the Hours/Minutes/Seconds switch.
• Incrementation is performed by input %I0.0, pushbutton +.
• Decrementation is performed by input %I0.1, pushbutton -.
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5/5
B
___________________________________________________________________________
5/6
6
6 Role of system bits and words
6.1
System bits
6.1-1 List of system bits
Bit
%S0
%S1
%S4, %S5
%S6, %S7
%S8
%S9
%S10
%S11
%S13
%S17
%S18
%S19
%S20
%S21
%S22
%S23
%S49
%S50
%S51
%S59
%S69
%S70
%S71
%S72
%S100
Function
1 = cold restart (power return with loss of data)
1 = warm restart (power return without loss of data)
Time base 10ms, 100ms
Time base 1s, 1min
0 = outputs saved when the PLC stops
1 = PLC outputs reset to zero if the
PLC is running
0 = I/O fault
1 = watchdog overflow
1 = first scan after setting to RUN
1 = overflow of an unsigned arithmetic operation or rotate shift
1 = arithmetic overflow or error
1 = scan period overshoot
1 = index overflow
1 = Grafcet initialization : sets the steps to 0 and the initial steps to 1
1 = reset Grafcet to zero
1 = enable Grafcet presetting.
If held at 1, Grafcet freezes
1 = request to reset every 10s transistor outputs which have been tripped by overcurrent or short-circuit
1 = set schedule block (RTC)
1 = schedule block not initialized or error
0 = schedule block are set
1 = adjust current date
1 = display internal bits
1 = update exchange words %IW/OW on extension. Process Modbus request
1 = exchange via extension link
0 = scanning of peer PLCs
State of /DPT
-
-
-
Init state
0
0
1
0
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
-
0
0
Control
S or U->S
S or U->S
S
S
U
U
S
S
S
S->U
S->U
S->U
S->U
U->S
U->S
U->S
U->S
U
S
U
U
S
S
U
S
%S118
%S119
1 = base PLC fault
1 = peer PLC fault
0
0
S
S
S = controlled by the system, U = controlled by the user, U->S = set to 1 by the user, reset to 0 by the system, S->U = set to 1 by the system, reset to 0 by the user.
6/1
B
B
6.1-2 Detailed description of system bits
TSX 07 PLCs have system bits %Si which indicate the status of the PLC or enable the user to intervene in its operation.
These bits can be tested in the user program in order to detect any operating event which requires special processing. Some of them must be reset to their initial or normal state by the program. However, the system bits which have been reset to their initial or normal state by the system must not be reset by the program or the terminal.
System Function Description bits
%S0 Cold restart
Normally at 0. It is set to 1 by :
• A power return with loss of data (battery fault)
• The user program
• The terminal (in the Data editor).
This bit is set to 1 during the first complete scan. It is reset to 0 before the next scan.
For operating information : see Part A, Section 7.1.
%S1 Warm restart
Normally at 0. It is reset to 1 by :
• A power return with saving of data
• The user program
• The terminal (in the Data editor).
It is reset to 0 by the system at the end of the first complete scan and before updating of the outputs.
For operating information : see Part A, Section 7.1.
%S4
%S5
%S6
%S7
Time bases
10ms
100ms
1s
1min
Changes in the status of these bits are controlled by an internal clock. They are not synchronized with the PLC scan.
Example : %S4
5ms 5ms
6/2
Role of system bits and words 6
System Function Description bits
%S8
%S9
%S10
%S11
Output freeze
Reset outputs
I/O fault
Watchdog overflow
Initially at 1, it can be set to 0 by the program or by the terminal (in the Data editor) :
• At state 1 PLC outputs are set to 0 if the program is not being executed normally or if the PLC changes to STOP
• At state 0 PLC outputs are kept in their existing state if a program operation fault occurs or if the PLC changes to STOP.
Normally at 0. It can be set to 1 by the program or by the terminal (in the Data editor) :
• At state 1 outputs are forced to 0 when the PLC is in RUN mode
• At state 0 outputs are updated normally.
Normally at 1. It is set to 0 when a I/O fault is detected on the base PLC or the peer PLC (configuration fault, exchange fault, hardware fault). Bits %S118 and %S119 indicate in which PLC the fault is and words %SW118 and %SW119 detail the nature of the fault (see
Section 5.2).
Bit %S10 is reset to 1 when the fault disappears.
Normally at 0, it is set to 1 by the system when the program execution time (scan time) exceeds the maximum scan time (software watchdog).
Watchdog overflow causes the PLC to change to STOP.
B
%S13 First scan
Normally at 0, it is set to 1 by the system during the first scan after the PLC has been changed to RUN.
%S17 Carry overflow
Normally at 0, it is set to 1 by the system :
• In the case of carry overflow during a non-signed arithmetic operation (remainder)
• During a rotate or shift operation it indicates the output of a bit at 1.
It must be tested by the user program after each operation where there is a risk of overflow, then reset to 0 by the user if an overflow occurs.
6/3
B
System Function bits
%S18
%S19
%S20
%S21
Arithmetic overflow or error
Scan period overrun
(periodic scan)
Index overflow
GRAFCET initialization
Description
Normally at 0. It is set to 1 in the case of an overflow when a 16 bit operation is performed, that is :
• A result greater than + 32767 or less than - 32768
• Division by 0
• The square root of a negative number
• BTI or ITB conversion not significant : BCD value out of limits
It must be tested by the user program after each operation where there is a risk of an overflow, then reset to 0 by the user if an overflow occurs.
Normally at 0, this bit is set to 1 by the system in the event of a scan period overrun (scan time greater than than the period defined by the user at configuration or programmed in %SW0).
This bit is reset to 0 by the user.
Normally at 0, it is set to 1 when the address of the indexed object becomes less than 0 or more than the maximum size of an object.
It must be tested by the user program after each operation where there is a risk of overflow, then reset to 0 if an overflow occurs.
Normally at 0, it is set to 1 by :
• A cold restart, %S0=1
• The user program, in the preprocessing program part only, using a Set Instruction (S %S21) or a set coil -(S)- %S21.
• The terminal.
At state 1, it causes GRAFCET initialization. Active steps are deactivated and initial steps are activated.
It is reset to 0 by the system after GRAFCET initialization.
6/4
Role of system bits and words 6
System Function bits
%S22 GRAFCET reset
%S23
%S49
Preset and freeze
GRAFCET
Reactivate transistor outputs
Description
Normally at 0, it can only be set to 1 by the program in pre-processing.
At state 1 it causes the active steps of the entire GRAFCET to be deactivated. It is reset to 0 by the system at the start of the execution of the sequential processing.
Normally at 0, it can only be set to 1 by the user program in the pre-processing program module.
At state 1, it validates the presetting of the GRAFCET chart.
Maintaining this bit at 1 freezes the GRAFCET (freezes the chart).
It is reset to 0 by the system at the start of the execution of the sequential processing to ensure that the GRAFCET chart moves on from the frozen situation.
Normally at 0, it is set to 1 by the user to request a reactivation every
10 s of the transistor outputs which have been tripped by an overcurrent or short-circuit, the first attempt occurring 10 s after the outputs have been tripped.
B
%S50
%S51
%S59
%S69
Updating the date and time
Normally at 0, this bit can be set to 1 or to 0 by the program or the terminal.
• At 0, the date and time can be read.
using words • At 1, the date and time can be updated.
%SW50 to 53
Time-of-day • At 0, the date and time are set.
clock status • At 1, the date and time must be set by the user.
When this bit is set to 1, the time of day clock data is not valid. The date and time may never have been configured, or the battery may be low.
Updating the date and time using word
%SW59
Normally at 0, this bit can be set to 1 or to 0 by the program or the terminal.
• At 0, the date and time remain unchanged.
• At 1, the date and time are incremented or decremented according to the control bits set in %SW59.
Displaying internal bits on the front panel of the PLC
Normally at 0, this bit can be set to 1 or to 0 by the program or the terminal.
• At 0 : the PLC LEDs display the status of the I/O
• At 1 : the status of 8 internal bits (TSX 07 10 and 16 I/O) or 16 internal bits (TSX 07 24 I/O) is displayed on the PLC LEDs (see
Part A, Section 1.10).
The LED farthest to the right flashes to indicate that displaying internal bits has been selected.
6/5
B
System Function bits
%S70
%S71
%S72
%S118
%S119
Update of exchange words
Process
Modbus request
Exchange via extension link
Scanning of peer
PLCs
%S100 State of
/DPT signal
Base
PLC fault
Peer
PLC fault
Description
For the base PLC, this bit is set to 1 as soon as the PLC has performed a complete cycle of transmitting exchange words %IW/%QW to the peer PLCs.
For each peer PLC, this bit is set to 1 as soon as the peer PLC has received and transmitted the exchange words with the base PLC.
This bit is reset to 0 by the program or by the terminal.
This bit is set to 1 when a Modbus request is processed.
It can be used by the operator.
This bit is reset to zero by the program or terminal.
Initially set to 0. Set to 1 until an exchange via the extension link is detected.
This bit is set to 0 when no exchange is performed via the extension link. Word %SW71 of the base PLC shows the list and status of the available extensions.
Applies only to PLCs version 2.2 or lower.
Normally at 0. Can be set to 1 by the program or the terminal.
• At 0 the base PLC communicates with the peer PLCs
• At 1 communication is disabled
Shows the state of INL/DPT strap on the terminal port :
• No strap : UNI-TELWAY master protocol (%S100 = 0)
• Strap present: (/DPT at 0V) protocol defined by the application
configuration (%S100 = 1)
Normally at 0. It is set to 1 when an I/O fault is detected on the base PLC. Word %SW118 determines the nature of the fault.
Bit %S118 is reset to 0 when the fault disappears.
Normally at 0. It is set to 1 when an I/O fault is detected on the I/O extension. Word %SW119 determines the nature of the fault.
Bit %S119 is reset to 0 when the fault disappears.
6/6
Role of system bits and words 6
6.2
System words
6.2-1 List of system words
Word
%SW0
%SW11
%SW14
%SW30
%SW31
%SW32
%SW50
%SW51
%SW52
%SW53
%SW54
%SW55
%SW56
%SW57
Function
Value of PLC scan period (periodic task)
Software watchdog time
UNITELWAY time-out
Time of last PLC scan cycle
%SW58
%SW59
%SW67
%SW68
%SW69
%SW70
%SW71
%SW76
%SW77
%SW78
Devices on extension link
Timer 1 ms
Timer 1 ms
Timer 1 ms
%SW79 Timer 1 ms
%SW100 Analog module input function command word
%SW101 Value of acquired analog module input
%SW102 Analog module output function command word
%SW103 Value of analog module output to be generated
%SW110 Read counter value
%SW111 Fast counting functions
%SW112 Value of potentiometer 0
%SW113 Value of potentiometer 1
Control
U
S
S and U
S
Maximum time of PLC scan cycle S
Minimum time of PLC scan cycle S
Schedule block (RTC) function : words containing current date and S and U time values (in BCD)
%SW50 = seconds and day of the week
%SW51 = hour and minute
%SW52 = month and day
%SW53 = century and year
Schedule block (RTC) function : words containing the data and time S of the last power failure or PLC stop (in BCD)
%SW54 = seconds and fault code
%SW55 = hour and minute
%SW56 = month and day
%SW57 = century and year
Identification code of last stop S
Adjust current date
Value of Modbus end of frame character in ASCII mode
End of frame character value (reception) in ASCII mode (TER port) U
EXCH block error code S
Function and type of TSX 07 PLC
U
U
S
U
S
S
U
S
S
S
S
S
U
S and U
S
S
6/7
B
B
Word Function
%SW114 Enable schedule blocks (RTC)
%SW118 Base PLC status word
%SW119 Peer PLC status word
S = controlled by the system,
U = controlled by the user.
S
S
Control
U
6/8
Role of system bits and words 6
6.2-2 Detailed description of system words
TSX Nano PLCs use the following system words :
System Function words
%SW0 PLC scan period
%SW11 Watchdog time
%SW14 Unitelway time-out
%SW30 Last scan time (1)
%SW31 Max scan time (1)
%SW32 Min scan time (1)
%SW50 Schedule
%SW51 block
%SW52 function
%SW53
Description
Modifies PLC scan period defined at configuration via the user program or the terminal (in the Data editor).
Reads watchdog time (150ms).
Is used to modify the value of the UNITELWAY time-out, via the user program (see part F Section 1.6)
Shows execution time of the last PLC scan cycle
(in ms).
Shows execution time of the longest PLC scan cycle since the last cold start (in ms).
Shows execution time of shortest PLC scan cycle since the last cold start (in ms).
%SW54
%SW55
%SW56
%SW57
Schedule block function
System words containing current values of the date and time (in BCD) :
%SW50 : SSXN Seconds and day of the week with
(N= 0 for Monday to 6 for Sunday)
%SW51 : HHMM Hour and Minute
%SW52 : MMDD Month and Day
%SW53 : CCYY Century and Year.
These words are controlled by the system when bit %S50 is at
0. These words can be written by the user program or by the terminal when bit %S50 is set to 1.
System words containing the date and time of the last power failure or PLC stop (in BCD) :
%SW54 :
%SW55 :
%SW56 :
%SW57 :
Seconds and day of the week
Hour and minute
Month and day
Century and year.
(1) This time corresponds to the time elapsed between the start (acquisition of inputs) and the end
(update of outputs) of a scan cycle.
B
6/9
B
System Function words
Description
%SW58
%SW59
Code of last stop
Adjust current date
Displays code giving cause of last stop :
1= Terminal switch changed from RUN to STOP
2= Stop at software fault (PLC scan overshoot)
4= Power outage
5= Stop at hardware fault bit 3 bit 4 bit 5 bit 6 bit 7
Contains two sets of 8 bits to adjust current date.
The operation is always performed on rising edge of the bit. This word is enabled by bit %S59.
Increment Decrement Parameter bit 0 bit 1 bit 2 bit 8 bit 9 bit 10
Day of the week
Seconds
Minutes bit 11 bit 12 bit 13 bit 14 bit 15
Hours
Days
Months
Years
Centuries
%SW67 End of Modbus Is used to set 'LF' at the end of the Modbus frame in ASCII mode.
frame This word is written at 16#000A by the system on a cold start. The user can modify this word using the program or Adjust mode when the Master uses an end of frame character other than 16#000A.
%SW68 End of Reception Is used to set the parameters for the value of the end of frame byte frame in ASCII mode. Reception ends as soon as this is received.
ASCII mode The default value is 16#000D.
%SW69 EXCH block If an error occurs when using the EXCH block, output bits error code %MSG.D and %MSG.E change to 1. This system word contains the error code. The possible values are as follows:
0: No error, exchange correct
1: Transmission buffer too large
2: Transmission buffer too small
3: Table too small
4: Incorrect Unitelway address (Unitelway mode only)
5: Time - out elapsed (Unitelway mode only)
6: Transmission error (Unitelway mode only)
7: Bad ASCII command (ASCII mode only)
8: Not used
9: Reception error (ASCII mode only)
10: Table %KWi prohibited.
This word is set to 0 every time the EXCH block is used.
6/10
Role of system bits and words 6
System words
%SW70
%SW71
Function
Address and type of PLC
Devices on extension link
Description
Contains the following information :
• bit 2 : 1=presence of schedule block (RTC)
• bit 4 bit 3
0 0
PLC type TSX 07
TSX Nano with 6 inputs/ 4 outputs (10 I/O)
0
1
1
0
TSX Nano with 9 inputs/ 7 outputs (16 I/O)
TSX Nano with 14 inputs/ 10 outputs (24 I/O)
1 1 TSX Nano with AC inputs (16 I/O)
• bits 7, 6 and 5 : address of PLC (copied from address
code selector).
If there is an I/O extension :
• bits 12 and 11: I/O extension type (same coding as
bits 3 and 4)
• bits 13 : 1 = there is an I/O extension
The unused bits are at 0.
Shows the communication status of each extension with the base PLC : bit 1 : I/O extension bit 2 : peer PLC #2 bit 3 : peer PLC #3 bit 4 : peer PLC #4
Bit at 0 if there is no extension or peer, no power, or a fault.
Bit at 1 if there is an extension and exchange with the base PLC.
%SW76 Downcounting These 4 words serve as 1 ms timers.
to Words They are decremented individually by the system every
%SW78 1 ms millisecond if they have a positive value. This gives 4 downcounters downcounting in milliseconds, which is equal to an operating range of 1 ms to 32767 ms. Setting bit 15 to 1 can be used to stop decrementation.
B
%SW100 Analog input
Analog input functions command word.
Value: 0 Analog input not valid
Value: 1 Operation without scaling
Value: 2 Unipolar scale range (period 125ms)
Value: 3 Bipolar scale range (period 125ms)
Value: 4 Unipolar scale range (period 500ms)
Value: 5 Bipolar scale range (period 500ms)
Writing this word is the responsibility of the application program.
6/11
B
System words
Function
%SW101 Analog input
Description
Word containing the value of the acquired analog input. The value range depends on the selection of operation made in %SW100.
%SW100=0 %SW101=0
%SW100=1 %SW101 varies from 0 to 1000
%SW100=2 or 4 %SW101 varies from 0 to 1000
%SW100=3 or 5 %SW101 varies from -10000 to 10000
.
%SW102 Analog output
%SW103 Analog output
Analog output functions command word.
Value: 0 Normal %PWn operation
Value: 1 Operation without scaling
Value: 2 Unipolar scale range analog
%PWn
Value: 3 Bipolar scale range
Writing this word is the responsibility of the application program
Word containing the value to be applied to the analog output. The value range depends on the selection of operation made in
%SW102.
%SW102=0
%SW102=1
%SW102=2
%SW102=3
%SW103=0
%SW103 between 5 and 249
%SW103 between 0 and 10000
%SW103 between -10000 and 10000
Writing this word is the responsibility of the application program
%SW110 Up/down counter
%SW111 Fast counter
Read value of the counter on a rising edge at input %I0.4
%SW112 Value of Contains the conversion on 8 bits (0 to 255) of the position potentiometer 0 of potentiometer number 0.
%SW113 Value of Contains the conversion on 8 bits (0 to 255) of the position potentiometer 1 of potentiometer number 1.
%SW114 Schedule block enable
Bit 0 : counting direction (1= upcounting, 0= downcounting)
Bit 1 : 1= enable HSC (direct) outputs
Bit 2 : 1= select frequency meter time base
(1=100ms, 0=1s)
Bit 3 : 1= update %FC frequency (also indicates the validity of the acquired value on the analog input module)
This bit is reset to 0 by the user.
Enables or disables operation of schedule blocks (RTC) by the user program or the terminal.
bit 0 : 1 = enables schedule block #0
......................................................
bit 15 : 1 = enables schedule block #15
Initially all schedule blocks are enabled.
6/12
Role of system bits and words 6
System Function words
%SW118 Base PLC status
%SW119 I/O peer
PLC status
Description
Shows faults detected on base PLC.
bit 0 : 0= tripping of one of the outputs (1) bit 3 : 0= sensor supply fault bit 8 : 0= TSX Nano internal fault or hardware fault bit 9 : 0= external fault or comm. fault bit 11 : 0= PLC performing self-tests bit 13 : 0= configuration fault (I/O extension configured but absent or faulty)
All the other bits of this word are at 1 and are reserved. Thus, for a PLC which has no fault, the value of this word is :
16#FFFF.
Shows faults detected on I/O peer PLC (this word is only used by the base PLC). The bit assignment of this word is identical to that of word %SW118, except for :
• bit 13 : not significant
• bit 14 : peer PLC now missing although it was present at
initialization (2)
B
(1) after a shortcircuit or overload of the protected transistor outputs.
6/13
B
6/14
7
Programming guide
7.1
Programming advice
Handling program jumps
Use program jumps with caution to avoid loops which are too long and can increase scan time. Avoid program jumps towards instructions which are located upstream.
Programming of outputs
An output bit or internal bit can only be controlled once in the program. In the case of output bits, only the last value scanned is taken into account when the outputs are updated.
Using directly-wired emergency stop sensors
Sensors used directly for emergency stops must not be processed by the PLC. They must be connected directly to the corresponding outputs.
Handling power returns
B
See Part A, Section 7, for additional information about recovering from power outages and how the PLC behaves when power is restored.
!
CAUTION
UNEXPECTED EQUIPMENT OPERATION
Make power returns conditional on a manual operation, as an automatic restart of the installation could cause unexpected operation of equipment
(use system bits %S0, %S1 and %S9).
Failure to observe this precaution can result in equipment damage or personal injury.
Time and schedule block management
The state of bit %S51, which indicates any schedule block faults, should be checked.
Note : When the program is entered, the terminal checks the syntax of the instructions, the operands and their association. The terminal diagnostics function checks programming errors (see Appendices, Part C).
7/1
A
B
Additional notes on using parentheses
• Assignment operations should not be placed within parentheses.
%I0.0
%I0.1
%I0.2
%I0.3
%Q0.1
%Q0.0
LD %I0.0
AND %I0.1
OR( %I0.2
)
ST %Q0.0
AND %I0.3
ST %Q0.1
In order to perform the same function, the following equations must be programmed :
%I0.0
%I0.1
%I0.2
%I0.3
%I0.2
%Q0.1
%Q0.0
LD %I0.0
MPS
AND( %I0.1
)
)
OR( %I0.2
AND %I0.3
ST
MPP
%Q0.1
AND %I0.2
ST %Q0.0
• If several contacts are placed in parallel, they should either be nested within one another or totally dissociated from each other.
Example 1
%I0.0
%I0.1
%I0.5
%Q0.1
Example 2
%I0.0
%I0.1
%I0.5
%Q0.1
%I0.2 %I0.3
%I0.2
%I0.4
%I0.6
%I0.7
The following schematics cannot be programmed.
Example 3 Example 4
%I0.0
%I0.1
%Q0.1
%I0.0
%I0.1
%I0.2
%I0.3
%I0.2
%I0.3
%I0.5
%Q0.1
%I0.4
%I0.4
7/2
Programming guide 7
In order to execute schematics equivalent to those on the preceding page, they must be modified as follows :
Example 5 (see example 3)
%I0.0
%I0.1
%Q0.1
Example 6 (see example 4)
%I0.0
%I0.1
%I0.5
%Q0.1
%I0.2
%I0.3
%I0.2
%I0.3
%I0.4
%I0.3
%I0.2
%I0.4
B
LD %I0.0
AND( %I0.1
OR( %I0.2
)
AND %I0.3
)
OR( %I0.4
AND %I0.3
)
ST %Q0.1
LD %I0.0
AND( %I0.1
OR( %I0.2
AND %I0.3
)
AND %I0.5
OR( %I0.2
)
)
AND %I0.4
ST %Q0.1
7/3
A
B
7.2
Reactivating protected transistor outputs on TSX 07
●● ●●
12
When a channel fault has caused all the PLC outputs to trip (base PLC or I/O extension), they need to be reactivated. The reset may be:
• requested by an operator command. This is the recommended type of reactivation
• automatic: the system automatically attempts to reactivate every 10 seconds. This selection is made by programming system bit %S49.
HAZARD OF EQUIPMENT DAMAGE
When using automatic reactivation, it is essential to know in advance how automatic reactivation of the outputs will effect the process or machine being controlled.
Failure to observe this precaution can cause equipment damage.
LDN
ORN
AND
S
LD
AND
R
Output tripping
The appearance of an overload or short-circuit on an output causes:
• current limitation of the affected output
• tripping of all the outputs in the block (base PLC or I/O extension)
• activation with a steady light of the I/O lamp on the base PLC (if base PLC outputs tripped) or lamps on the base PLC and I/O extension (if I/O extension outputs tripped)
• setting to 0 of I/O fault system bit %S10
• setting to 1 of the system bit %S118 (tripping of base PLC outputs) or system bit
%S119 (tripping of I/O extension outputs),
• setting to 0 of system word bit %SW118:X0 (tripping of base PLC outputs) or system word bit %SW119:X0 (tripping of I/O extension outputs).
Manual reactivation of outputs (dependent on an operator command)
System bit %S49 is set to 1 by an external action. System bit %S49 must be reset to 0 after the outputs have been reset :
%SW118:X0
%SW119:X0
%I0.3
(input I0.3 for example)
%S49
%SW118:X0
%SW119:X0
%S49
%SW118:X0
%SW119:X0
%I0.3
%SW118:X0 %SW119:X0
%S49
S
%S49
R
7/4
Programming guide 7
The minimum time between two reactivate commands allowed by the system is 10s. If the fault which caused tripping has disappeared:
• the outputs are once again active in the state defined by the program
• the I/O lamps are extinguished
• the system bits and system word bits are set to their default state (normal state) :
%S10, %SW118:X0, %SW119:X0 at state 1, %S118 and %S119 at state 0 (see section B 5.2).
Automatic reactivation of outputs
System bit %S49 is permanently set to 1 by the following program:
LD
ST
1
%S49
%S49
B
Reactivation is automatically requested every 10 seconds. When reactivation occurs, the behavior of the outputs, the indicator lamps and system words and bits is identical to that described for manual reactivation.
7/5
A
B
7.3
Reversibility conditions
The following conditions must be checked so that a program can be fully reversible (1) :
• The following instructions should not be used for reversibility : XOR, XORN, %I0.0
%TM0 %TM1 %Q0.1
XORF, XORR, JMPCN, ENDCN, or N.
IN Q IN Q
• Function blocks must be programmed in such a way as to be reversible (see
Section 2.2-2).
• Function blocks cannot be cascaded or
%Q0.1
nested.
• Assignment instructions are prohibited between BLK and OUT_BLK instructions, and BLK and END_BLK instructions (if
OUT_BLK is not programmed).
%I0.0
%TM0
IN Q
Prohibited programming
BLK %TM0
LD %I0.0
ST %Q0.1
IN
END_BLK
Permitted programming
BLK %TM0
LD
IN
%I0.0
END_BLK
LD %I0.0
ST %Q0.1
(1) Note : When a sequence of instructions is not reversible, it remains in List Language, while the remainder of the reversible program is converted into Ladder diagrams.
7.4
Reversibility rules
• A canonical rung cannot exceed a height of 7 cells, and a width of 11 cells (7x11 grid).
• A sentence beginning with LD must end with a conditional action instruction.
• JMPCN, ENDCN, NOP, and N instructions are not reversible.
• Action instructions within parentheses are not reversible.
• Stack instructions within parentheses are not reversible.
• An OR instruction after an action instruction is not reversible.
• RET, JMP, and END instructions are unconditional. No other instructions can be in the rung.
• Function block inputs and outputs can only be accessed through reversible standard function block instructions. Direct access instructions for function blocks are not reversible.
7/6
Programming guide 7
• Instructions after an END_BLK in a sequence cause the sequence to be nonreversible.
• Function block outputs used with AND and OR instructions are not reversible.
• An OR instruction inside a function block output rung must be inside parentheses.
• An unconditional action instruction between a BLK and an END_BLK is not reversible.
• An OUT_BLK must be followed by a LD of a valid function block output or an
END_BLK.
• An instruction preceding an MRD or MPP instruction must be either a conditional action instruction or a stack operation.
• A non-nested OR instruction between an MPS and MPP pair is not reversible.
• An OR instruction after an MPS, MRD, or MPP instruction is not reversible.
• An MCS instruction cannot be used in the same rung with any other action instruction.
• A subroutine call or JMPC instruction must be the last action instruction of a rung.
• When putting a title and comments before a List instruction, there can only be 1 title line and up to 4 comment lines. If a blank line is placed anywhere between the title and the List instruction, part of the header may not show up in the corresponding
Ladder rung header.
• If more than 4 lines of comments are placed ahead of the List instruction, the 5th comment line will be interpreted as a title line and the comment lines above will not appear in the corresponding Ladder rung header.
When a sequence of instructions is not reversible, it remains in List Language, while the remainder of the reversible program is converted into Ladder diagrams as shown below.
B
7/7
A
B
7/8
___________________________________________________________________________
FTX117 terminal Contents
Part C
Section
1 General
1.1
Description of the FTX117 terminal
1.2
FTX117 terminal connection
1.3
FTX 117 terminal operating modes
1.4
Description of the screen and the keypad
1.4-1 Description of the screen
1.4-2 Description of the keypad
1.5
General information on the user interface
1.6
Presentation of the FTX117 terminal editors
1.7
Principle for selecting editors and functions
1.8
Method for creating an application
2
3
First use
2.1
Powering up the FTX117 terminal
2.2
Terminal setup
2.3
Language selection
2.4
Preferences
Application configuration
3.1
General
3.2
General configuration of the application
3.3
Function blocks
3.3-1 Timer block %TM
3.3-2 Counter block %C
3.3-3 Register block %R
3/1
3/2
3/2
3/3
3/3
3/4
C/1
2/1
2/1
2/2
2/2
Page
1/1
1/2
1/6
1/7
1/10
1/3
1/4
1/4
1/4
1/12
C
___________________________________________________________________________
FTX117 terminal Contents
Part C
C
Section
3 Application configuration (continued)
3.4
Input configuration
3.4-1 Selection of the filtering level for the PLC discrete inputs
3.4-2 Selecting the use of latching inputs
3.4-3 Fast counter function and associated inputs
Page
3/5
3/5
3/5
3/6
3.5
Configuration of the outputs
3.5-1 Use as pulse width modulated output
3.5-2 Use as pulse generator output
3/7
3/7
3/7
3.6
Entering constants
3.7
Clearing the configuration
3.8
Direct access to the configuration from the program editor
3.9
Terminal port configuration
3/8
3/8
3/8
3/9
4 Programming
4.1
General
4.2
Creating a program
4.3
Modifying a program
4.3-1 Accessing a program line
4.3-2 Modifying a program line
4.3-3 Inserting a program line
4.3-4 Deleting a program line
4.3-5 Copying, deleting and moving a set of lines
4.4
Search/Replace
4.4-1 Search for a program line, for a label or for a subroutine
4.4-2 Search for a variable in the program
4.4-3 Search for an instruction in the program
4.4-4 Replacing a variable in the program
4.5
Program Diagnostics
4/1
4/1
4/7
4/7
4/8
4/8
4/9
4/10
4/4
4/4
4/4
4/5
4/5
4/6
___________________________________________________________________________
C/2
___________________________________________________________________________
FTX117 terminal Contents
Part C
Section
4 Programming (continued)
4.6
Clearing an application
4.7
Information
4.7-1 Entering the name of the application
4.7-2 Password
4.7-3 Display of data
5 Configuring the schedule blocks (RTC)
6 Storing and transferring applications
6.1
General
6.2
Using the Transfer function
6.3
Saving/retrieving an application in FLASH memory
6.4
Saving/retrieving an application on a memory card
6.5
Transferring applications from the terminal to the PLC
6.6
Saving/retrieving an application in EEPROM memory
7 Starting the application
7.1
General
7.2
Setting the internal clock
7.3
Initialize
7.4
RUN or STOP
7.5
Information
7/1
7/1
7/2
7/2
7/2
6/1
6/2
6/2
6/3
6/4
6/4
Page
4/11
4/12
4/12
4/12
4/13
C
5/1
___________________________________________________________________________
C/3
C
___________________________________________________________________________
FTX117 terminal Contents
Part C
Section
8 Debugging
8.1
General
8.2
Dynamic program display
8.3
Modification and forcing
8.4
Modifying the program in RUN mode
9 Data Editor
9.1
General
9.2
Principle for accessing objects to be adjusted
9.3
Objects which can be accessed via the data editor
9.4
Display and modification of Boolean variables
9.5
Display and modification of numeric variables
9.6
Display and modification of function blocks
9.7
Display of Grafcet steps
9.8
Creation and display of data tables
9.9
Reinitialization of data tables
9.10 Transfer data tables
Page
8/1
8/1
8/2
8/4
9/1
9/1
9/2
9/3
9/3
9/4
9/4
9/5
9/5
9/6
___________________________________________________________________________
C/4
Preface
Key markings
The keypad contains multiply-marked keys. However, for easier illustration and legibility only the marking under discussion is shown on the key.
LD
%I l
I
for LD instruction
for %I operand
The dotted area indicates whether this is the lower or upper part of the key.
z for Enter key C
New functions of software version V3.0
The following functions have been added in software version V3.0 (in relation to version V2.1) :
• Communication functions :
Modbus slave protocol on extension port,
ASCII, UNI-TELWAY master and slave protocol on terminal port.
___________________________________________________________________________
1
C
___________________________________________________________________________
2
General
1
1.1
Description of the FTX 117 terminal
The FTX 117 terminal is a programming and adjustment tool for TSX Nano PLCs.
Connection for power supply cable
Connection for
PLC cable
Modicon FTX 117
Alphanumeric display with
4 lines of 16 characters
Carrying strap
Magnets at the back of the terminal keep it in an upright position on a metal surface (1)
PL7
Esc Edit Menu
FTX TSX
LD
%I
ST
%Q
AND
%M
OR
%S
IN BLK BLK XOR
%TM %KW %MW %SW
[
C
)
(
Fun
Var
Shift
R
%C
#
R / F
+ / -
N
Del
Ins
S
7
E
MPS
4
B
JMP
1
A
NOP
0
CU
8
CD
9
F
MRD MPP
5 6
C
%L
2
D
END
3
:
.
Operating mode selection switch :
• FTX: operation in offline
(local) mode
• TSX: operation in online
(connected) mode
Keypad with 35 keys
Memory card for saving and archiving applications
Slot for memory card
Dimensions : Height : 185 mm, Width : 80/95 mm, Thickness : 25/30 mm.
POSSIBLE DESTRUCTION OF DATA
Do not place the FTX 117 terminal near data diskettes or other magnetic media. The magnets on the back may destroy data and programs on the diskettes.
Failure to observe this precaution can result in equipment damage or personal injury.
___________________________________________________________________________
1/1
C
C
1.2
FTX 117 terminal connection
The FTX 117 terminal can be powered in 2 different ways :
• By a 100 to 120VAC or 200 to 240VAC power supply via : a T FTX ADC 11(100 to 120VAC) or T FTX ADC 12 (200 to 240VAC) adapter.
In this case, the terminal must be used in offline mode (see Section 1.3).
T FTX ADC
●● adapter
FTX 117
PL7 FTX TSX
• From the PLC via a T FTX CB1 connection cable (length : 2 meters - 6 feet) or via a
T FTX CB1 050 connection cable (length : 5 meters - 16 feet).
In this case online mode is the priority mode for the terminal (see Section 1.3), but the terminal still can be used in offline mode (the PLC then serves only to power the terminal).
FTX 117
+
24VDC
—
OUT
IN
COM
0
1
2
3
4
5
6
7
8
0
L N
100/240VAC
TS Nano
Modicon
I
0
RUN ERR
O
0
COM
I/O
1
2
3
4
3
4
1
2
5
6
7
8
5
6
5
OUT
COM
6
3
OUT
COM
4
2
OUT
COM
0
1
INPUTS 24 VDC
OUTPUTS 2A Ry
A
SG
1
PL7 FTX TSX
___________________________________________________________________________
1/2
General 1
1.3
FTX 117 terminal operating modes
The FTX 117 terminal offers two operating modes which are selected via the FTX/TSX switches located below the screen :
• Offline (local) mode
The FTX/TSX switch is in position FTX. The program and the application configuration are entered in the terminal RAM memory (1).
(1) Since the contents of the terminal RAM memory will be maintained for only an hour after the terminal is switched off, it is advisable to back up the application in the terminal Flash memory or on a memory card
(see Section 6).
FTX
C
• Online (connected) mode
The FTX/TSX switch is in position TSX. The program and the application configuration are entered in the
PLC RAM memory (this memory is retained for an hour when there is a power outage).
Online mode is used to access all operating functions, especially debugging and data editing functions.
TSX
Important
Changing operating modes
The changeover from one operating mode to another is completed when the main editor screen is displayed.
___________________________________________________________________________
1/3
1.4
Description of the screen and the keypad
1.4-1 Description of the screen
C
The screen of the FTX 117 terminal is a liquid crystal back-lit display of 4 lines of
16 characters each.
The main characteristics of the screen are as follows :
2 3 4 1 Menu line, for the main editor menu and for the editor sub-menus. The m key is used to display the editor sub-menu line; the EDIT key is used to display the main screen and Editor menu.
2 Cursor, for selecting an item to be modified. The cursor is moved using < > ^ ¨ .
%TM2
-
TB: 1min
%TM2.P: 9999
1App 2Blk 3In
3 The sign indicates multiple choice parameters, which are selected using < > .
4 Numerical entry field allows entry of a user-supplied parameter.
1
1.4-2 Description of the keypad
The keypad on the FTX 117 terminal consists of 3 different-colored zones :
1
1 Operation zone : light blue keys
2 Standard instruction entry zone : dark blue keys, with :
- instructions in yellow
- operands in white
2
3
3 Numeric keypad zone : gray keys
Esc Edit Menu
LD
%I
ST
%Q
AND
%M
OR
%S
IN BLK BLK XOR
%TM %KW %MW %SW
[
C
)
(
Fun
Var
Shift
R
%C
#
R / F
+ / -
N
Del
Ins
S
7
E
MPS
4
B
JMP
1
A
NOP
0
CU
8
F
MRD
5
C
%L
2
:
.
CD
9
MPP
6
D
END
3
In general, the operating context automatically determines the function of the dual-marked keys (no need to press h in many cases during program and data entry).
___________________________________________________________________________
1/4
General 1
1 Operation zone (light blue)
Contains :
• Keys for accessing editors and operating functions ( e and m ).
• Selection and cursor movement keys ( ^ ¨ < > ).
• f v keys for accessing variables and instructions not marked on the keypad.
• Insert, delete, enter, cancel and shift keys ( î d z E h ).
Esc Edit Menu
Fun
Var
Shift
Del
Ins
2 Instruction entry zone (dark blue)
Depending on the context, these multiply-marked keys are used to :
• Enter an instruction (example : %LD) when the cursor is in the instruction area.
• Enter a variable (example : %I) when the cursor is in an operand area.
The c , R , n , and ( keys pressed after an instruction add to it : for example, l then n enters the instruction
LDN.
LD
%I
ST
%Q
AND
%M
OR
%S
IN BLK BLK XOR
%TM %KW %MW %SW
)
(
R
%C
[
C
#
R / F
+ / -
N
C
3 Numeric keypad zone (gray)
Depending on the context, these keys are used to :
• Enter numeric values (either decimal or hexadecimal; access letters A to F by pressing h first).
• Enter instructions (the program structuring instructions
JMP, %L, MPS, MRD, etc., are on these keys).
S
7
E
MPS
4
B
JMP
1
A
NOP
0
CU
8
F
MRD
5
C
%L
2
:
.
CD
9
MPP
6
D
END
3
___________________________________________________________________________
1/5
C
1.5
General information on the user interface
The following information will help the user become competent on the FTX 117 terminal in a short period of time.
Selecting a function
The standard functions for programming and debugging an application on a TSX Nano
PLC are grouped together under 5 editors : PLC, Program, Data, Configuration and
Terminal (see Section 1.6) accessed via e . Each editor offers a menu which is accessed via m . The selection principles are described in detail in Section 1.7.
Entering instructions and operands
To access instructions and operands marked on the keypad simply press the key taking no notice of the dual marking, as the terminal chooses between instructions and operands according to the context.
Access to instructions and operands which are not marked on the keypad : f z and v z access instructions and operands not directly available on the keypad (see Section 4.2).
[ z access numeric instructions.
Entering parameters
Parameters (such as configuration parameters) followed by the sign do not require any entry; the value is selected using < > (see screen opposite : TB).
Other parameters are entered using numeric keys (see screen opposite : %TM2.P).
1 SR 5 U
-
2 RET 6 MCS
3 I 7 MCR
4 O 8 =*=
%TM2
-
TB: 1min
%TM2.P: 9999
1App 2Blk 3In
As a general rule parameters or data followed by ": " can be modified; those followed by "=" cannot.
Using the keys
Some keys have a specific use :
^ ¨ move the cursor up and down, and also between fields. In this case the cursor can move horizontally.
h activates the upper key function in cases where the context is not sufficient (for example, d , hexadecimal entry).
Important
To access the upper key marking press h and release, then press the desired key.
___________________________________________________________________________
1/6
General 1
1.6
Presentation of the FTX 117 terminal editors
The editors appear on the main editor menu.
-
0Inf
<
>
-
1TSX 2Prg 3Dat
<
>
-
3Dat 4Cnf 5FTX
1 TSX
PLC
Sect.7
2 Prg
Program
Sect.4
3 Dat
Data
Sect.9
4 Cnf
Configuration
Sect.3
5 FTX
Terminal
Sect.2
0 Inf
Information
Sect.7.5
1Run/Stp
Run/Stop
Sect.7.4
0 Inf
Information
Sect.4.7
0 Inf
Information
Sect.7.5
1Trf
Transfer
Sect.6
1 Trf
Transfer
Sect.6
0 Inf
Information
Sect.7.5
1Trf
Transfer (2)
Sect.9.9
0 Inf
Information
Sect.4.7
1App
Application
Sect.3.2
0 Inf
Information
Sect.2.2
1Opt
Option
Sect.2.1
2 Ini
Initialization
Sect.7.3
3 Rtc
Sched. blocks
Sect.5.1
4 Clk
Clock
Sect.7.2
2 Clr
Clear
Sect.4.6
4 Dbg
Debug
Sect.8
2 Cnv
Conversion
Sect.8.2
3 Dgn
Diagnostics
Sect.4.5
3 Frc
Forcing
Sect.8.3
4 Prg
Program
Sect.4
2 Cnv
Conversion
Sect.8.2
3 Frc
Forcing
Sect.9.4
4 Dat
Adjust
Sect.9.8
2 Blk
Function block
Sect.3.3
3 In
Inputs
Sect.3.4
4 Out
Outputs
Sect.3.5
2 Lan
Language
Sect.2.3
3 Prf
Preferences
Sect.2.4
4 Tst
Test
5 Sch
Search
Sect.4.4
1 Nxt
Next
Sect.4.4
6 Sel (2)
Select
Sect.4.3-5
2 Pos
Position
Sect.4.4
7 Pst (2)
Paste
Sect.4.3-5
3 Var
Variable
Sect.4.4
5 Dt1
Table 1 (1)
Sect.9.8
6 Dt2
Table 2 (1)
Sect.9.8
7 Dt3
Table 3 (1)
Sect.9.8
5 %KW
Constants
Sect.3.5
6 Clr
Clear
Sect.3.7
7 Com
Communication
Sect.3.9
4 Ins
Instruction
Sect.4.4
8 Dt4
Table 4 (1)
Sect.9.8
5 Rep
Replace
Sect.4.4
9 Clr
Clear
Tables (1)
Sect.9.9
(1) Not available with V1 software.
(2) No access in on line mode with V2 software
Accessed only in online mode when
FTX/TSX switch set to TSX.
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1/7
C
C
• PLC editor (TSX) : Displays the PLC state :
- PLC state (RUN or STOP)
- Application executable or not
- Type of PLC connected
The menu displays the various functions :
- 0 Inf : information on PLC status
- 1 Run : start or
Stp : stop depending on the state of the PLC
- 2 Ini : initialize the PLC memory
- 3 Rtc : display and set schedule block (RTC) parameters
- 4 Clk : set the time of the real-time clock
• Program editor (Prg) : Accesses the Instruction List program editor.
m displays the various functions of the editor :
- 0 Inf : information on the application, entry of name, password
- 1 Trf : transfer or save an application
- 2 Clr : clear memory (configuration and program or program only)
- 3 Dgn : program syntax diagnostics
- 4 Dbg : debug
- 5 Sch : access a sub-menu containing the search/ replace functions
- 6 Sel : select program lines
- 7 Pst : paste the clipboard buffer
TSX: RUN
APP: Exec
TSX 07 31-16
-
-
1Stp 2Ini 3Rtc
Fr20 Dec 1996
17:26:48
STP: 2 Jan 1996
2 17:07:23
000 LD %I0.1
-
001 AND %I0.2
002 ST %Q0.1
003 LD %M0
000 LD %I0.1
001 AND %I0.2
002 ST %Q0.1
-
1Trf 2Clr 3Dgn
The Dbg (debug) function, which can also be accessed directly using h and > , dynamically displays the values or status of program variables.
m displays the various options :
- 0 Inf : information on the PLC and application
- 1 Trf : transfer or save an application
- 2 Cnv : display words in hexadecimal, ASCII or decimal
- 3 Frc : force bits to 0 or 1
- 4 Prg : return to Program menu
%I0.1 0
%I0.2 1
%Q0.1 0
-
1Trf 2Cnv 3Frc
• Data editor (Dat) : Accesses all the variables to display, modify and/or force their states.
%I0.5
-
Err=0 ...f.....
..!...f..
%Q0.0
___________________________________________________________________________
1/8
General 1
Enter the variable to be displayed.
Example : display internal bits starting with %M0
M 0 z displays the eight internal bits starting at the address entered.
m displays the various options :
- 0 Inf : information on PLC status
- 1 Trf : transfer or archive data tables
- 2 Cnv : convert words to hexadecimal, ASCII, binary or decimal
- 3 Frc : force bits to 0 or 1
- 4 Dat : return to current adjustment function
- 5 Dt1 : enter data table n
°
1
- 6 Dt2 : enter data table n
°
2
- 7 Dt3 : enter data table n
°
3
- 8 Dt4 : enter data table n
°
4
- 9 Clr : clear data tables n
°
1 to 4
%M0 %M1
-
%M2 %M3
%M4 %M5
-
1Trf 2Cnv 3Frc
%TM0 %TM0.Q=1
-
TON TB=100ms
%TM0.P: 21
%TM0.V: 21
• Configuration editor (Cnf) : Accesses the application configuration editor.
m displays the various options :
- 0 Inf : information on the application, entry of name, password
- 1 App : application level configuration (RUN/STOP input, PLC status output, normal or periodic scanning, PLC extension, Modbus)
- 2 Blk : configure function blocks (timer, counter, etc)
- 3 In : configure inputs (filtering, %FC, etc)
- 4 Out : configure outputs (%PWM, %PLS, etc)
- 5%KW : enter constant word values
- 6 Clr : delete the configuration
- 7 Com : terminal port configuration (ASCII,
UNI-TELWAY master or slave)
Run/Stop:
Security:
Mode:
Period:
%C4
%C4.P: 9999
Adjust: Y
-
1App 2Blk 3In
%I0.1
%Q0.1
Normal
2ms
• Terminal editor (FTX) : Is used for entering the FTX 117 terminal parameters
- 0 Inf : information on the terminal
- 1 Opt : options
- 2 Lan : selection of working natural language
- 3 Prf : preferences :
• activate/inhibit the keypad audible beep
• select the screen back-lighting timeout
(screen saver)
- 4 Tst : start terminal self-tests (reserved for
FTX117 - PL7-07
App= '........'
FTX
-
1Opt 2Lan 3Prf
C
1/9
C
1.7
Principle for selecting editors and functions
e
to select an editor via the menu :
• Move the cursor using
<> the required editor and confirm with z
to
(the rectangle preceding the editor must be solid), or
(example: e4
to access the configuration editor).
display other editors, use
><
.
FTX117 - PL7-07
App: ’........’
TSX 07 31 - 16
<>
and or to
0
5
Editor screen (for example, configuration)
The editor screen displayed depends on the context, and may be :
• The first screen in the editor
• The last screen previously displayed in the editor
• The screen corresponding to the object selected in the program editor (see the figure on the next page).
using m
(PLC and Terminal editor menus are permanently displayed).
Access to a menu option operates in the menu.
Press
E
to remove the menu.
Function screen (for example, Timer block).
confirmed with z
.
▲
-
Security: %Q0.1
Mode: Normal
Extension: N m
▲ e
Run/Stop: %I0.1
Security: %Q0.1
Mode: Normal
<> and z or
▲ to
0
7 e
-
TB: 1min
%TM2.P: 9999
Type: TON e
___________________________________________________________________________
1/10
General
1
Direct access between editors
While in the Program editor, it is possible to directly access objects in the configuration or data editors.
e4 e2
▲
Program editor (main editor)
000 LD %I0.1
001 AND %I0.2
-
003 ST %Q0.1
▲ e2 e3
▲
-
TB: 1min
%TM0.P: 9999
Type: TON
Configuration editor
-
TON TB=100ms
%TM0.P: 21
%TM0.V: 21
Data editor
▲
%I0.1 0
%I0.2 1
-
%Q0.1 1
Debug function
Example above : after selecting (or entering) the time delay %TM0 in the program :
• When creating a program, it is possible to access its configuration screen directly in order to enter the parameters.
• When debugging a program, it is possible to directly access its settings (data editor) or the output status display (debug mode). To do so, place the cursor on the program line containing the object of interest.
C
___________________________________________________________________________
1/11
1.8
Method for creating an application
C
The following flow chart shows the various steps in creating an application in Instruction
List language using the FTX 117 terminal.
Design phase, which can be performed in :
• Offline mode, with (or without) a PLC (FTX/TSX switch set to position FTX). In this case operation with backup 4 is recommended, since the terminal will only retain the application for 1 hour after the power is switched off.
• Online mode, with a PLC (FTX/TSX switch set to position TSX). In this case operation with backup 4 is optional.
1
Analysis-design
• Program
• Requirements
▲
Enter configuration
• Application
• Function blocks
• Inputs
• Outputs
• Constants
▲
Cnf editor
Configuration see Section 3
2
3
4
Configure schedule blocks (RTC)
▲
Enter program
• Create
• Insert
• Modify
• Delete
• Duplicate
▲
Backup
• in Flash memory
• on memory card
▲
TSX editor
PLC see Section 5
Prg editor
Programming see Section 4
Prg editor
Programming see Section 6
Optional operation if the default configuration is suitable for the application which is to be created. This operation can also be performed in parallel with operation 3 using the direct access facility (see Section 1.7).
___________________________________________________________________________
1/12
General 1
Adjustment and debugging phase, which is performed in online mode. If the design phase has been performed in online mode, the transfer operation 5 will not be necessary.
If designing in online mode
▲
5
6
7
&
If designing in offline mode
▲
Transfer the application
▲
Start up
• Adjust clock
• Initialize
• Set to RUN
▲
Debug and adjust
• Dynamic display
• Data entry
• Data table entry
• Forcing
• Modification in RUN
▲
Archive
• in EEPROM memory
• on memory card
Prg editor
Programming
Transfer function see Section 6
TSX editor
Start up see Section 7
Prg editor
Programming see Section 8 and
Dat editor
Data see Section 9
Prg mode
Programming
Transfer function see Section 6
C
Note : The terminal provides 2 methods for protecting the application when it has been debugged :
• Total read and write protection. This is performed when the application is transferred to the PLC memory, see Section 6.
• Write protection for the application, with access to the application display and to the adjustment of variables. This protection is provided by the use of a password, see
Section 4.7.
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1/13
C
___________________________________________________________________________
1/14
2
First use
2.1
Powering up the FTX 117 terminal
The terminal is powered up as soon as the power supply or the PLC is connected (see connection and operating modes in Section 1.2). An identification screen is displayed while a series of self-tests is executed in order to detect any possible malfunctions.
After this series of self-tests has been performed and if no malfunction occurs, the initial screen is displayed from which all the terminal functions can be accessed.
FTX117 V3.0
PL7-07 V3.0
(C) 1994-1996 TE-SD
• If the terminal is in offline mode (FTX), the screen opposite is displayed. It shows :
- The type of terminal and software used
- The name of the application in memory (if any)
- The operating mode : FTX
FTX117 - PL7-07
App: ' ........
'
FTX
-
1TSX 2Prg 3Dat
• If the terminal is in online mode (TSX), the screen opposite is displayed. It shows :
- The type of terminal and software used
- The name of the application which has been entered
- The PLC to which the terminal is connected
FTX117 - PL7-07
App: ' ........
'
TSX 07 31-16
-
1TSX 2Prg 3Dat
Reminder : The operating mode is selected using the FTX/TSX switch which is located at the top right of the keypad.
Note : When the terminal is first switched on, the language to be used must be selected.
English is the default selection (see Section 2.3).
C
2.2
Terminal setup (5.FTX)
e 5
FTX terminal setup is used for adjusting the FTX 117 terminal settings. The setup editor is accessed using e 5 . It offers 4 functions :
(FTX) terminal setup
• 0 Inf : Information on the software versions
(see first screen on this page)
• 1 Opt : Option (future implementation)
• 2 Lan : Language
FTX117 - PL7-07
App: ' ........
'
FTX
-
1Opt 2Lan 3Prf
• 3 Prf : Preferences
___________________________________________________________________________
2/1
C
2.3
Language selection (2.Lan) z
^
and
¨
, confirmed with
, and will be retained even after a power outage.
Default language : English.
2.4
Preferences (3.Prf) m2
-
English
Deutsch
Italiano m 3
This function is used to :
• Select (Y) or not (N) an audible beep when the keys on the keypad are pressed.
The audible beep has two tones :
- A deep tone indicating that the keystroke has been recognized.
stroke has been used.
This is selected using
>
or
<
.
Preferences
-
Backlight: 10
• Select the period after which the screen back-lighting is deactivated if the operator has not used the keypad.
function.
It is selected using
>
or
<
.
This function extends the life of the back-lighting (Note : the screen remains visible even when the back-lighting is off).
Default : Audible beep active and back lighting set at 5 min.
___________________________________________________________________________
2/2
3
Application configuration
3.1
General
It is not necessary to access the Configuration editor when creating an application, if the default values are suitable (see table below). For function blocks or constants, access is more direct via the Program editor Prg by selecting the block or the constant using the cursor and accessing the Configuration editor (see fast access, Section 3.8).
e4
key :
.
Cnf Configuration editor
• 0 Inf : Information (same as for program editor, see Section 4)
• 1 App : Application
• 2 Blk : Function blocks
• 3 In : Inputs
• 4 Out : Outputs
• 5 %KW : Constants
• 6 Clr : Clear (use default configuration)
• 7 Com : Terminal port communication
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Default values
Function Default setting Menu
Run/stop input not configured
PLC status (Security) output not configured
Scan mode
Extension port
I/O extension check
Input filter normal
PLC not configured
12ms
Latch inputs
Fast counter
%Q0.0 output
1 App
1 App
1 App
1 App
1 App
3 In not configured not configured
3 In
3 In configured as discrete 4 Out
Description of the function
Part A, Sect 4.1
Part A, Sect 4.2
Part A, Sect 1.3
Part A, Sect 1.10
Part A, Sect 1.4
Part A, Sect 1.7
Part A, Sect 4.3
Part A, Sect 4.4
Part A, Sect 1.6
Note : The configuration parameters cannot be modified when the PLC is in RUN mode.
When the configuration has been modified resetting the PLC to RUN re-initializes the application (cold restart, see Part A, Section 7).
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3/1
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3.2
General configuration of the application (1. App) m 1
This function is used to :
>
is used to select an input from %I0.0 to %I0.5.
>
is used to select an output from %Q0.0 to %Q0.3.
(select using
>
). For periodic scanning, an additional line is displayed on the screen for entering the scan period between 2ms and 150ms.
• Select the type of extension (select using
>
)
- PLC (PLC extension)
- Modbus
(select using
>
).
Select Y (for yes) to start an I/O error detection via the base PLC, when :
- there is no I/O extension,
- or when an I/O fault is detected in the extension.
Run/Stop: %I0.1
Security: %Q0.1
Mode:
Ext Port :
Normal
PLC
Run/Stop: N
Security: N
Mode: Periodic
Period: 10ms
Bits/s: 19200
I/O: Y
PLC2: Y
PLC3: N
I/O: Y
PLC2: Y
PLC3: N
PLC4: N
3/2
- Select the transmission speed on the extension link as
19200 or 9600 bits/s.
- Select the devices to be scanned on the I/O link (I/O extension) and peer PLCs PLC2 to PLC4.
Run/Stop: %I0.1
Security: %Q0.1
Mode: Normal
Ext Port : Modbus Selecting Modbus allows you to :
- Select the transmission speed on the communication port as 1200, 2400, 4800, 9600 or 19200 bits/s.
- Select the PLC address (1 to 98)
- Select Time-out (1 to 127 characters, 3 by default)
Ext Port: Modbus
Bits/s: 4800
Slave Addr: 8
Time Out :
- Select the format (7 or 8 data bits, 1 or 2 stop bits)
- Select the parity type (even, odd or no parity).
To move from one line to another on screen z
^
is used.
confirms the selections.
¨¨¨¨¨ or
Time Out : 3
Data Bit: 8
Parity: Even
Stop Bit : 1
___________________________________________________________________________
3
Application configuration
3.3
Function blocks (2. Blk) m 22222 3
This option is used to configure the standard function blocks :
Function block
Timer %TM,
Counter %C,
Register %R,
Drum controller %DR v11
Description see Section 3.2-2 see Section 3.2-3 see Section 3.2-4 see Section 3.2-5
3..3-1 Timer block %TM
1
2
†††††
accesses the timer function block.
Enter the block number (0 to 31) using the numeric keys or and .
3 Access the time base TB using and
4 Access the preset %TMi.P via and
<
.
<
¨¨¨¨¨
and select a time base value of 1ms (this value only available for %TM0 and %TM1), 10ms, 100ms, 1s or 1 min using
-
TB: 1min
%TM2.P: 9999
Type: TON
. (Selecting N (for No) locks out the timer preset in the data editor)
7 Confirm the selections with .
TB: 1min
%TM2.P: 9999
Type: TON delay), or TP (pulse) using
>
¨¨¨¨¨
and select the type TON (on-delay), TOF (off-
6 Access the Adjust option using
¨¨¨¨¨
, and using the numeric keys, enter a preset value of 0 to 9999.
5 Access the timer Type using ¨¨¨¨¨
<
.
and select Y (for Yes) or N (for No) using
>
C
1
3.3-2 Counter block %C CCCCC
accesses the counter function block.
2 Enter the block number (0 to 15) using the numeric keys or
>
and
<
.
3 Access the preset %Ci.P via
¨¨¨¨¨
, and using the numeric keys, enter a preset value of 0 to 9999.
%C4
%C4.P: 9999
Adjust: Y
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3/3
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4 Access the Adjust option using and
<
5 Confirm the selections with z
.
¨¨¨¨¨
and select Y (for Yes) or N (for No) using
. (Selecting N (for No) locks out the counter preset in the data editor)
>
3.3-3 LIFO/FIFO Register block %R
2
3
1
A LIFO/FIFO register block is configured in the following way : v10 or v10 accesses the LIFO/FIFO register block.
>
and
<
Access the register Type via in, first out) using
.
>
and
4 Confirm the selections with
¨¨¨¨¨
.
.
%R0
Type: FIFO
and select : FIFO (first in, first out) or LIFO (last
3.3-4 Drum controller block %DR
3/4
A drum controller function block is configured in the v11 accesses the drum controller function block.
2 or
>
and
< between 1 and 8).
.
, and enter the number of steps (a value 3 Press
4 Access each Step via
¨¨¨¨¨
, and enter the value of each control bit (16 values) using keys 0 or 1. The various bits are accessed using
>
and
<
, and the step has two numbers : Step i.j. i is the step number
5 Access each Control Bit using d cancels a control bit.
6 Confirm the selections with z
.
¨¨¨¨¨
and for each of
or
%DR0 Nb Step:8
Step0.0:00000000
Step1.2:00100000
Step2.0:00000000
Control bits:
0:%Q0.1 1:%Q1.0
2:%M10 3: ...
4: ... 5: ...
6: ... 7: ...
8: ... 9: ...
A: ... B: ...
C: ... D: ...
E: ... F: ...
___________________________________________________________________________
3.4
Input configuration (3 In)
This function is used to select :
• The filtering level for the PLC discrete inputs
• Those inputs to be used as latching inputs
• The fast counting function.
These selections are confirmed with z
.
Application configuration m 3 3
3.4-1 Selection of the filtering level for the PLC discrete inputs
<
.
• When Filtering is enabled :
¨¨¨¨¨
>
and
is used to access 3
Filtering Y
-
%I0.4-7: 12ms
%I0.8-13: 12ms groups of inputs in succession : %I0.0-%I0.3, using
>
and
<
.
Default : Filter at 12 ms.
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3.4-2 Selecting the use of latching inputs use of latching inputs
• When latching is enabled
%I0.0 to %I0.5.
>
¨¨¨¨¨
and
<
.
accesses 6 inputs from ¨
and
^
and select Y (yes) using
>
.
Default : Non-latching inputs.
%I0.8-13: 12ms
-
%I0.0 1 2 3 4 5
N N N N N N
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3/5
3.4-3 Fast counter function and associated inputs
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• %FC is used to select the function to be executed : >
and
<
.
successively pressing
¨
.
5 kHz or 10 kHz using
• Input : restates that the counting input is input %I0.0
(there are no choices on this line).
input using been selected.
>
and
>
<
and
>
and
<
.
<
. N = no preset input has
. N = no enable input has been selected.
• Downcounter : restates that the downcounter input is input %10.3 (there are no choices on this line).
(Appears only when the up/down counting function is selected).
value read input using
>
and
<
.
N = no preset input has been selected.
• %FC.S0 : enters value of threshold 0 from 0 to 65535.
• %FC.S1 : enters value of threshold 1 from 0 to 65535.
• HSC Out: use or non-use of the FC threshold outputs
%Q0.1 and %Q0.2. (N = no FC output).
• The three lines which are offered when the HSC outputs are selected correspond to the following table :
%FC: Counting
Max Freq.: 5kHz
Input: %I0.0
Preset : %I0.1
Enable: N
%FC.S0: 65535
%FC.S1: 65535
HSC Out: N
HSC Out: %Q0.1-2
%FC.V<S0 >S0 >S1
%Q0.1: 1 0 0
%Q0.2: 1 0 0
%FC.V<%FC.S0
%FC.S0<%FC.V<%FC.S1
%FC.S1<%FC.V
State %Q0.1 1 0 selected using
0 State %Q0.2 1 >
and
<
.
¨
and
^ 0
0
, and states 0 or 1 are
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3/6
3.5
Configuration of the outputs (4. Out)
Application configuration m 44444 3
This function is used to select PLC output %Q0.0 :
• As a discrete output : Normal (the default choice)
• As a pulse width modulated output %PWM
• As a pulse generator output %PLS.
Choosing %PWM using
>
selects output %Q0.0 as a pulse width modulated output and accesses the
1
¨ using
-
TB: 1s
>
and
2 Access the preset %PWM.P using the numeric keys.
<
.
%PWM.P: 0
¨
and enter a preset value of 0 to 32767 using
1
3
4
3 Confirm the selections with z
.
Choosing %PLS using
>
selects output %Q0.0 as a pulse generator output and accesses the configuration of ¨ using
2 Access the preset %PLS.P using
¨
and enter a preset value of 0 to 32767 using the numeric keys.
Access the PLS Counting option (where output %Q0.0
is fed back to input %I0.0) using
Yes) or N (for No) with and
and select a time base of 0.1ms, 10ms, or 1s
<
.
and .
5 Confirm the selections with
and
and select Y (for
.
%Q0.0: %PLS
TB: 1s
%PLS.P: 32767
Adjust: N
TB: 1s
%PLS.P: 32767
PLS Counting: N
Adjust: N z
.
¨
and select Y (for Yes) or N (for No) with
>
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3/7
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3.6
Entering constants (5 %KW)
• Using
¨¨¨¨¨ and
^^^^^
.
• By pressing
ÈÈÈÈÈ
, entering the number for the constant from 0 to 63 and confirming with z
.
example,
# ·500 that is entered must be confirmed with z
.
#
(for
for 16#F500,
The default is 0.
m 55555
-
%KW31 0
%KW32 0
%KW33 0
3.7
m 6
accesses the screen for confirming that the application configuration is to be cleared. This function returns all the configuration parameters to the default
E executes the clear.
cancels the clear request.
Enter variable m66666
Clear
Conf?
Y:Enter N:Esc
3.8
Direct access to the configuration from the program editor
For function blocks
When a function block is selected by the cursor in the program editor, the configuration editor is accessed directly on the configuration screen for this block. The configuration of the block is then identical to that described in Section 3.3, operations 1 and 2 are no longer necessary.
For constants
When a constant is selected by the cursor in the program editor, the configuration editor is accessed directly on the constants configuration screen. Entering constants is then identical to the process described in Section 3.6.
___________________________________________________________________________
3/8
Application configuration 3
3.9
Terminal port configuration (7 Com)
The terminal port operating modes are accessed by selecting editor .
ASCII mode (select using
>
)
This screen allows you to : m7
in the Cnf
COM Port: ASCII
• select the transmission speed on the terminal link as
Bits/s: 9600
1200, 2400, 4800, 9600 bits/s.
Time Out: 50
• select the format (7 or 8 data bits, 1 or 2 stop bits).
Data Bit: 8
• select Time-Out for the master device (30 to 255 characters).
This field is specific to UNI-TELWAY mode.
• select the parity type (even, odd or no parity).
Time Out:
Data Bit:
Parity:
Stop Bit:
50
8
None
2 UNI-TELWAY master mode
The configuration screen is the same as that used for
ASCII mode.
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UNI-TELWAY slave mode
This screen allows you to :
• select the transmission speed on the terminal link as
1200, 2400, 4800, 9600 bits/s.
• enter the address number of the slave device (1 to 97,
4 by default).
• select the format (7 or 8 data bits, 1 or 2 stop bits).
• enter the Time-Out for the master device (30 to 255 characters).
• select the parity type (even, odd or no parity).
z
^
is used.
confirms the selections.
¨¨¨¨¨ or
COM Port:
Bits/s:
UTLW
9600
Slave Addr: 4
Time Out: 50
Time Out:
Data Bit:
Parity:
Stop Bit:
50
8
None
2
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3/9
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___________________________________________________________________________
3/10
Programming
4.1
General pressing e 2
.
The program is validated and stored after each line has been confirmed with
The menu, which is accessed by pressing functions.
m z
.
, offers additional programming help
4
Program Editor
• 0 Inf : Enter the application name, password and data (see Section 4.7)
• 1 Trf : Transfer (see Section 6)
• 2 Clr : Clear the configuration and/or the program (see Section 4.6)
• 3 Dgn : Diagnostics checks the syntax of the program (see Section 4.5)
• 5 Sch : Search/Replace (see Section 4.4)
• 6 Sel : Select program lines (see Section 4.3)
• 7 Pst : Paste program lines (see Section 4.3)
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4.2
Creating a program
Initially, when the program editor is accessed, the terminal displays a blank screen containing only line numbers.
• The instruction key (for example,
(for example,
3
)
I l
)
)
• Confirming the program line with z
.
The cursor then moves to the next line.
-
001
002 l I 3z
000 LD %I0.3
-
002
003
Note : The instructions and operands are grouped on the same keys, the instructions are in yellow and the operands are in white. The terminal automatically selects an instruction or an operand, depending on whether the cursor is positioned on an instruction area or an operand area.
___________________________________________________________________________
4/1
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Entering instructions using a modifier
The instructions LDN, LDR, JMPC, etc are made up of a
000 LDR %I0.2
basic instruction (for example, LD) followed by a modifier
001 ANDN %M1
(for example, N). An instruction of this kind is programmed
002 AND(N %I0.3
by pressing the modifier key after pressing the instruction l v
R I 2 z z f
for instructions (functions) or
for variables. Fun and Var are on the same key and the terminal automatically chooses between them depending on whether the cursor is positioned on an instruction area or an operand area.
Access Principle :
• Direct access : f or v
+ Number + z
• Indirect access : h f or v
+ z
provides access to the instruction or variable screens (see screens below). There are 2 ways of doing this :
- Select the number
- Move the cursor onto the chosen instruction or variable, then press
>
and h < to display the first or last elements in the list.
z
,
Boolean instructions Comparison instructions
-
2 RET
3 I
4 O
5 U
6 MCS
7 MCR
8
-
10 #D
11 =*=P
Arithmetic and logic instructions
-
2 <> 6 >=
3 <
4 >
-
2 + 6 REM
3 - 7 INC
4 * 8 DEC
Variables
-
10 OR 14 SHR
11 XOR 15 ROL
12 NOT 16 ROR
17 BTI 21 READ
18 ITB
19 SQRT
20 EXCH
-
2 %QW 6 %PLS
3 %SBR 7 %PWM
4 %SC 8 %MSG
4/2
-
10 %R 14 F
11 %DR 15 Q
-
14 F 18 TH1
15 Q
16 R
Programming 4
Another possibility : entering its number after pressing
Example : f1z f
or v
. The list is used to directly access the SR instruction.
-
001
-
001
Numeric instructions
1
Press then
[
(or Boolean instruction LD, AND, or OR for comparison instructions), Fun is automatically displayed.
2 Press z
and choose instructions on the screens and press z
), the instruction is already visible and the cursor points to the first operand field.
3
Var function, press following operands.
4 Confirm by pressing
¨
to access and enter the
.
000 [
-
001
002
-
2 + 6 REM
3 - 7 INC
4 * 8 DEC
-
:= ...
002
Example (see opposite screen) :
µ
µ z
0 0
¨ 000 [ %MW10
:= %MW0
002 _
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4/3
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4.3
Modifying a program
4.3-1 Accessing a program line
-
-
-
-
^
,
¨
to move line by line
to go to the beginning of the program
to go to the end of the program
<line no.>
to access a given line number (see Section 4.4).
4.3-2 Modifying a program line
• Move the cursor to the required line.
>
and
<
.
- Changing the number of an operand does not modify either the instruction or the operand type.
- Modifying the op type does not modify the instruction.
- However, modifying the instruction modifies the complete line.
confirmed with E z
.
be cancelled (before confirming with z
).
•
•
•
Example (see screens to the right) : replacing operand
•
• h ^
to go to the beginning of the program
to go to line 001
five times to move to address 2
to change the address
to confirm.
-
011 LD %M10
012 AND %I0.4
h ^
-
001 LDN %I0.2
002 AND(N %I0.5
¨
and 5 times
>
000 BLK %TM0
-
002 AND(N %I0.5
3 z
000 BLK %TM0
001 LDN %I0.3
002 AND(N %I0.5
003 ORF %I0.6
___________________________________________________________________________
4/4
Programming 4
4.3-3 Inserting a program line
• Move the cursor to the line which will follow the line to
•
•
•
î
inserts a blank line, in which an instruction and its confirms the new program line and inserts a new blank line in which it is possible to enter a new instruction.
ends the insertion operation.
Example (see screens to the right) : insert instruction
AND %MO into line 002.
•
•
•
•
• aM0 to confirm to enter an instruction to end the insert operation.
°
2
000 BLK %TM0
001 LDN %10.2
î
000 BLK %TM0
-
a z
M0
001 LDN %I0.2
002 AND %M0
003 E
001 LDN %10.2
002 AND %M01
-
004 ORF %10.6
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4.3-4 Deleting a program line
• h d
deletes the line, all the program lines are then moved upwards.
Note : To undo a delete and restore a previous entry, press
E
.
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4/5
4.3-5 Copying, deleting and moving a set of lines
• Select a set of lines : Sel function
• Paste a set of lines : Pst function m 6
These functions are only available in offline mode.
Note: In the next 2 paragraphs, the circled numbers (
4
) refer to the procedures that follow.
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•
Selecting a set of program lines
1 m 6
starts the Sel function (select the program lines)
• Move the cursor to the last line to be selected. Each
• selected line is marked with an asterisk.
m 7
4
starts the Pst function : Paste the program lines previously selected, the rest of the program is shifted downwards.
000 LDR %10.2
001*AND %10.3
002*ORF %10.4
003*AND %10.5
1 Select the lines to be copied
2 Confirm with
3 Move to the line number where the lines are to be pasted
4
Paste the lines
1 Select the set of lines to be cut
2 Cut with hd
1 Select the lines to be copied
2 Cut with
3 Move to the line number where the lines are to be pasted
4 Paste the lines
___________________________________________________________________________
4/6
4.4
Search/Replace (5 Sch) 5
. This function offers the following menu :
Function : Search m 5
Programming mmmmm 55555 4
• 1 Nxt : continue the current search for the next occurrence
• 2 Pos : search for a line, a label or a subroutine
• 3 Var : search for a variable
• 4 Ins : search for an instruction/variable combination
• 5 Rep : replace
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The first line of the screen is used to enter the number of the line, the label or the subroutine (depending on the ¨
accesses the type of search required :
• Line
• Label z .
starts the search. The cursor then moves to the line searched for.
>
and z accesses the search screen again.
returns to the program display screen.
m 5 2
-
Search : Line
-
Search : Label
-
Search : SR
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4/7
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4.4-2 Search for a variable in the program : (3 Var) z
starts the search. The cursor then moves to the variable searched for.
m 51
continues the search to the next variable. This search can be continued to the end of the program.
The "X"s under the name of the variable indicate that the character above it is included in the search. The absence of an X indicates that the character is not included.
To delete or replace an "X" character, use
îd
.
m
Search Var
-
XXXXXXXXXX
Search Var
%Q1.1
55555 3
4.4-3 Search for an instruction in the program : (4 Ins) m 55555 4
Search Inst
Enter the instruction to be searched for (or move in the z
starts the search. The cursor moves to the instruction 51
continues the search to the next instruction. This search can be continued to the end of the program.
The "X"s under the name of the instruction indicate that the character above it is included in the search. The absence of an X indicates that the character is not included.
are searched for.
To delete or replace an "X" character, use
îd
.
-
-
Search Inst
-
XX
___________________________________________________________________________
4/8
Programming
4.4.4
Replacing a variable in the program : (5 Rep) m555555
4
Enter the variable to be replaced (the last variable searched for appears by default).
Enter the replacement variable (accessed using
¨¨¨¨¨
).
Replace:
by:
Next
Select the replace option :
• Next to search for the next variable and replace it.
z
¨¨¨¨¨
and
>
.
starts the replacement with the first variable searched for which has been found or replaces it throughout the
Replace:
%I0.3
entire program, accordingly.
-
All
Note :
• This function cannot be accessed when the PLC is in RUN mode.
• Only variables of the same type can be replaced.
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4/9
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4.5
Program Diagnostics (3 Dgn) m 3
To ensure a valid program exists, checks (syntax diagnostics) are performed by the terminal whenever a program is created or modified. The time needed to perform the check varies depending on the size of the program and the instruction used.
4.5-1 On-line or off-line mode with the PLC stopped
• a request from the user m3
• an application transfer request
• a request to exit the program editor e thus enabling the program to be checked in a single operation.
launched on a request from the user
(Dgn)
(Trf) m3
(Dgn).
The diagnostics operation is launched as described above, 000 LDR %I0.2
and the message "Diagnostics_" is displayed on the 4th
-
002 ORF %I0.4
line of the screen.
Diagnostics_
At the end of diagnostics:
If no error is detected, the screen goes to the requested
000 LDR %I0.2
screen. If the diagnostics operation has been launched by
3 Dgn, the message "Diagnostics OK" is displayed
If an error is detected:
• the message "Diagnostics n" is displayed, where n is the error number (see list in appendix A4, section G) screen.
Press z
to continue with the action initially requested, for example:
• if the initial request was 3 Dgn, to return to the program
-
002 ORF %I0.4
Diagnostics OK
010 ANDN %I0.3
011 AND %M5
012)
Diagnostics 7 editor and make any necessary corrections
• if the initial request was 1 Trf, to access backup and transfer of the application
• if the initial request was Edit, to return to the editor selection.
Note: If the diagnostic program was launched by 1 Trf or Edit,
E can be used to abort the requested action and return the user to the program editor to make any necessary corrections.
4.5-2 On-line mode with the PLC running
The program can be executed. As modifications to the program which are authorized while the PLC is running cannot result in a non-executable program, the diagnostics are therefore always correct.
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4/10
4.6
Clearing an application (2 Clr)
This operation clears the terminal memory (FTX mode) or the PLC memory (TSX mode) :
• only the program, >
"Prog" and clearing the program and the configuration :
>
and
is used to access the use of MCR/MCS master
and
<
select between clearing the program
<
select between :
• Y using MCR/MCS instructions
• N not using MCR/MCS instructions
Programming m 2 4
Clear:
-
Prog + Conf
TSX07 30/31
MCR: Y
Note :
• Selecting N (not using MCR/MCS instructions) gives a scan time of 1.5 to 4 times z z faster (see Appendix A.5, Part G).
requests the clear.
and
<
select between Y (Yes) and N (No).
starts the clear and returns to program display.
Clear:
Prog + Conf
Note : This function is only valid when the PLC is in STOP.
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___________________________________________________________________________
4/11
4.7
Information (0 Inf)
This screen allows :
• Entry of the application name
• Creation and entry of a password
• Display of information on the application.
m 2
Pass:’ ’
-
Exec:N MST:N
Free 6170
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4.7-1 Entry of the application name
•
•
00000
• and,
to
to
,
99999
:::::
(access to help from
, .
hhhhh
)
Pass:’ ’
-
Exec:N MST:N
Free 6172
4.7-2 Password
Role of the password :
The password is used to protect applications from being modified or damaged. When an application contains a password, access by any terminal user who has not entered this password will be limited to those services which only allow the application to be viewed and data to be adjusted.
The password is requested each time the terminal is initialized and each time the terminal changes between FTX/TSX modes.
Creating a password :
If no password has been created, the password field
•
•
^^^^^
ÆÆÆÆÆ
accesses password creation.
to
to
·····
(access to help from hhhhh
).
-
App:’....FAB5’
Exec:N MST:N
Free 6172
___________________________________________________________________________
4/12
Programming 4
Entering the password :
When the terminal is online, initialized or following a change from offline to online mode, the terminal automatically requests entry of the password.
password. In both cases z
accesses the main editor screen.
Any further entry can be performed from the data editor screen.
^ -
App: ’....FAB5’
Exec:N MST:N
Free 6172
^ -
App: ’....FAB5’
Exec:N MST:N
Free 6172
Comment : Entering a password incorrectly is equivalent to having entered no password. When the correct password is entered and confirmed, it will re-appear on screen highlighted each time the data editor screen is accessed.
confirm it with z
. Then access the data editor screen again (the old password will appear highlighted) and enter the new password.
C
4.7-3 Information displayed
Information displayed :
• 3rd line of the screen :
- Exec :
Y = application executable
N = application not executable
- MST : shows when the program has been stored in
PLC EEPROM memory using "automatic loading" (see
Section 6).
• 4th line of the screen : shows the size of available application memory in bytes.
Pass:’????????’
-
Exec:N MST:N
Free 6172
___________________________________________________________________________
4/13
C
___________________________________________________________________________
4/14
Configuring the schedule blocks (RTC)
5.1
Configuring the schedule blocks (RTC) mmmmm 33333
to enter TSX mode
to access the schedule blocks (RTC) function
Configuring a schedule block (RTC)
5
6
7
8
9
&
3
4
1 Enter the number of the schedule block (RTC) to be
2
¨¨¨¨¨
Accesses the output to be activated, this output can be :
- a discrete output : press ¨¨¨¨¨
MMMMM
QQQQQ
and enter the address
and enter the number.
Selects the day (1 to 31) activation starts.
or or
¨¨¨¨¨
¨¨¨¨¨ ddddd
¨¨¨¨¨
<<<<<
<<<<<
Selects the month activation starts using
.
Selects the day (1 to 31) activation stops.
Selects the month activation stops, using
.
Selects the days for activation in the week.
move the cursor.
>>>>>
>>>>>
are used to select or not select the day
(M = Monday, T=Tuesday....S=Sunday). zzzzz
Confirms block configuration.
>>>>>
or
Selects activation start time (in 24-hour format).
Selects activation stop time (in 24-hour format).
RTC: 5 Q:
1 Jan->31 Dec
MTWTFSS
00:00->23:59
RTC: 5 Q:%Q0.1
4 Apr->31 May
MTWTF..
10:00->13:00
Example :
Output %Q0.1 is activated from 10h to 13h on Monday, Tuesday, Wednesday,
Thursday and Friday from the 4 April to the 30 May.
After setting the clock, the PLC needs only to be set to RUN mode for the schedule blocks (RTC) to fulfill their function; that is, to turn on outputs and/or set internal memory bits (without any program control logic).
C
___________________________________________________________________________
5/1
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___________________________________________________________________________
5/2
6.1
General m 1
to access the program editor
to access the Transfer function.
6
Storing and transferring applications
Transfer App
Source: TSX
Dest: FTX
Description of memory areas :
• FTX terminal RAM, corresponds to the working memory in offline mode. The contents of this memory are maintained for one hour after the terminal is switched off.
• FLASH, permanent memory area of the terminal where the current application can be stored.
• CARD, memory card where several applications can be stored (archived).
• TSX PLC RAM, corresponds to the working area in online mode and the area in which the program will be executed. This area is battery protected but it may become corrupted (battery run down, transfer error, etc.)
• EEPROM, permanent memory in which the application can be stored. An option
(MST) enables the PLC RAM to be reloaded automatically with the contents of the EEPROM whenever it differs from the contents of the EEPROM memory.
TSX Nano PLC
4
RAM FTX
2
RAM TSX
3
1
FLASH
CARD
6
5 EEPROM
FTX 117 terminal
C
Exchange roles :
1 To save (retrieve) an application during design in offline mode, see Section 6.3
2 To save (retrieve) an application during design in online mode, see Section 6.4
3 To transfer an application for debugging in online mode, see Section 6.5
4 To archive (retrieve) an application after debugging, see Section 6.4
5 To archive an application after debugging including the possibility of automatic reloading, see Section 6.6
___________________________________________________________________________
6/1
C
6.2
Using the Transfer function
3
4
1
2
>>>>>
>>>>>
>>>>>
or
<<<<<
select between the transfer and
accesses the source (the memory where the
or
accesses the destination (the memory to which
or
<<<<<
<<<<<
select the source.
select the destination.
starts the transfer.
Transfer App
Source: TSX
Dest: FTX
Various options are available, depending on the type of transfer performed (see the relevant section).
Note :
• No transfer to the PLC (TSX destination) can take place unless the terminal is online (FTX/TSX switch on TSX) and the PLC is at STOP.
• In the event of communications failure during a transfer to the PLC, the system requires the user to clear the memory and retransfer the program. The PLC cannot be placed in RUN until the program has been cleared and then retransferred.
Comparison function : This function checks whether the applications located on two different media (Source and
Destination) are identical. Operation 4 starts the comparison. If the two applications are identical the message "compared OK" appears, otherwise "compared
NOK" is displayed.
Compare App
Source: TSX
Dest: FTX
Compare OK
6.3
Saving/retrieving an application in FLASH memory
Main use : Saving an application being entered with the terminal in offline mode.
• To save :
Source : FTX (1)
Destination : FLASH
• To retrieve :
Source : FLASH
Destination : FTX (1)
Transfer App
Source: FTX
Dest: FLASH
(1) TSX <--> FLASH memory transfer is also possible.
___________________________________________________________________________
6/2
Storing and transferring applications 6
6.4
Saving/retrieving an application on a memory card
Main use : Saving or retrieving an application with the terminal in offline or online mode.
• To save :
Source : FTX or TSX
Destination : Card
• To retrieve :
Source : Card
4
5
6
Destination : FTX or TSX zzzzz
accesses the directory of the card (1), select the
confirms the selection.
starts the transfer.
¨¨¨¨¨
,
^^^^^
,
>>>>>
or
<<<<<
.
Or enter the archive number directly, transfer.
zzzzz
starts the
Transfer App
Source: FTX
Dest: Card
ARCH:
ARCH0 p ARCH4 p
-
ARCH2 p ARCH6
ARCH3 p ARCH7
A "p" beside each archive name indicates that an application has already been saved. Saving an application to an archive which has already been used overwrites it.
(1) A "Card error" message followed by a code can appear in the following cases :
Transfer App
Source: FTX
Dest: Card
Card Error 3
3
4
5
Code Cause
1 no card has been inserted in the terminal
2 the card type has not been recognized
6
53 non-formatted card (see clearing below) the card is not compatible the card is write-protected the card inserted is not a Telemecanique card non-formatted card (see clearing below)
54 processing error
Clearing a card zzzzz
starts clearing
cancels the clearing operation zzzzz
Clear Card?
Y:Enter N:Esc
Comment : The archive number offered by a card depends on its size (in Kwords of
16 bits), it is given in the following formula :
Maximum archive slot number = Size / 4 - 2
___________________________________________________________________________
6/3
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C
6.5
Transferring applications from the terminal to the PLC
Main use : For transferring a program, which has been entered on the terminal in offline mode, to the PLC. See also the Note in Section 6.2.
• For a Terminal -> PLC transfer :
Source : FTX
Destination : TSX
Transfer App
Source: FTX
• For a PLC -> Terminal transfer :
Dest: TSX
4
5
Source : TSX zzzzz
starts the transfer.
Prot: N
Destination : FTX
¨¨¨¨¨
selects write-protection of the program using
>>>>>
or
<<<<<
.
Access denied
When the application is write-protected, the program and
E clear application after two confirmations return to initial screen.
Clear App?
Y:Enter N:Esc
6.6
Saving/retrieving an application in EEPROM memory
Main use : Saving a debugged application (with the option of automatic loading into the
TSX RAM memory on power-up). Note: The PLC outputs must not be activated during a TSX --> EEPROM transfer.
!
CAUTION
UNEXPECTED EQUIPMENT OPERATION
If the MST parameter is set to Y(es), then on subsequent power up, the contents of EEPROM memory will automatically be loaded into PLC RAM, and the PLC will go into RUN. The PLC will go into RUN regardless of the PLC state before power was cycled. Use caution with this feature; safeguards should be built into the user's application program in the event the PLC power is interrupted and restored.
Failure to observe this precaution can result in equipment damage or personal injury.
6/4
• For a PLC RAM -> EEPROM transfer :
Source : TSX
Destination : EEPROM
Transfer App
Source: TSX
Dest: EEPROM
• For an EEPROM -> PLC RAM transfer :
4
5
Source : EEPROM
Destination : TSX
¨¨¨¨¨
to select write-protection (Prot) of the application using
to select automatic loading (MST) using
starts the transfer.
>>>>>
or
Prot: N MST: Y
<<<<<
.
>>>>>
or
<<<<<
.
6
___________________________________________________________________________
7
Starting the application
7.1
General
The TSX PLC editor is used to start the application in the PLC. The program must, to TSX).
The mode is accessed using eeeee 11111
.
It offers the following options for starting
Reference of connected the application : PLC status :
PLC
RUN or STOP
TSX PLC Editor
• 0 Inf Information on PLC status
• 1 Run/Stop
TSX: STOP
App=Exec
TSX 07 31-16
-
1Run 2Ini 3Rtc
• 2 Ini Initialize the application
• 3 Rtc Program schedule blocks (see Section 5)
Application status :
Executable, not executable, or not recognized
• 4 Clk Set the internal clock.
7.2
Setting the time and date (4 Clk) m4
This option sets the time and date in the PLC. This operation must be performed when
• Select the day of the week using
• Access selection of the day using day using the numeric keypad.
• Access selection of the month using the month using or .
• Access selection of the year using
• Access selection of the time using
• Confirm the setting using zzzzz
.
>>>>>
¨¨¨¨¨
or
<<<<<
.
, and enter the
, and select
-
Fr 10 Mar1994
17:26:48
STP= 2 Jan 1996
2 17:07:23
, and enter it using the numeric keypad.
, and enter it using the numeric keypad.
Note : The lower two lines of the screen display the last date and time the PLC stopped.
A code shows the reason for the stop :
• 1= RUN changed to STOP by the terminal
• 2= stop on a software fault (watchdog timeout)
• 4= power outage
• 5= stop on hardware fault
___________________________________________________________________________
7/1
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C
7.3
Initialize (2 Ini) m 2
This command initializes the PLC application. It should be used before the application is first set to RUN or after every modification of the application. The zzzzz
22222
accesses the initialization confirmation
starts initialization.
TSX->Ini?
Y:Enter N:Esc m 1
7.4
mmmmm
After
11111 zzzzz
accesses the PLC RUN confirmation screen
starts PLC RUN (or STOP) mode.
is pressed, the PLC state (RUN or STOP) will be displayed on the PLC operations screen.
TSX->RUN?
Y:Enter N:Esc
It is also possible to check the operating state of the PLC on the front panel :
• The RUN indicator lamp flashes when the PLC is in
STOP.
• The RUN indicator lamp is lit continuously when the
PLC is in RUN.
• The RUN indicator lamp is not lit and the error indicator lamp is flashing.
TSX : RUN
APP : Exec
TSX 07 31-16
1Run 2Ini 3Rtcr
Note : If the RUN or STOP command does not take effect, check that an input has not been configured to control the PLC RUN/STOP command. In this case the input takes priority over the terminal.
7.5
Information (0 Inf) m 0
This screen gives, in addition to the information on the TSX editor initial screen, information on the
PLC status :
• OK : if no hardware fault is detected
• ! : if a hardware fault is detected
TSX : RUN
APP : Exec
TSX 07 31-16
Mod0=OK
___________________________________________________________________________
7/2
8
Debugging
8.1
General
The FTX 117 terminal has a set of functions for debugging applications in Instruction List language. They are :
• Dynamic display of I/O state, of internal bits and variable values in the required base
(decimal, hexadecimal or ASCII).
• Modification of variable values and bit state.
• Forcing of I/O bits.
• Limited program modification in RUN mode.
h>
.
It displays program variable data. Select m
to see the Dbg menu : m 4
or
C
Debug function Dbg
• 0 Inf : Information (see Section 7.5)
• 1 Trf : Program transfer (see Section 6)
• 2 Cnv : Select display base
• 3 Frc : Force I/O
• 4 Prg : Return to programming screen
8.2
Dynamic program display
When the PLC is in RUN mode, the program screen displays the state of the Boolean variables by a rectangle placed in front of each of them :
• empty rectangle = state 0
• filled rectangle = state 1.
000 LD %I0.2
001 ANDN %M1
002 OR %I0.3
003 ST %Q0.4
___________________________________________________________________________
8/1
The debug screen displays the state of the Boolean variables and the numeric values contained in each program line. It is displayed as an extension to the right of the program screen.
C
-
001 ANDN %M1
002 OR %I0.3
003 OR %I0.4
Program screen m 2
and
¨ is used to select the display base.
are used to select the base and confirms the selection.
z
-
%M1 0
%I0.3 1
%Q0.4 1
Debug screen
-
Hex 16#346
Dec 838
Bin 00000011
Ascii ' F '
The numeric variables on the screen are then displayed
(1) or m4
.
-
%Q0.4 1
%MW0 16#346
%KW10 16#F00
8.3
Modification and forcing
The debug screen is used to modify :
• bit states
• word values.
-
%Q0.4 1
Note : In RUN, program execution takes precedence, so that if an instruction determines the bit state or writes the variable, the modifications made using the terminal are overwritten by the program logic.
>
to access the value field and enter the value (number)
to confirm an entry.
-
%KW10 200
___________________________________________________________________________
8/2
Debugging
8
• m3
accesses the I/O forcing screen (%I and %Q).
• Select forcing option Y (yes) using
>
or
<
.
When option Y is selected, the screen offers the forcing of each of the I/O.
• Select inputs or outputs using
^ and
¨
and cursor, using z
>
or
< d
executes the forcing. The I/O bits which have been forced are marked with the letter "f" in front of the
.
variable in the debug screen.
Forcing Y
01234567
%I0.0 .......
%Q0.0 ........
Forcing Y
01234567
%I0.0 .1.0....
%Q0.0 .1.0....
f%I0.3 1 f%Q0.4 1
%MW0 100
%KW10 200
Note :
• Forcings take precedence over the writing of I/O by the program.
• Forcing of all bits is cancelled after a cold restart.
C
___________________________________________________________________________
8/3
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8.4
Modifying the program in RUN mode
The program editor allows the program to be modified when the PLC is in RUN mode.
!
WARNING
UNEXPECTED EQUIPMENT OPERATION
For obvious safety reasons, it is advisable to program a PLC in STOP.
It is possible, however, to program a PLC which is in RUN mode so that program modifications not requiring the application to be stopped can be performed.
However, these modifications remain the responsibility of the user.
Before any modifications are performed, certain conditions for programming a
PLC while running must be fulfilled. It is essential to know the consequences of the modifications on the application, and to take any necessary actions to determine what these are.
Failure to observe this precaution can result in equipment damage, severe personal injury, or or death.
Modifying in RUN mode
The process for modifying in RUN mode is identical to that for programming in RUN mode. The modification takes effect as soon as the current entry is confirmed.
Restrictions
The following table shows the restrictions on use and on modification when the PLC is in RUN mode :
Mode/function
Configuration
Programming
Access
Access to display only
All modifications/insertions/cancellations of instructions are permitted, except for instructions which modify the structure of the program :
• parentheses
• Grafcet instructions
• labels %Li: and SRi:
• jump : JMP and SR subroutine call
• instructions that follow instructions %Li:, SRi:, -*-i and
=*=i
• block instructions: BLK, OUT_BLK, END_BLK
• instructions MPS, MPP, MRD
The following functions are not active :
• clear
• search and replace
• program transfer to EEPROM
___________________________________________________________________________
8/4
9
Data Editor
9.1
General
The data editor is accessed using e3 on the main editor screen. The data editor can be accessed on entering the mode, the objects displayed by default are those selected by the cursor in the program (contextual access).
The data editor offers the following debug help functions which are accessed from the sub-menu :
Data Editor Dat
• 0 Inf : Information (see Section 4.7)
• 1 Trf : Transfer of data tables
• 2 Cnv : Selection of the display base
• 3 Frc : Forcing (see Debug Function, Section 8)
• 4 Dat : Return to current adjustment screen
• 5 Dt1 : Creation/display of data table no. 1
• 6 Dt2 : Creation/display of data table no. 2
• 7 Dt3 : Creation/display of data table no. 3
• 8 Dt4 : Creation/display of data table no. 4
• 9 Clr : Re-initialization of the data tables
9.2
Principle for accessing objects to be adjusted
Whatever objects are to be adjusted, the same principle for accessing the object is used :
1 example,
I
µ
†
, etc) or v z
for
2 variables not on the keypad.
z
to display the list of variables.
accessing the data editor using e3
. The list corresponding to the selected object will be displayed.
5
∇
∇
I z
-
Err=0 .........
.........
%Q0.0
___________________________________________________________________________
9/1
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C
9.3
Objects which can be accessed via the data editor
The notations used are : R for read, W or write, F for forcing.
Type
Bit input bits
Designation
%Ii.j
I
R, W, F objects output bits %Qi.j
Word objects internal bits system bits
Grafcet step bits word extract bits internal words constant words system words input words
%Mi
%Si
%Xi
%MWi
%KWi
%SWi
%IWi.j
µ
Q
Ò
Possibilities
R, W, F
R, W
R, W (1)
R none
R, W
R
R, W (1)
R, W
R, W output words %QWi.j
Standard Timer function • preset block objects
• current value
• output
Counter
• preset
• current value
• counter empty output
• preset output
Special function block objects
%TMi
%TMi.P
%TMi.V
%TMi.Q
%Ci
%Ci.P
%Ci.V
• counter full output
LIFO/FIFO register blk
• input word
• output word
• register empty output
%Ci.E
%Ci.D
%Ci.F
%Ri
%Ri.I
%Ri.O
%Ri.E
• register full output
Drum controller
%Ri.F
%DRi
Pulse width modulation %PWM
• preset %PWM.P
• percentage
Pulse generator
• preset
• no. of pulses
%PWM.R
%PLS
%PLS.P
%PLS.N
• current output
• ended output
Fast counter
%PLS.Q
%PLS.D
%FC
• preset
• current value
%FC.P
%FC.V
• value of threshold 0 and 1 %FC.S0 and 1
• full (overflow output) %FC.F
• threshold bit
Shift bit register
Step counter
Message
%FC.TH0 and 1
%SBRi
%SCi
%MSG
C v10 v11 R, W
R
R none (3) v5
R, W (2)
R, W
R
R, W (2)
R, W
R
R
R
R, W
R
R, W
R, W (2)
R, W
R
R
R, W
R, W v4
R, W
R
R none none none
(1) Certain bits and system words can be written
(2) Can be written if adjust option is selected at configuration
(3) Can be accessed during creation and display of data tables (functions Dt1 to Dt4)
___________________________________________________________________________
9/2
Data Editor
9
9.4
Display and modification of Boolean variables
I/O :
The upper part of the screen displays input state and the %I0.0 ......%I0.8
lower part of the screen displays output state :
• a white rectangle = state 0
-
Err=0 ...f.....
• a black rectangle = state 1
The center lines give information on each I/O :
• ! = fault on an I/O point
• f= forcing
..!...f..
%Q0.0
Example : output %Q0.2 faulty, input %I0.3 and output
%Q0.6 forced.
^
and
¨
select between inputs and outputs.
0
and
1
are used to write the I/O. I/O forcing is accessed using m3
(see Section 8.3).
%Q0.0 ....%Q0.8
>
and
<
>
.
select the address of the inputs or the outputs.
When the Err bit is at 1, it indicates that either the PLC or the I/O extension is faulty.
Other Boolean variables
In the case of other Boolean variables (example : internal bits, system bits, etc).
^
.
and
1
are used to write the variables.
¨
and
-
%M2 %M3
%M4 %M5
%M6 %M7
C
9.5
Display and modification of numeric variables
For numeric variables (example : internal words, system words, etc).
¨
.
z
.
^
and
selects the display base (decimal, hexadecimal, binary, ASCII) (see Section 8.2). In binary display, the values appear on 2 lines : MSB on the 1st line,
LSB on the 2nd line.
-
%MW11 100
%MW12 200
%MW13 200
-
01100100
%MW11 00000000
01100100
___________________________________________________________________________
9/3
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9.6
Display and modification of function blocks
The screen displays the parameters and the outputs of the selected function block.
¨
.
value and confirm using
^
and z
. Variables followed by ":" can be modified, those followed by "=" cannot be modified.
Note : The preset values can only be modified if the Adjust option is selected (set to "Y") when the block is configured.
-
%C5.P: 100
%C5.V: 0
%C5.E= 0
-
%C5.E= 0
%C5.D= 1
%C5.F= 0
9.7
Display of Grafcet steps
The screen shows the active steps. These are indicated by "X". The 62 steps are displayed in the form of a table :
• The first line of the screen shows the units
• The first column of the screen shows the tens.
The screen to the right shows steps 0 to 29, with steps 1,
2 and 16 active.
¨ and
^
access other lines of the table.
0123456789 %X25
0 XX
1 X
0123456789 %X43
3
-
5
___________________________________________________________________________
9/4
Data Editor 9
9.8
Creation and display of data tables (5 Dt1 through 8 Dt4)
The data table functions Dt1 through Dt4 are used to display the values of an application's variables. They can be used to create up to 4 lists of 16 variables of different types, as well as to modify the values associated with these variables. These variables are animated when the FTX117 terminal is online.
The lists can be stored in the terminal internal Flash memory or on the memory card (see
Section 9.10).
The data table functions can be accessed both when the terminal is online (TSX) and offline (FTX). When offline, it is also possible to allocate values to the variables, and these values will be assigned to the PLC program variables when the data tables are m567
or
8 accesses the entry of table 1 (2, 3, or 4).
List N 1
%I0.2 1 appendices in Part G) and confirmed with z
.
%C1.F 1
%M13 0 confirm with z
.
using
^
and
¨
or, to go to the top or bottom of the
and h ¨
.
accesses selection of the display base
(Decimal, hexadecimal, binary, ASCII) (see Section 8.2) variable fields
%SW118 00000000
01100100 for the selected numeric variable.
List 1
%I0.2 1
%C1.F 1
%MW10 16#64
In binary display, values appear on 2 lines : MSB on the first line, LSB on the 2nd line.
m4
(Dat function) is used to return to the current data editor screen.
9.9
m9
(Clr function) reinitializes the 4 data tables after confirmation with z
.
___________________________________________________________________________
9/5
C
C m1
is used for archiving and retrieving application data in the data editor.
Archived data corresponds to the data tables created with the preceding Dt1 to Dt4 functions.
Archiving :
1 Select the source : FTX or TSX using
>
or
<
FTX : transfers data tables with user-defined variables.
2
3
4
5
TSX : transfers data tables with the corresponding >
or
, z
<
,.
and select the archive file number using
,
>>>>>
or
<<<<<
confirms the selection.
starts the transfer (2).
(1).
1
>
or
<
.
2 Select the FTX or TSX destination using
>
or
<
FTX : transfers data tables only (without associated values).
3
4
5
TSX : transfers data tables and replaces the zzzzz
, z
and select the archive number using
, or
confirms the selection.
starts the transfer (2).
(1).
Transfer list
Source: FTX
Dest: CARD
ARCH:
ARCH0 p ARCH4 d
-
ARCH2 d ARCH6
ARCH3 d ARCH7
Transfer list
Source: CARD
Dest: TSX
ARCH:
(1) A "d" beside each archive number shows that data has already been saved (a "p" shows that a program has already been saved). Saving data to an archive file which has already been used for data or for program storage overwrites the previous data.
(2) A "Card error" message followed by a code can appear in the cases described in
Section 6.4.
___________________________________________________________________________
9/6
__________________________________________________________ _________________
Diagnostics / Maintenance
__________________________________________________________
Contents
Troubleshooting and fault analysis
Page
1/1
1.1-1 Troubleshooting the base or peer PLC
1.1-2 Troubleshooting the I/O extension
1.1-3 Troubleshooting the base PLC, peer PLC or I/O extension
1/1
1/2
1/3
_______________________________________________________________________________
1/4
1.2-1 System bits
1.2-2 System words
1/4
1/5
A
D
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D
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Diagnostics / Maintenance Contents
Part D
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1
Troubleshooting and fault analysis
1.1
Troubleshooting using the PLC status LEDs
The user is informed about the operating mode together with any PLC operating faults by the status LEDs on the front panel.
Note :
Each time the PLC is switched on, all the LEDs are lit for a period of approximately one second corresponding to the self-test phase. Outputs are not activated.
1.1-1 Troubleshooting the base or peer PLC
LED status
RUN
LED
Meaning
PLC off or application not executable
PLC in STOP
Probable cause
PLC not powered or syntactically invalid application.
PLC in RUN
Operation OK
Required stop (control using RUN/STOP
%I0.
● input or the terminal) or stop caused by an execution fault (watchdog timeout, or use of a function which has not been implemented or is prohibited).
Normal operation.
Normal operation.
ERR
LED
I/O
LED
COM
LED
Application not executable
Internal faults
Operation OK
I/O fault
Application not present, invalid, checksum fault, watchdog timeout.
• Hardware watchdog timeout.
• Self-tests indicate a fault (Prob accessing
RAM, EEPROM or schedule block).
• Mis-wiring on extension port
Normal operation.
I/O faults :
• Outputs failed
• Sensor supply fault.
• Configuration fault.
No exchange present on extension link
Exchanges present on extension link
Exchanges present on
Modbus link
LED off LED flashing LED lit continuously
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D
D
1.1-2 Troubleshooting the I/O extension
LED status
RUN
LED
ERR
LED
Meaning
Extension off or not connected to extension link
Base PLC in STOP
(same as base PLC
LED)
Base PLC in RUN
(same as base PLC
LED)
Operation OK
Internal faults
I/O
LED
Operation OK
Extension I/O fault
COM
LED
LED off
No exchange present on extension link
Exchanges present on extension link
LED flashing
Probable cause
Extension not powered, not connected or connection error on extension connection cable.
Identical to those of base PLC.
Normal operation.
Normal operation.
• Hardware watchdog timeout.
• Self-tests show a fault.
• Mis-wiring on the extension port
Normal operation.
I/O faults :
• Outputs failed
• Sensor supply fault.
LED lit continuously
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Troubleshooting and fault analysis 1
1.1-3 Troubleshooting the I/O of the base PLC, peer PLC or I/O extension
LED status
LED
I0 to I13
Meaning
Input not active
Probable cause
Normal operation if sensor not conducting.
Input active Normal operation if sensor is conducting
LED
O0 to O9
Output not active Normal operation if output not activated.
Output active Normal operation if output activated.
D
LED off LED lit continuously
If LEDs I5 (TSX Nano 10 I/0), I8 (TSX Nano 16 I/0) or I13 (TSX Nano 24 I/0) are flashing
(series of 5 short flashes every second), the memory display mode is enabled. (1)
LEDs I0 to I7 and O0 to O7 show state 0 (off) or 1 (lit) of internal bits %M112 to %M127.
I3
I4
I5
I6
I7
LED
I0
I1
I2
Meaning
%M112
%M113
%M114
%M115
%M116
%M117
%M118
%M119
Type
TSX Nano
10/16/24 I/O
TSX Nano
24 I/O
O3
O4
O5
O6
O7
LED
O0
O1
O2
Meaning
%M120
%M121
%M122
%M123
%M124
%M125
%M126
%M127
Type
TSX Nano
10/16/24 I/O
TSX Nano
24 I/O
(1) In this case, system bit %S69 is at state 1.
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1.2
Fault analysis using system bits and words
If a fault is detected, the PLC system sets a system bit or word corresponding to the error which has been detected. The application program can use this information.
The FTX 117 terminal or PL7-07 Data editor can display system bits (%S key) and system words (%SW key). See Data editor, Part C, Section 9 in the FTX 117 manual, or Part C, Section 14 of the PL7-07.
1.2-1 System bits
D
System Function bit
%S10
%S11
%S19
I/O fault
Watchdog timeout
Description
Normally at 1. It is set to state 0 when an I/O fault is detected on the base
PLC or the peer PLC (configuration fault, exchange fault, hardware fault, disconnection of protected solid state output). Bits %S118 and
%S119 indicate in which PLC the fault is and words %SW118 and
%SW119 detail the nature of the fault. (See Section 5.2) Bit %S10 is reset to state 1 when the fault is cleared.
Normally at 0, it is set to state 1 by the system when the program execution time (scan time) exceeds the maximum scan time (150 ms software watchdog). Watchdog timeout causes PLC to change to
STOP).
Scan period overrun
(periodic task)
Normally at 0, this bit is set to 1 by the system in the event of a scan period overrun (scan time greater than the period defined by the user at configuration or programmed in SW0).
This bit must be reset to 0 by the user.
%S71
%S118
%S119
Exchange via extension link
Initially set to 0. It is set to 1 when an exchange via the extension link is detected. This bit is set to 0 when no exchange is performed via the extension link. Word %SW71 in the base PLC shows the list and status of the available extensions.
I/O fault on base
PLC
I/O fault on peer PLC
Normally at 0. It is set to 1 when an I/O fault is detected on the base PLC.
Word %SW118 determines the nature of the fault. Bit %S118 is reset to 0 when the fault is cleared.
Normally at 0. It is set to 1 when an I/O fault is detected on the peer PLC.
Word %SW119 determines the nature of the fault. Bit %S119 is reset to 0 when the fault is cleared.
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Troubleshooting and fault analysis 1
1.2-2 System words
System Function word
%SW71 Devices on
PLC comm link
%SW118 Base
PLC status
%SW119 Peer
PLC status
Description
Shows the comm status of each peer PLC and I/O ext. with the base PLC : bit 1 : I/O extension bit 2 : peer PLC n
°
2 bit 3 : peer PLC n
°
3 bit 4 : peer PLC n
°
4
Bit at 0 if there is no extension or peer, no power, not wired or a fault.
Bit at 1 peer PLC present and exchange with the base PLC.
Shows faults detected on the base PLC.
bit 0 : 0= failure of one of the outputs (1) bit 3 : 0= sensor supply fault bit 8 : 0= TSX 07 internal fault or hardware fault bit 9 : 0= external fault or comm. fault bit 11 : 0= PLC performing self-tests bit 13 : 0= configuration fault
All other bits of this word are at 1 and are reserved. Thus, for a PLC which has no fault, the value of this word is : 16#FFFF.
Shows faults detected on peer PLC (this word is only used by the base PLC). The bit assignment of this word is identical to that of word
%SW118, except for : bit 13 : not significant bit 14 : peer PLC now missing although it was present at initialization
D
(1) after a shortcircuit or overload of the protected transistor outputs.
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__________________________________________________________ _________________
Application example Contents
__________________________________________________________
Part E
1 Specifications : automatic car wash
1.1 Description of the application
1.2 Application operation
1.2-1 Automatic wash cycle
1.2-2 Manual immediate stop
1.3 Graphic representation of the wash cycle
2 Hard-wired solution
2.1 Power circuit
2.2 Control circuit
3 Solution using TSX Nano PLC with 16 I/O
3.1 Power circuit
3.2 PLC connection diagram
3.3 Parts list
3.3-1 PLC inputs
3.3-2 PLC outputs
3.3-3 PLC internal variables
3.4 Equivalent electrical scheme
3.5 List program
3.6 Function block configuration
3.7 Programming the RTC schedule block
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E
Application example Contents
Part E
Important
The example described in this section is for information only. When used in an industrial application it will require modifications depending on the safety rules which apply to the sector of activity concerned.
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1
Specifications : automatic car wash
1.1
Description of the application
A car wash comprises :
• A gantry supporting a horizontal roller and vertical rollers, driven by a motor with two operating directions (forward and reverse).
• A motor to rotate the horizontal roller and vertical rollers.
• A motor to raise and lower the horizontal roller.
Limit switches control :
• Upper limit of the horizontal roller
• Forward and rear limit of the gantry.
Rotation of rollers
Gantry forward
Raise gantry
Gantry reverse
Roller upper
limit switch
Move gantry down
E
Gantry forward limit switch
Cycle indicator lamp
Manual raise roller pushbutton
Vehicle present proximity sensor
Start pushbutton
Manual gantry reverse pushbutton
Gantry rear limit switch
Stop pushbutton
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E
1.2
Application operation
1.2-1 Automatic wash cycle
Initial conditions : The gantry is at the "rear" position (rear limit switch) and the horizontal roller is in the raised position (upper limit switch). A vehicle is present in the washing area
(vehicle present proximity sensor).
When the initial conditions are fulfilled, pressing the start pushbutton starts the following cycle :
• Cycle indicator lamp is lit, followed by a ten second wait period (KA0).
• The horizontal roller moves down (KM1) for five seconds (KA1).
• The rollers start to rotate (KM3) and the gantry moves forward (KM4). It is presumed in this example that the water spray pumps are activated at the same time as the motor which rotates the rollers.
• Forward movement of the gantry is stopped by the gantry forward limit switch and the gantry reverse command is given (KM5).
• Gantry reverse and rotation of the rollers are stopped by the gantry rear limit switch.
The command is given to raise the horizontal roller (KM2) up to the upper limit switch which ends the cycle.
A real-time clock controls the times (Monday to Saturday, 8.00 to 19.30). Outside these times, no start request is accepted.
A weekly counter counts the number of washes performed. It is automatically reset to zero every Monday at 8.00 a.m. Another module counts the total number of washes performed over the weeks.
1.2-2 Manual immediate stop
A latching pushbutton can stop the cycle at any time (immediate stop of all motors). To start a new cycle, the following operations must be performed :
• Raise the horizontal roller to the upper position (to upper limit switch) by holding down the manual raise roller pushbutton.
• Return the gantry to the rear position (up to rear limit switch) by holding down the manual gantry reverse pushbutton.
• Release the stop pushbutton.
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Application example 1
1.3
Graphic representation of the wash cycle
The Grafcet chart below is a graphic representation of the automatic operation of the car wash.
0
Vehicle waiting
1
Initial conditions and start pushbutton
10 s time delay start cycle
Indicator lamp lit
2
10 s time delay (KA0)
Move roller down (KM1)
5 s time delay
5 s time delay (KA1)
3
Rotate rollers
(KM3)
Rear limit switch
6
Raise roller
(KM2)
Upper limit switch
Washing counter
4
Gantry forward
(KM4)
5
Forward limit switch
Gantry reverse
(KM5)
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E
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2
Hard-wired solution
2.1
Power circuit
Q0
Q1
KM1
F1
M1
3 '
Raise/move down roller
Q2 Q3 Q4
KM2
KM3
F2
KM4
F3
M2
3 '
Rotate rollers
M3
3 '
Gantry forward/reverse
KM5
440V (or 380V)
24V
U4 V4 a
24V
Control circuit
2.2
Control circuit
The diagram overleaf shows the automatic operation and manual stop. The real-time clock and totalling counter are not shown in this diagram.
Two control relays with mechanical latching memories (KA0 and KA2) memorize the stage reached in the cycle. This means that after a power outage, the cycle continues from the state where it stopped. The two time delays are provided by two time-delay options on KA0 and KA1.
The rear and forward limit switches require two additional control relays (KA3 and KA4) due to the large number of contacts used in the layout.
E
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2/1
a
24V
Immediate stop
Cycle pushbutton
Vehicle present
KA3
KA4
KA0
KA2
KA3
KA0
KA0
KA1
KA2
Rear limit switch
KA1
KA1
Upper limit switch
KM2
KM1
Move roller down
KM1
KM2
Raise roller
Manual raise
E
Manual
return
KM3
KA1
KA1
KA2
Fwd. limit switch
KA2
Rear limit switch
Fwd.
limit switch
KM2 KM5 KM4
KM5
KM3 KM4 KA2
Rotate rollers
Gantry forward
Gantry reverse
KA0
Upper limit switch
Rear limit switch
KA3 KA4
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3
Solution using TSX Nano PLC with 16 I/O
3.1
Power circuit
This layout is identical to that for the hard-wired logic solution. The 110VAC supply to the TSX Nano PLC is provided via a 440VAC(or 380 VAC)/110VAC transformer. The supply voltage to the outputs is 24VAC and provided by a second transformer.
Q0
Q1
KM1
F1
M1
3 '
Raise/lower roller
Q2 Q3 Q4
KM2
KM3
F2
KM4
F3
M2
3 '
Rotate rollers
M3
3 '
Gantry forward/reverse
KM5
440V (or 380V)
110V
U4 V4
TSX Nano
PLC c
110V
E
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3.2
PLC connection diagram c 110V
U4 V4
Manual gantry reverse
Manual raise roller
Upper limit switch
Rear limit switch
Forward limit switch
Stop cycle
Start cycle
Vehicle present
E
Fu
110V
3A
Fu
24V
L N + – C 0 1 2 3 4 5 6 7 8 a a 24V TSX Nano with 16 I/O
Extension
A B SG C 0 1 2 3 C 4 5 C 6
KM2
KM1
KM1 KM3
KM2
KM5
KM4
KM4
KM5
Gantry reverse
Gantry forward
Rotate rollers
Raise roller
Move roller down
Cycle indicator lamp
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Solution using TSX Nano PLC with 16 I/O 3
3.3
Parts list
3.3-1 PLC inputs
Item
Vehicle present
Start cycle
Stop
Forward limit switch
Rear limit switch
Upper limit switch
Manual raise
Manual return
Address
%I0.0
%I0.1
%I0.2
%I0.3
%I0.4
%I0.5
%I0.7
%I0.8
Description
Vehicle proximity sensor
Start pushbutton
Stop pushbutton
Gantry forward limit switch
Gantry rear limit switch
Roller upper limit switch
Manual raise roller pushbutton
Manual gantry reverse pushbutton
3.3-2 PLC outputs
Item
Indicator lamp
KM1
KM2
KM3
KM4
KM5
Address
%Q0.0
%Q0.1
%Q0.2
%Q0.3
%Q0.4
%Q0.5
Description
Cycle indicator lamp
Move roller down contactor
Raise roller contactor
Rotate rollers contactor
Gantry forward contactor
Gantry reverse contactor
E
3.3-3 PLC internal variables
Type Address
Internal bit
Internal bit
Internal bit
Internal bit
Internal bit
Internal bit
Internal bit
Internal bit
System word
System word
Timer function
Timer function
Counter function
%M0
%M1
%M2
%M3
%M4
%M5
%M6
%M7
%MW0
%SW50
%TM0
%TM1
%C0
Description
Start latch variable (KA0)
Move roller down variable (KA1)
Gantry forward latch variable (KA1)
Schedule block output variable
Monday test variable
Variable to create pulse on %M4
Variable to create pulse on %M
Variable to test timer output on %TM1
Wash number totalling counter
Real-time clock current seconds/day
Start time delay
Move roller down time delay
Weekly wash counter
3/3
3.4
Equivalent electrical scheme
The circuit diagram modified for the PLC solution, which is directly based on the control circuit of the hard-wired solution in Section 2.2, is as follows.
I0.2
Stop
I0.2
I0.2
M2 I0.7
Cycle pushbutton
I0.1
M3
Vehicle present
I0.0
I0.5
M2
I0.5
M0
TM0.Q
M1
TM1.Q
I0.4
I0.5
I0.4
M0 Q0.0
M1
Q0.2
Q0.1
Move roller down
Q0.1
Q0.2
Raise roller
I0.2
I0.2
E
Q0.3
I0.8
KA1
TM1.Q
M2
I0.3
M2 M0
I0.4
I0.3
Q0.2
Q0.3
Q0.5
Q0.4
Q0.5
Q0.4
M2
Rotate rollers
Gantry forward
Gantry return
Control relays KA0, KA1 and KA2 are replaced by internal bits %M0, %M1 and %M2.
Control relays KA3 and KA4 are not applicable, since the number of tests on a single PLC variable is not limited in a program.
The rising edge at internal bit %M4, set to state 1 every Monday (by testing the first four bits of system word %SW50) sets the weekly wash counter (counter %C0) to zero.
The totalling counter for the total number of washes (internal word %MW0) is automatically reset to 1 when it reaches 30 001.
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Solution using TSX Nano PLC with 16 I/O 3
3.5
List program
The reversible List language program is as follows:
000
005
010
015
020
025
030
LD %I0.1
AND %I0.0
AND %M3
AND %I0.5
AND %I0.4
S %M0
LD %M2
AND %I0.5
OR %I0.2
R
LD
%M0
%M0
ST
BLK
LD
%Q0.0
%TM0
%Q0.0
IN
END_BLK
LD
ST
BLK
LD
IN
%TM0.Q
%M1
%TM1
%M1
END_BLK
LD %TM1.Q
ST %M7
LDN %I0.2
AND %M1
ANDN %M7
ANDN %Q0.2
ST
LD
%Q0.1
%M2
AND %I0.4
OR( %I0.2
Start pushbutton
Vehicle proximity sensor
Schedule block enable bit
Roller upper limit switch
Gantry rear limit switch
Start latch
Stop pushbutton
Cycle indicator lamp
Start timer (10s)
Move roller down timer (5s)
Move roller down (KM1)
035
)
AND %I0.7
ANDN %I0.5
ANDN %Q0.1
ST %Q0.2
LD %M1
AND %M7
ANDN %Q0.2
Manual pushbutton, move roller down
Raise roller (KM2)
040 ST %Q0.3
Rotate rollers (KM3)
LDN %I0.2
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E
E
045
050
055
060
065
070
075
080
AND %Q0.3
MPS
ANDN %M2
ANDN %I0.3
ANDN %Q0.5
ST
MPP
%Q0.4
AND %I0.3
S %M2
LDN %I0.2
AND %Q0.3
AND %M2
OR( %I0.2
AND %I0.8
)
ANDN %I0.4
ANDN %Q0.4
ST %Q0.5
LDN %M0
R %M2
LDN %SW50:X0
ANDN %SW50:X1
ANDN %SW50:X2
ANDN %SW50:X3
ST
BLK
%M4
%C0
LD %M4
ANDN %M5
Gantry forward limit switch
Gantry forward (KM4)
Gantry forward latch
Gantry reverse manual pushbutton
Gantry reverse (KM5)
{
{
test for the day of
{ the week : Monday
{ 1st byte= 0
Weekly wash counter
(0 to 9999)
R
LD
CU
%M2
END_BLK
LD %M4
ST
LD
%M5
%M2
ANDN %M6
Reset to 0 every Monday
Count
[INC %MW0]
LD %M2
ST
LD
%M6
[%MW0=30001]
Totalling wash counter (0 to 30 000)
{Totalling counter reset to 1
[%MW0:=1]
END
{when 30 001 is reached
Program end
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Solution using TSX Nano PLC with 16 I/O 3
3.6
Function block configuration
Function block can be configured by selecting e4m2
• Start time delay %TM0
%TM0
TB: 100ms
%TM0.P: 100
Type: TON
• Move roller down time delay %TM1
%TM1
TB: 100ms
%TM1.P: 50
Type: TON
• Weekly wash counter %C0
%C0
%C0.P: 9999
Adjust: N
E
3.7
Programming the RTC schedule block selecting e13
This programming corresponds to the opening of the car wash :
• From 2 January to 31 December
• Monday, Tuesday, Wednesday, Thursday, Friday and Saturday
• From 8.00 to 19.30.
RTC:0 Q:%M3
2 Janµ 31 Dec
MTWTFS.
08:00µ 19:30
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Products which can be connected Contents
Part F
___________________________________________________________________________
1
2
Terminal port communications
1.1
Characteristics of the terminal port
1.2
General information about the terminal port
1.3
TSX Nano in ASCII mode
1.4
TSX Nano Master on UNI-TELWAY
1.5
TSX Nano Slave on UNI-TELWAY
1.6
UNI-TELWAY Time-out (TSX 07 3
●
)
1.7
XBT operating terminals or CCX 17 operator panels
1.8
UNI-TE requests supported by TSX Nano ( server)
Extension port communications
2.1
Characteristics of the MODBUS/JBUS extension port
2.2
MODBUS/JBUS on TSX Nano
2.2-1 General
2.2-2 Configuring the MODBUS link
2.2-3 Requests supported by the TSX Nano in MODBUS
2.2-4 Managing the COM LED
2.2-5 Associated bits and system words
2.3
Standard MODBUS requests
2.3-1 Reading n internal bits %Mi
2.3-2 Reading n internal words %MWi
2.3-3 Writing an internal bit %Mi
2.3-4 Writing an internal word %MWi
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F
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Products which can be connected Contents
Part F
2.3-5 Writing n internal bits %Mi
2.3-6 Writing n internal words %MWi
2.3-7 Calculation of LRC
2.3-8 Algorithm for calculating CRC 16
2.4
Access requests by the TSX Nano to the UNI-TE server
2.4-1 Identification
2.4-2 Read-CPU
2.4-3 RUN request
2.4-4 STOP request
2.4-5 INIT request
2.5
Limitations
2/13
2/14
2/15
2/16
2/17
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F/2
Terminal port communications
1.1
Characteristics of the terminal port
• Characteristics
Type of link
Protocol
Baud rate
: RS485
: UNI-TE
: 9600 (bit 1 s)
1 start bit, 8 bit data, odd parity, 1 stop bit
: 8-pin rapid connect mini-DIN Type of connector
Max. link distance
FTX117 : 10 m
UNITELWAY devices : 10 m (without junction box)
ASCII devices : 10 m
• Connector pinout - UNI-TELWAY devices
8
5
7
2
4
1
6
3
1 D+
2 D-
3 Not connected
4 /DE
5 /DPT
6 Not connected
7 0 V
8 5 V
The signal /DPT is used to select the operating mode of the terminal port :
/DPT = 1 UNI-TELWAY Master mode
/DPT = 0 UNI-TELWAY Slave mode or ASCII mode.
Connect pins 5 to 7 to select ASCII mode.
F
Notes :
Equipment should be connected with the power off (except for programming terminals).
The use of ASCII and UNI-TELWAY devices is exclusive.
An ASCII device must be disconnected to allow the use of a programmer (FTX117 or PC).
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F
1.2
General information about the terminal port
The TSX Nano terminal port can operate in three different modes:
• UNI-TELWAY Master (TSX 07 2
●
, TSX 07 3
●
),
• UNI-TELWAY Slave (TSX 07 3
●
only),
• ASCII (TSX 07 2
●
, TSX 07 3
●
).
The operating mode of the terminal port is selected by software configuration and using signal /DPT (pin n
°
5) on the Mini DIN socket :
• When signal /DPT is at 1 (pin n
°
5 not connected), the terminal port is in UNI-TELWAY
Master mode.
• When signal /DPT is at 0 (pin n
°
5 connected to pin n
°
7=0V), the terminal port is in
ASCII mode or UNI-TELWAY Slave mode. The selection is made by software configuration using the programming tools PL707 and FTX 117 (ASCII mode by default).
The state of /DPT is shown by system bit %S100.
Configuration screen:
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Terminal port communications 1
1.3
TSX Nano in ASCII mode
This character mode, simplified on the TSX Nano is used to transmit (TSX 07 2
●
and TSX
07 3
●
) and/or receive (TSX 07 3
● only) a character string to/or from a simple device
(printer or terminal) without flux control.
This mode is designed to operate in a point-to-point link.
The terminal port configuration can be modified on TSX 07 3
●
, modifications are made in the PLC configuration screen:
• Type:
• Speed:
Half-Duplex
1200, 2400, 4800, 9600 bds
• Format:
• Parity:
1 start bit, 7 or 8 data bits, 1 or 2 stop bits even, odd, none.
The values in bold are the default values, they cannot be modified on TSX 07 2
●
.
ASCII configuration screen:
Programming in ASCII mode is possible using the EXCH instruction, as well as the exchange control function block %MSG. See section 3.3-6, part B.
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F
1.4
TSX Nano Master on UNI-TELWAY
The TSX Nano is compatible with other UNI-TELWAY devices such as man-machine interfaces (MMI), identification devices and drives. This section provides general guidelines for connecting these devices on the UNI-TELWAY bus. Refer to the user manuals for the devices to obtain specific information.
When the TSX Nano is the UNITELWAY communication master for slave devices which are connected to the TSX Nano terminal port, it controls the network and polls the slave devices at periodic intervals.
Example of architecture
TSX Nano Master
Client Client/server
SG
ATV 16 CCX 17
F
The TSX Nano is normally a UNI-TE server. However it can provide limited UNI-TE client services for TSX 07 2
●
:
• Configurations
Most UNI-TELWAY devices require the use of two addresses. The first address is configured physically by the user using microswitches; the second address is generally the physical address +1. The TSX Nano can communicate with a programming terminal and up to two additional UNI-TELWAY devices.
Address assignment:
0 : TSX07 (communication master)
1
2-3-5 :
: programmer (FTX117 hand-held terminal or PL7-07 software) client device only (TSX 07 2•)
4
2-3-4-5:
: client and/or server device (TSX 07 2•) client and/or server devices (TSX 07 3•)
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Terminal port communications 1
Summary of devices that can be connected to various addresses.
Reference
Device 1
Permissible Addresses
2,3 4,5
Programming terminal
FTX117
PL7-07
Yes No No
MMI
Identification devices
XBT-8
CCX17
XGS
No
No
Yes
Yes
Yes
Yes
Speed controller ATV No Yes (1) Yes
(1) TSX Nano V3 only
The terminal port configuration cannot be modified in UNI-TELWAY Master mode. It manages 5 slave link addresses depending on the transmission format as follows:
• Type:
• Speed:
Half-Duplex
9600 bds
• Format:
• Parity:
1 start bit, 8 data bits, 1 stop bit odd.
The Time-out parameters can be set in the configuration screen.
• UNI-TE server function:
The TSX Nano responds to commands initiated by the client. A client is an intelligent device which can initiate communication with the TSX Nano. It can write data to or read data from the TSX Nano.
TSX Nano
Server
Request
F
Confirmation report
Client Client
Addressing
The TSX Nano is always address 0 (master).
• The TSX Nano polls for addresses 1 to 5
• The programmer (either the FTX117 or the PL707 software) is always address 1
• Generally, the address of a UNI-TELWAY device is set by microswitches at a junction box or by cable connection.
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Notes:
- Communication between slaves is not possible when the bus master is a TSX
Nano.
- The TSX 07 2
●
cannot be a UNI-TELWAY slave.
All the bus devices can interrogate the TSX Nano server system by using the target address 0.254.0. The TSX Nano UNITE server only responds to frames sent to this address. Messages containing a different target address will be ignored.
• TSX Nano as a client:
The TSX Nano initiates communication with the server. The server is an intelligent device which executes the commands sent by the TSX Nano.
TSX Nano
Client
Confirmation report
(TSX 07 2
●
)
Request
Server
F
The TSX 07 3• Master can send a request to any slave with an address between 1 and
5 using the EXCH instruction . It uses source address 0.254.16 .
The TSX 07 2• can only send a request to slave at address 4 (using the EXCH instruction). Consequently, only WRITE and UNSOLICITED DATA (unconfirmed) requests may be used. Source address 0.254.10 is used.
ATTENTION:
The UNI-TE client function of the TSX 07 3
●
reverses the data transmitted (most significant/ least significant) in relation to TSX 07 2
●
. Applications which operate with
TSX 07 2
●
must be modified to take account of this reversal if they are loaded onto a TSX 07 3
●
.
Programming in UNI-TELWAY Master mode is possible using the EXCH instruction, as well as the exchange control function block %MSG. See section 3.3-6, part B.
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Terminal port communications 1
1.5
TSX Nano Slave on UNI-TELWAY
This protocol is only available with TSX Nano version 3 or later (TSX 07 3
●
).
It is used for simultaneous, multidrop connection of several devices (PLC, programming terminal, MMI device, speed controller, etc.).
Example of architecture
TSX 37
TSX Nano ATV 16 TSX Nano TSX 37
Unlike Master mode, the terminal port configuration can be modified by the user in
UNI-TELWAY slave mode using the programming tools PL7 07 or FTX 417 in the PLC configuration screen:
• Type:
• Speed:
Half-duplex
1200, 2400, 4800 or 9600 bds
• Format: 1 start bit, 7 or 8 data bits, 1 or 2 stop bits
• Time-out: 30 to 255 (see section 1.6)
• Address: 4 (1 to 97)
• Parity: even, odd or none.
The values in bold are the default values.
The TSX Nano uses 2 consecutive logic addresses:
• AD0: base address (that of the configuration), known as server address. Any device
(local or remote) can address the TSX Nano system server using AD0 as target address.
• AD1 = AD0 + 1 known as client address. With this address the TSX Nano can transmit a request to any UNI-TELWAY bus device (Master or Slave) using the EXCH instruction.
See section 3.3-6 part B.
F
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The modification of terminal port characteristics made in the configuration screen is only taken into account on a power restart or on modification of the signal /DPT on the Mini DIN socket (disconnection / reconnection of the terminal port).
F
1.6
UNI-TELWAY Time-out (TSX 07 3
●
)
The link layer of the UNI-TELWAY protocol (Master or Slave) uses a time-out.
This Time-out corresponds to the duration of the transmission of a number of characters sent on the line :
• TSX 07 3
●
: 30 characters by default. This duration is increased to 125 characters if the TSX Nano does not have an application.
Once a frame has been transmitted, a device (Master or Slave) declares a Time-out.
If no acknowledgment is received before the end of the time-out, the exchange is not acknowledged.
The transmitter repeats its frame as soon as the protocol allows.
The terminal port configuration screen is used to configure a Time-out of between
30 and 8000 characters.
Values between 30 and 250 inclusive correspond to an equivalent number of characters.
Values between 251 and 255 inclusive correspond to the following values :
• 251 = 500 characters
• 254 = 4000 characters
• 252 = 1000 characters
• 255 = 8000 characters.
• 253 = 2000 characters
On power-up or on modification of the signal /DPT, the configured value is loaded into the least significant bit of system word %SW14 (the most significant bit is ignored).
Thus, the Time-out value can be fine-tuned by writing the new value in the system word
%SW14. It will be taken into account at the end of the PLC scan.
A longer Time-out allows the TSX Nano to be connected to slow devices, for example modem type.
It is possible to reduce the value of the Time-out to 10 characters by using system word %SW14.
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Terminal port communications 1
1.7
XBT operating terminals or CCX 17 operator panels
• PLC connection
The XBT operating terminal or CCX 17 operator panel is connected via the TSX Nano
PLC terminal port using cable XBT Z968.
TSX Nano PLC
XBT-H
XBT-Z968 cable
• Characteristics of the link
- RS 485 link
- UNI-TE protocol
• XBT terminals which can be connected via the TSX Nano PLC terminal port
- XBT-A8 • - XBT-C8 • - XBT - H
- XBT-B8 •
- XBT-BB8 •
- XBT-K8 •
- XBT-M8 •
- XBT - P
- XBT - E
- XBT-A8 •
• CCX 17 operator panels which can be connected via the TSX Nano PLC terminal port
- TCCX 17 20 F - TCCX 17 20 L - TCCX 17 30 L
- TCCX 17 20 FW
- TCCX 17 20 FPS
- TCCX 17 20 LW
- TCCX 17 20 LPS
- TCCX 17 30 LW
- TCCX 17 30 LPS
• Setup :
- XBT operator terminal :
(see technical documentation relating to the XBT being used)
- TSX Nano / XBT exchanges
The PL7 program sends messages to the XBT terminal via :
- EXCH instruction : to transmit messages
- %MSG function block : to control data exchanges
(see Part B, Section 3.3-6 : transmitting messages and controlling data exchanges).
• Comments
XBT and TSX 07 data syntax (1)
Data XBT or CCX17 syntax TSX Nano syntax
Internal bit Bi %Mi
Internal word Wi %MWi
(1) except XBT - H/P/E.
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F
1.8
UNI-TE requests supported by TSX Nano (server)
Standard requests
Service Request
Data
(read)
Data
(write)
Operating modes
Read a bit
Read a word
Read objects
Write a bit
Write a word
Write objects
RUN
Request Confirm Meaning
Hex. Dec. Hex. Dec.
00 00 30
04 04 34
48
52
Read a %Mi bit.
Read a %MWi word.
36 54 66 102 Read objects (%Mi, %Mi:L,
%Mwi, %Mwi:L).
10 16 FE 254 Write a %Mi bit
14 20 FE 254 Write a %MWi word.
37 55 FE 254 Write objects (%Mi, %Mi:L,
%Mwi, %Mwi:L).
24 36 FE 254 Set device to RUN.
STOP 25 37 FE 254 Set device to STOP.
F
Special requests
Service Request Request Confirm Meaning
Hex. Dec. Hex. Dec.
Data
(read)
Read a system bit
Read a constant word
Read a system word
Read Grafcet steps
01 01 31
05 05 35
49 Read a %Si bit
53 Read a %KWi word
06 06 36 54 Read a %SWi system word
2A 42 5A 90 Read %Xi Grafcet steps
Data
(write)
Write a system bit
Write a system word
11 17 FE 254 Write a %Si bit
15 21 FE 254 Write a %SWi word
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2
2 Extension port communications
2.1
Characteristics of the MODBUS / JBUS extension port
The extension port of the TSX 07 3
●
can be used to connect other TSX Nano PLCs as
I/O extension (see part A, section 1.4) or even as peer PLC (part A, section 1.10).
From TSX 07 3
●
, this extension port allows a MODBUS Slave type link.
Characteristics of the MODBUS link:
• Physical layer: RS485 non isolated, maximum length 200 meters
• Link layer: Asynchronous transmission
ASCII frame (7 bits) or RTU (8 bits)
Data rate: 1200, 2400, 4800, 9600 or 19200 bds
Parity: Even, odd or none
Number of stop bits: 1 or 2
Inter-character time: 3 (1 to 127) characters
• Physical configuration: 28 devices max.
98 logic addresses (1 to 98)
• Services: Bits: 128 bits on request
Words: 120 words of 16 bits on request
Safety: on control parameter (CRC16) for each frame (in RTU).
The values in bold are the default values.
Note: Devices should be connected with the power off.
F
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2/1
2.2
MODBUS / JBUS on TSX Nano
2.2-1 General
The data exchange services offered (%Mi and %MWi) are common to MODBUS and
JBUS, which allows MODBUS devices to communicate with JBUS devices.
The MODBUS / JBUS protocol allows data exchange between a Master and Slaves, it does not allow direct communication between Slave devices, nor network transparency.
MODBUS communication in ASCII mode:
• Operation in ASCII mode is designed for connecting simple devices (screens, etc).
The frame is complete but the frames are twice as long as in RTU mode.
Detail of an ASCII frame:
Header(3A) Slave no. Function code Data
1 byte 2 bytes 2 bytes 2n bytes
LRC CR LF*
2 bytes 1 byte 1 byte
F
*The system word %SW67 can be used to set the parameters of the end delimiter character (LF). It is written to 16#000A by the system on a cold start.
The user can modify this system word by program or by adjustment when the Modbus
Master uses an end delimiter character other than 16#000A.
MODBUS communication in RTU mode:
• A frame in RTU mode does not have a header byte nor an end of message delimiter byte:
Slave no.
Function code
1 byte 1 byte
Data
n bytes
CRC16
2 bytes
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Extension port communications 2
Example of connection
By daisy chaining
TSX Micro
TSX SCP 114
TSX SCP CU 4030
TSX Nano TSX Nano
TSX SCA 50
TSX Nano
200 M max.
28 slave devices maximum
TSX Nano
A B SG
F
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2/3
2.2-2 Configuring the MODBUS link
The extension link in MODBUS / JBUS is configured from the Configuration menu of the PL7 07 by selecting Extension port.
The following dialog box appears:
F
In dynamic operation, the parameters (speed and format) cannot be modified.
There is no mechanism for adapting the speed of the TSX Nano Slave in relation to the speed of the Master.
Any modification made to the speed and protocol format is taken into account by the TSX
Nano as soon as the configuration screen is enabled.
The Extension, I/O Extension, AP2, AP3 and AP4 fields are not significant if MODBUS protocol is selected.
See part C section 5.19 for more details.
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Extension port communications 2
2.2-3 Requests supported by the TSX Nano in MODBUS
The TSX Nano supports the requests listed below, others will be rejected with the exception code 01: Function not known:
The MODBUS function only processes one request at a time, as in MODBUS protocol the Master must wait for a response from the slave or for a time-out to be triggered before sending a new request to the slave.
Standard MODBUS requests :
• 01 / 02 : Read n consecutive internal bits : Access to bits %M0 to %M127
• 05
• 15
: Write an internal bit : Access to bits %M0 to %M127
: Write n consecutive internal bits: Access to bits %M0 to %M127
• 03 / 04
• 06
: Read n consecutive words : Access to words %MW0 to %MW255
: Write an internal word: Access to words %MW0 to %MW255
• 16 : Write n consecutive words: Access to words %MW0 to %MW255.
Details of these requests are given in section 2.3.
Access requests to the UNITE server of the TSX Nano:
• 0F : Identification
• 4F : Read CPU
• 24 : RUN
• 25 : STOP
• 33 : INIT
Details of these requests are given in section 2.4.
Exception codes:
An exception code is returned by the slave when it does not know how to process the request.
The response frame thus contains:
• The function code received, incremented by the value 16#0080
• The exception code which depends on the type of error.
The two exception codes processed by the TSX Nano are:
• 01: Function not known (request not supported by the TSX Nano)
• 03: Invalid data (bit or word number not managed by the TSX Nano, writing a bit with a value other than 16#FF00 or 16#0000 etc).
F
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F
2.2-4 Managing the COM LED
Once the response to a request has been sent, the TSX Nano switches on the communication LED for 50ms.
The LED then flashes, the frequency of the flashes depends on the exchanges between the Master and the TSX Nano .
2.2-5 Associated bits and system words
When a MODBUS request is processed, the TSX Nano sets the system bit %S70 to 1.
This bit can be used by the user. Reset to 0 is the responsibility of the user.
The system word %SW67 can be used to set the parameters of the end of frame delimiter character (LF) in ASCII mode.
It is written to 16#000A by the system on a cold start.
The user can modify this system word by programming or by adjustment when the
Master uses an end of frame delimiter character other than 16#000A.
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Extension port communications 2
2.3
Standard MODBUS requests
These requests can be used to exchange MODBUS objects by accessing objects %Mi and %MWi of the TSX Nano.
The requests are detailed below in RTU mode. In ASCII mode, the data is the same,
CRC 16 is replaced by LRC.
2.3-1 Reading n internal bits %Mi
Function 01 or 02
Question :
Slave number
1 byte
Response :
1 or 2
1 byte
No. of 1st bit
PF Pf
2 bytes
Number of bit
PF Pf
2 bytes
CRC 16
2 bytes
Slave number
1 or 2
Number of bytes read
Value
1 byte 1 byte 2 bytes
Example : reading bit %M3 from Slave 2
Question 02 01 0003
••••••••
0001
Value
CRC 16
CRC 16
2 bytes
Response 02 01 01 xx CRC 16
00 if %M3 = 0
01 if %M3 = 1
F
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F
2.3-2 Reading n internal words %MWi
Function 03 or 04
Question :
Slave number
1 byte
Response :
3 or 4
1 byte
No. of 1st word
PF Pf
2 bytes
No. of word
PF Pf
2 bytes
CRC 16
2 bytes
Slave number
1 byte
3 or 4
Number of bytes read
1 byte
Value of 1st word
PF Pf
2 bytes
••••••••••••
Value of last word
PF Pf
2 bytes 1 byte
Example : reading words %MW20 to %MW24 from Slave 6
Question 06 04 14 05 CRC 16
CRC 16
2 bytes
Response 06 04 0A xxxx ••••••••••••
Value of %MW20 xxxx
Value of %MW24
CRC 16
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Extension port communications 2
2.3-3 Writing an internal bit %Mi
Function 05
Question :
Slave number
5
No. of bit
PF Pf
Value of bit CRC 16
1 byte 1 byte 2 bytes 2 bytes 2 bytes
The "Value of bit" field has two possible values to the exclusion of all others :
• bit at 0 = 0000,
• bit at 1 = FF00.
Response :
Slave number
1 byte
5
No. of bit
PF
2 bytes
Pf
Value of bit CRC 16
1 byte 2 bytes 2 bytes
Example : writing the value 1 in the bit %M3 of Slave 2
Question 02 05 03 FF00 CRC 16
Response 02 05 03 FF00 CRC 16
F
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2/9
2.3-4 Writing an internal word %MWi
Function 06
Question :
Slave number
6
1 byte
Response :
1 byte
No. of word
PF Pf
2 bytes
Value of word
PF Pf
2 bytes
CRC 16
2 bytes
Slave number
6
No. of word
PF Pf
2 bytes
Value of word
PF Pf
2 bytes
CRC 16
2 bytes 1 byte 1 byte
Example : writing the value 16#3A15 in the word %MW12 of Slave 5
Question 05 06 0C 3A15 CRC 16
Response 05 06 0C 3A15 CRC 16
F
2.3-5 Writing n internal bits %Mi
Function 15
Question :
Slave number
0F
Address of 1st
bit to write
Number of bits to write
Number of bytes
Value of bits to write
CRC 16
1 byte 1 byte
Response :
Slave number
0F
2 bytes 2 bytes
Address of
1st bit written
1 byte
Number of bits written n bytes
CRC 16
2 bytes
1 byte 1 byte 2 bytes 2 bytes 2 bytes
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2/10
Extension port communications 2
2.3-6 Writing n internal words %MWi
Function 16 (H'10')
Question :
Slave number
1 byte
10
1 byte
Number of 1st word
Number of words
2 bytes 2 bytes
Number of bytes
Value of 1st word
•••••••••••• CRC 16
1 byte 2 bytes 2 bytes
Response :
Slave number
1 byte
10
1 byte
Number of 1st word
Number of words
CRC 16
2 bytes 2 bytes 2 bytes
Example : Writing values 1 and 2 to words %MW16 and %MW17 of Slave 11
Question 0B 10 0010 0002 04 0001 0002 CRC 16
Response 0B 10 0010 0002 CRC 16
2.3-7 Calculation of LRC
LRC: sum in hexadecimal, modulo FF, of the contents of the frame, excluding headers, two's complemented and coded in ASCII.
Example of frame
ASCII frame
3A 30 31 30 38 30 30 30 30 36 31 36 32 33 34 0D 0A
Equivalent binary frame
01 08 00 00 61 62 4872
Calculation of LRC
Sum in hexa, modulo FF, of the contents of the frame:
01 + 08 + 00 + 00 + 61 + 62 = CC
H
= 1100 1100 one's complement: add 1:
Hexadecimal conversion
Coding in ASCII
0011 0011
+ 1
0011 0100
3
33
4
34 LRC = 3334
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2/11
F
2.3-8 Algorithm for calculating CRC 16
Hex FFFF -> CRC 16
CRC 16
√
Byte -> CRC 16 n = 0
Shift to right CRC 16
Carry over
CRC 16
√
POLY -> CRC 16
F n = n + 1 n > 7
Next byte
Message ended
√
= or exclusive n = Number of data bits
End
POLY = polynomial CRC 16 calculation = 1010 0000 0000 0001
(polynomial generator = 2 = x 2 = x 15 = x 16 )
In CRC 16, the 1st byte transmitted is the least significant.
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Extension port communications 2
2.4
Access requests by the TSX Nano to the UNITE server
The principle consists of coding a UNITE request within a MODBUS request in order to interrogate the UNITE server normally servicing the terminal port.
This mechanism uses the specific function code: 65.
Principle:
MODBUS Master request to Slave
Function code: 65 Request code Category code Data
MODBUS Slave response to Master
Function code: 65 Response code Response data
The category code is always 7.
The UNITE response code can be used to find out the result of the operation performed by the server.
There are three cases :
• Request response code = Request code + 30 H: The operation has been performed by the server, additional information gives exact details of the result of the operation.
• Positive response code = 16#00FE: The operation has been performed correctly and no additional information is transmitted in the response.
• Negative response code = 16#00FD: The server has not been able to perform the operation (request not known, out of range value etc.).
F
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2.4-1 Identification
This service can be used to provide identification and structuring information on the device which is targeting a request to the UNITE server.
The Identification request also provides basic diagnostic information, by showing the state of the LEDs and the device and module Status.
F
Request code: 0F
Response code: 3F
Report format: 27 bytes
• Identification type (byte): Byte always equal to H'FF'.
• Product range (byte): This parameter identifies the product range to which the device belongs: H'0B' = TSX Nano range.
• Version (byte): Version number of the device, coded in two BCD 4-bit bytes: H'30' for
TSX07 30/31.
• ASCII string (character string): Specifies the product reference.
On the TSX Nano it consists of one byte (H'10') followed by ASCII text (16 bytes) as follows:
'TSX 07 3'
'1-' if schedule block is present, '0-' if schedule block is not present
'10 ' if 10 I/O, '16 ' if 16 I/O, '16AC' if 16 I/O AC, '24 ' if 24 I/O
H'20'
H'20'
• Device status (byte): Byte always equals 0 for the TSX Nano
• State of LEDs (8 bit table): This byte indicates the state of the 4 indicator LEDs of the
TSX Nano:
RUN (bits 0 and 1), ERR (bits 2 and 3), I/O (bits 4 and 5), COM (bits 6 and 7).
Each LED is coded on 2 bits:
00: Unlit
01: flashing
10: Lit
11: Not significant.
• Base module type (byte): Byte equal to H'30' (type = CPU)
• Manufacturer's reference (byte): Byte equal to H'09'
• Catalogue reference (byte): Defines the type of device:
H'01': Module 10 I/O
H'11': Module 16 I/O
H'21': Module 24 I/O
H'12': Module 16 I/O AC
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2/14
Extension port communications 2
• Base module status (8 bit table): The values of these fields meet the standard for configurable devices. A bit positioned at 1 indicates a fault.
Bit no.
0
1
3
2
3
4
5
6
7
Class
ERR-INT
ERR-EXT
Reserved
MOD-At
Reserved
ERR-CNF
Reserved
Reserved
Comments
1: TSX Nano hardware fault
1: Sensor supply fault
1: Module in selftest
1: Extension configured but absent or NOK
• Number of components (byte): Byte equal to 0 because the module does not have any submodules.
2.4-2 Read-CPU
This service is used to diagnose the state of a TSX Nano PLC processor.
Request code: 4F
Response code: 7F
Format of report (14 bytes):
• Extension (byte): This field is used to transmit a transaction number: Not significant.
• State of LEDs (8-bit table): see Identification request.
• PLC status (8-bit table): Describes the physical state of the PLC:
Bit 0: RUN (1), STOP (0)
Bit 1: Application executable (1)
Bit 2: Cartridge present (always 1)
Bit 3: Forcing in progress (1)
Bit 4: Reserved: 0
Bit 5: Software fault (1)
Bit 6: Reserved: 0
Bit 7: Reserved: 0
• Address of the reserver (6 byte table): Describes the network address of the application entity which has reserved the processor. On the TSX Nano, this value is fixed at 16#00FF for each byte, to indicate that the processor is not reserved.
F
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2/15
• Type of application error (byte): Byte always at 0.
• Debug information (8-bit table):
Bit 0: State of forcing (1: Active, 0: No forcing)
Bits 1 to 7: Always at 0.
• Product range (byte): This parameter identifies the product range to which the device belongs: H'0B' = TSX Nano range.
• Application / PLC information (8-bit table):
Bit 0: Application present in RAM (1)
Bit 1: Program in RAM with checksum OK (1)
Bit 2: Program in RAM executable (1)
Bit 3: Program in RAM protected (1)
Bit 4: Program in RAM differs from EEPROM program (1)
Bit 5: Application compatible with OS (1)
Bit 6: Schedule block present (1)
Bit 7: 0
• Backup information (8-bit table):
Bit 0: Application present (1)
Bit1: Checksum OK (1)
Bit 2: EEPROM application executable (1)
Bit 3: EEPROM application protected (1)
Bit 4: Auto load application (1)
Bit 5: Application compatible with OS (1)
Bit 6: 0
Bit 7: 0
F
2.4-3 RUN request
Request code: 24
Response code: FE
Negative result if:
• RUN / STOP input configured in STOP
• Application cannot be executed
• Software fault (watchdog overrun, launching nonexistent G7 step).
Sending this request to a TSX Nano already in RUN is not considered an error.
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Extension port communications 2
2.4-4 STOP request
Request code: 25
Response code: FE
Negative result if the application in RAM cannot be executed.
A STOP instruction to a TSX Nano already in STOP is not considered an error.
2.4-5 INIT request
Request code: 33
Response code: 63
• Type of initialization (byte to transmit): Must always be at 1.
• Report: Indicates the result of the initialization operation:
00: Initialization OK
01: Type of initialization other than 1
F
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2/17
2.5
Limitations
The TSX Nano Slave on MODBUS has the following limitations:
• Physical layer: RS485 only. Does not automatically adapt to the speed of the Master.
• Selector position: The MODBUS protocol is only enabled if the position of the PLC rotary selection switch (automatically read on power-up) shows that TSX Nano is being used as a PLC (positions 0, 5, 6 and 7).
• Protocol: The protocol is Slave only.
• Communication between Slaves: Direct communication between Slaves is not possible. It can only be performed via the application program of the Master.
• Changing, dynamically, from ASCII mode to RTU mode is not possible.
F
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___________________________________________________________________________
Appendices Contents
__________________________________________________________
Part G
A.1
Access to instructions via the FTX117 terminal
A.2
Access to variables via the FTX117 terminal
A.3
A.4
A.5
Accessing functions via the FTX117 terminal
Diagnostic function error codes
Instruction scan time and memory usage
Page
A/1
A/3
A.6
Additional information on the operation of the
A.7
A.8
PLC Status (SECURITY) output
Example of prepositioning Grafcet steps
Programming actions associated with steps
A/11
A/12
A/13
A.9
Boolean List and Control instructions with Ladder equivalent A/14
A.10 Index A/15
A/4
A/6
A/7
A
G
___________________________________________________________________________
G/1
___________________________________________________________________________
Appendices Contents
Part G
G
___________________________________________________________________________
G/2
Appendices
A.1
Access to instructions via the FTX117 terminal
LD
LDN
LDR
LDF
ST
STN
S
R
( (1)
)
MPS
MRD
MPP
BLK
OUT_BLK
END_BLK
IN
R
CU
CD
∑
∂ ln
Instruction
AND
ANDN
ANDR
ANDF a r
"
Instruction Key BB
I
OR
ORN
ORR
ORF
XOR
XORN
XORR
XORF
N
Instruction
O
U
S
∑ on xRR f3z
:=
+
-
*
/
REM
INC
DEC
AND
OR
XOR
[2z
[9z
Instruction
NOT
SHL
SHR
ROL
ROR
BTI
ITB
SQRT
EXCH
READ
[12z
[20z
(1) Must be preceded by a Boolean instruction LD, AND, OR.
G
___________________________________________________________________________
A/1
Numerical comparison instructions
=
<>
<
=*=
#
=*= POST
END
ENDC
ENDCN
SR
RET
NOP
[1z f8z
ê
N
Instruction
>
<=
>=
Instruction
-*-
#D
Instruction
JMP
JMPC
JMPCN
%L
MCS
MCR
Key [6z f9z jcn
G
___________________________________________________________________________
A/2
Appendices
A.2
Access to variables via the FTX117 terminal
Object Key
%I
%Q
%M
I
%S
%X
Word operands
%MW
µ
%KW
%SW
È
Word extract bit operands <Word object> <Word n
Example : %KW12:X5 :
%IW
%QW v2z
È12h:5 h :
<Bit no.>
Q
D
Function block operands
Object
%C
%Ci.P
%Ci.V
%Ci.E
%Ci.D
%Ci.F
E
D
F
%R
%Ri.I
%Ri.O
%Ri.F
%PLS
%PLS.P
%PLS.N
%PLS.D
%PLS.Q
C
<i>
<i>
<i>
<i>
<i>
.
<i>
<i>
.
%TM
%TMi.P
%TMi.V
%TMi.Q
Q
%DR
%DRi.S
%DRi.F
%Ri.E
F
†
<i>
<i>
<i>
.
v11z
<i>
<i>
.
v6z
.¨
E
%FC
%FC.S0
%FC.S1
%FC.P
%FC.V
v5z
3 times
¨
%PWM
%PWM.R
%SBR
%SBRi.j
%MSG
%MSG.D
v15z v3z
<i> v8zz¨ <j>
%FC.F
%FC.TH0
%FC.TH1
F
TH0
TH1
%SC
%SCi.j
v5zz v4z
<i>
.
<j>
A/3
G
A.3
Accessing functions via the FTX117 terminal
G
Function
Application programming
Archive an application
Audible beep (enable/inhibit)
Backlighting (duration)
Clear a program
Clear an application
Communication (terminal port)
Comparison
Constants (Enter)
Copy & paste selected items
Data editor
Data table (Create)
Data table (Clear)
Debug
Delete a program & configuration
Delete a line
Display (select a database)
Fast Counter (Configuration)
Forcing I/O
Function blocks (Configuration)
Initialize an application
Inputs (Configuration)
Insert a line
Language (Selection)
Modification in RUN
Name of application (Enter)
Outputs (Configuration)
Password (Create/Enter)
Paste selected items
PLC status (Display)
Program diagnostics
Program modification
Selection e2m1 e2m2 e2m1> e3m5
to
8 e3m4 e4m3 e2î
5 times
¨ e52 e2m0 e2
Mode
FTX/TSX 4.1
FTX/TSX 6
FTX/TSX 2.4
FTX/TSX 2.4
FTX/TSX 4.6
FTX/TSX 4.6
FTX/TSX 3.9
FTX/TSX 6
FTX/TSX 3.6
FTX/TSX 4.3-5
TSX
FTX/TSX 9.8
FTX/TSX 9.9
TSX
TSX
FTX/TSX 3.7
FTX/TSX 4.5
TSX
TSX
FTX/TSX 3.4-3
TSX
TSX
8.3/9.4
FTX/TSX 3.3
TSX
FTX/TSX 3.4
FTX/TSX 4.3-3
FTX/TSX 2.3
TSX
See Pt.C
Section
9
8
8
8.2
9.1
7.3
8.5
FTX/TSX 4.7
FTX/TSX 3.5
FTX/TSX 4.7
FTX/TSX 4.3-5
7.5
FTX/TSX 4.5
FTX/TSX 4.3
FTX/TSX 4.7
Program size
Program transfer FTX/TSX 6
___________________________________________________________________________
A/4
Appendices
Function
Replace
RUN PLC
RUN/STOP inputs (Config.)
RUN/STOP output (Config.)
Safety: PLC status (Config.)
Save an application
Scan mode (Select)
Schedule blocks (Programming)
Search for a line for an instruction for a variable continue search
Select part of the program
Set the time
Software versions
STOP PLC
Table of variables (Save)
Write protection
Selection e2m55 e4m1 e2m54 e14 e2m1
Mode See Pt.C
Section
FTX/TSX 4.4-4
TSX 7.4
FTX/TSX 3.2
FTX/TSX 3.2
FTX/TSX 3.2
TSX 6
FTX/TSX 3.2
FTX/TSX 5.1
FTX/TSX 4.4-1
FTX/TSX 4.4-3
FTX/TSX 4.4-2
FTX/TSX 4.4
FTX/TSX 4.3-5
TSX 7.2
FTX/TSX 2.1
TSX 7.4
FTX/TSX 9.10
FTX/TSX 6.5
___________________________________________________________________________
A/5
G
A.4
Diagnostic function error codes
G
12
13
14
15
16
17
18
19
20
21
8
9
10
11
4
5
6
7
1
2
Code
0
3
Instruction
JMP %Li
SRi
#i
#Di
JMP %Li
%Li:
SRi:
)
(
)
RET
BLK
END_BLK
OUT_BLK
%Li
SRi:
RET
MPS
MRD
MPP
#i
#Di
#, #i, #Di
-*-i, =*=i
-*-i
-
MPS
SRi
Explanation
Jump to a Label which has not been defined in the program.
Jump to a subroutine which has not been defined in the program.
Deactivate a step which has not been defined in the program.
Jump to a Label which has been defined in a set of instructions between parentheses.
Label which has been defined in a set of instructions between parentheses.
Define a subroutine between parentheses.
Number of nested parentheses greater than 8.
Closing parenthesis not preceded by an opening parenthesis.
End of subroutine instruction between parentheses.
Unbalanced parentheses
A function block is not closed, instruction BLK is not followed by an END_BLK instruction.
A block is closed, without having been previously opened.
Instruction END_BLK or OUT_BLK is not preceded by
BLK instruction.
Definition of a Label not followed by an LD instruction.
Definition of a subroutine not followed by an LD instruction.
End of subroutine without previous definition of subroutine.
Number of nested MPS instructions greater than 8.
MRD instruction not preceded by an MPS instruction.
MPP instruction not preceded by an MPS instruction.
Use of a Grafcet instruction in preprocessing .
Use of a Grafcet instruction in postprocessing.
Definition of a Grafcet step not followed by an LD instruction.
Unbalanced stack operations
A subroutine is not ended by the RET instruction.
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A/6
Appendices
A.5
Instruction scan time and memory usage
Times is expressed in
µ s.
Size is expressed in bytes.
LD, LDN
LDR, LDF
AND, ANDN
ANDR,ANDF
AND(, AND(N
AND(R,AND(F
OR, ORN
ORR, ORF
OR(, OR(N
OR(R, OR(F
XOR,XORN
XORR,XORF
ST, STN (2)
S,R (2)
N
)
MPS
MRD
MPP
Boolean instructions
I nstructions
%I,%Q
Time
0.2
0.5
0.2
0.8
6.3
7
0.4
0.8
6.3
6.7
0.2
0.8
0.2 (0.8)
0.8 (1.2)
0.6
15
0.6
0.2
0.2
Size
8
4
2
4
4
4
2
4
8
10
2
2
4
2
4
8
10
2
2
With bit operands
%M, %S, %X, 0/1, %MWi:Xi... (1)
Time Size
-
0.4
-
0.6
-
7
0.7
-
6.6
-
0.6
-
0.9 (1.5)
1.5 (1.8)
-
4
6
-
4
-
10
-
4
-
4
-
10
4
These times must be multiplied by 3 when the instructions are written before program line 100.
(1) For word extract bits %MW16 to %MW255 and for all other types (%KWi:Xj,%SWi:Xj) these times are multiplied by 1.5 and the sizes are increased by 2 bytes.
(2) The times given in parentheses are the scan times for the instructions when the application has been initialized to use MCS/MCR instructions.
Summary : the choice of whether to use master relay instructions or not is made when the application memory is cleared (see Part C, Section 4.6).
G
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A/7
G
Instructions on function blocks (in reversible programming)
Instruction
BLK %TMi
Scan time (in
µ s)
46
Memory usage (in bytes)
4
I
O
U
S
BLK %Ci
BLK %Ri
BLK %SBRi
BLK %SCi
BLK %DRi
BLK %FC
BLK %MSG
BLK %PMW
BLK %PLS
OUT_BLK
END_BLK
IN
R
CU
CD
45
48
38
36
1
1
1.2
0.6
0. 7
0.7
42
22
42
53
5.6
0.7
4
4
4
4
4
4
2
2
4
4
4
4
4
4
4
4
4
Instructions on function blocks (in non-reversible programming)
Instruction Scan time (in
µ s) Memory usage (in bytes)
IN %TMi 48 4
CD %Ci (CU %Ci)
S %Ci
R %Ci
U %DRi
46
49
47
R %DRi
LD %SCi.j
9
CD %SCi (CU %SCi) 38
ST %SCi.j
R %SCi
BLK %PMW
BLK %PLS
CD %SBRi (CU %SBRi) 39
R %SBRi 37
I %Ri (O %Ri)
R %Ri
49
48
10
36
42
53
IN %PWM
IN %PLS
S %PLS
R %PLS
IN %FC
S %FC
READ
SEND
R %MSG
36
46
42
58
43
69
9.8
10
25
4
4
4
4
4
4
4
4
4
6
4
6
4
4
6
4
4
8
4
4
4
4
___________________________________________________________________________
A/8
Appendices
/
*
-
+
Instruction
:=
REM
INC
DEC
AND
OR
XOR
NOT
SHL
SHR
ROL
ROR
BTI
ITB
SQRT
Numerical instructions
28
37
37
37
29
34
34
35
35
40
40
80
49
48
49
28
Scan time (in
µ s)
29.5
34
38
Comparison instructions
Instruction Scan time (in
µ s)
LD[word1 comp word2] 18
AND[word1 comp word2] 19
AND([word1 comp word2]24
OR[word1 comp word2] 21
OR([word1 comp word2] 25 comp : comparison operations =>,<=,<>,=,>=,>
Grafcet instructions
Instruction
=*= i
#
#i
#Di
=*=POST
-*- i
Scan time (in
µ s)
12
8
10
10
12
6
6
12
12
8
8
10
10
8
Memory usage (in bytes)
10
12
12
12
12
Memory usage (in bytes)
8
10
14
10
14
Memory usage (in bytes)
4
6
4
4
4
6
G
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A/9
Instructions on programs
Instruction
END
ENDC, ENDCN
SR
RET
NOP
JMP
JMPC, JMPCN
%Ln :
%SRn :
MCR
MCS
Scan time (
µ s)
0.4
0.6
14
2
0.4
7.8
8
0.6
2
0.5
2.5
Memory usage (in bytes)
4
6
6
2
2
4
4
4
4
2
12
G
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A/10
Appendices
A.6
Additional information on the operation of the PLC status
(SECURITY) output
As indicated in section A4.2, the PLC status output is at state 1 when the PLC is in RUN and if no fault is detected.
No fault is detected when the following conditions are met:
• Application can be executed. The ERR indicator LED is off.
• No I/O fault (electronically fused outputs are not tripped, no sensor supply fault, no hardware fault, no communication fault, configuration is correct). The I/O lamp is off and system bit %S10 is a 1.
• No overrun of the software watchdog. The RUN lamp does not blink and system bit
%S11 is at 0.
• Outputs not reset by system bit %S9. System bit %S9 is at 0.
___________________________________________________________________________
A/11
G
G
A.7
Example of prepositioning Grafcet steps
In this example, no initial step (=*=) is programmed, the chart is initialized on the rising edge of input %I0.7 in preprocessing part of the program.
The example given in section B2.3-2 is repeated below.
Preprocessing
In the preprocessing part of the program (area prior to the first Grafcet step), state
0 of input %I0.7 prompts a reset of the Grafcet chart
(sets system bit %S22 to 1) which deactivates the active steps.
The rising edge of input
%I0.7 pre-positions the chart (activation of step X1 associated with resetting system bit %S23 to 1).
%I0.7
%I0.7
P
%S22
S
%M0
%X1
S
%S23
S
000 LDN
001 S
002 ST
%I0.7
%S22
%M0
003 LDR %I0.7
004 S
005 S
%X1
%S23
Sequential processing
No initial step is declared; since step 1 has been initialized by input I0.7 in preprocessing.
1
2
%I0.2.%I0.3
%I0.4
3
%I0.3.%I0.2
%I0.5
006 -*1
007 LD %I0.2
008 ANDN %I0.3
009 # 2
010 LD %I0.3
011 ANDN %I0.2
012 # 3
013 -*-
014 LD
015 #
016 -*-
017 LD
018 #
2
%I0.4
1
03
%I0.5
1
Post-processing
(The Post-processing part of the program is the area following the =*= POST instruction).
%X1
%X2
%X3
%M1 %I0.2 %I0.6
%Q0.1
%Q0.2
%Q0.3
019 =*=
020 LD
021 ST
022 LD
023 ST
024 LD
025 OR(
POST
%X1
%Q0.1
%X2
%Q0.2
%X3
%M1
026 ANDN %I0.2
027 AND %I0.6
028 )
029 ST %Q0.3
___________________________________________________________________________
A/12
Appendices
A.8
Programming actions associated with steps
The actions associated with steps can be programmed in two ways :
• By List sentences or ladder rungs associated with the step. In this case the List sentence or ladder rung is not scanned unless the step is active.
• In the Post-processing module by using the step bit %Xi (see chapter B 2.3-2) scanned on each cycle. Therefore, it is preferable for the actions to be programmed in the
Post-processing module.
3 S %Q 0.5
4
%M10
R %Q 0.5
020 -*-
021 LD
022 S
023 LD
024 #
025 -*-
026 LD
4
1
027 R %Q0.5
028 •••
029 •••
3
1
%Q0.5
%M10
4
The actions can be saved to logic conditions and are entered in the form of latched instructions or coils (SET). Each SET instruction or coil must be reset to zero by a RESET coil.
___________________________________________________________________________
A/13
G
G
A.9
Boolean List and Control instruction with Ladder equivalent
LIST Instruction
LD, LDN, LDR, LDF
ST, STN, R, S
AND, ANDN, ANDR, ANDF
OR, ORN, ORR, ORF
LADDER Equivalent
R S
Description
Load
Store
Logical Bit 'AND'
Logical Bit 'OR'
AND(, OR( (nest 8 levels) Parentheses
XOR, XORN, XORR, XORF
XOR XORN XORR XORF
Exclusive 'OR'
N NOT Logical Bit 'NOT'
END END
End of Program END, ENDC, ENDCN
ENDCN is not reversible
%Li
JMP, JMPC, JMPCN
JMPCN is not reversible
SRn
RET
MCR, MCS
%Li
MCR
RET
Label Definition
SRi
%Li
Jump to Label
<i= 0 to 15>
Subroutine Call
MCS
Return
Master Control
Relay
___________________________________________________________________________
A/14
Appendices
A.10 Index
A
Addition
Address selector switch A 1/3, A 1/11,A 1/21
Addressing
I/O indexed
Analog adjustment description operation
Analog I/O
Analog input characteristics connection
implementation presentation
Analog output characteristics connection dimensions implementation
AND (on word)
AND, ANDN, ANDF, ANDR
Application
Application comparison
Application name (entry)
Application protection
Arithmetic operation
ASCII (display base)
ASCII communications see communication
Assignment
B
Back-lighting
Baud-rate
extension port programming port
BCD conversion (instruction)
Bit register
Bit strings
Bits (list) input internal output system word extract
BLK, END_BLK, OUT_BLK
BTI
Buzzer
C
Cables and accessories A 3/13, F 1/4
CD (up/down counter)
%C
%SBR
%SC
Clear (an) instruction(s)
Clear memory
COM (LED)
Combinational and sequential
(instructions)
Communication (ASCII) description
wiring
Communication (inter-PLC)
description exchange words use/program wiring
Communication (UNI-TELWAY) description
requests use/program
wiring
Comparison applications instruction
Compatibility
Configuration application editor function blocks
A/15
G
G outputs
Connections analog inputs analog outputs
I/O
I/O extension
PLC extension
power supply
Constant words
Conversion (instruction)
Copy
CU (%C, %SBR, %SC) B 2/16, C 4/2
Cut and paste
Current value (BLK.V)
hexadecimal, ASCII, binary)
Display function blocks
E
Grafcet steps
I/O internal bits status
Division
Drum controllers
D
D
%C
%MSG
%PLS
Data animation
Data editor (Dat)
Data table creation/modification transfer
Date and time current last stop
Debugging
DEC
Delete (an) instruction (s) C 4/5, C 4/6
Description
FTX hardware
TSX hardware
Diagnostics
PLC
program
Diagnostic function error codes G A/6
Dimensions
PLC terminal
Display conversion (decimal,
E
%C
%MSG
%R
Edge (rising/falling)
Electronically fused output A 1/17, B 7/4
END, ENDC, ENDCN
ERR
EXCH
Exchange words
F
F
%C
%DR
%FC
%R
Fast counter configuration function
Faults
analysis display
FC
FIFO
Forcing
Frequency meter configuration function
Fun (access instructions not shown on the keypad)
___________________________________________________________________________
A/16
Appendices
Function blocks
G display programming
Functions (access)
Inputs (115 VAC) characteristics connection
Insert (an) instruction(s)
Instruction List language
Internal words
ITB
Grafcet
Grafcet step
J
H JMP, JMPC, JMPCN
Hexadecimal
HSC
K
I Keypad (FTX 117)
I (%R)
I/O
I/O (LED)
I/O extension configuration connection general
Immediate value
IN
%FC
INC
%TM
%PLS
%PWM
Indexed words
Indexing
Information
Initialization
Input configuration
Input filters
Inputs addressing characteristics special
Inputs (24 VDC) characteristics connection
L
Label
Ladder language
Latching
LEDs
LIFO
Logic operation on words
M
LD, LD(, LDN, LDN(, LDF, LDR B 2/4
Maintenance
Master Control relay
(MCS, MCR)
Memory card
application transfer data table transfer
error codes
Memory
FTX 117 Flash EPROM C 6/1, C 6/2
FTX 117 RAM
PLC
PLC EEPROM
PLC RAM
Menu
Modbus
___________________________________________________________________________
A/17
G
G
Modification of data of program with program running
Mounting
Move
MPS, MRD, MPP
MSG (%MSG)
Multiplication
B 3/9
N
N
Negation
NOP
NOT (on word)
Normal (scan)
O
O (%R)
Offline mode (FTX 117)
Online mode (FTX 117)
OPEN
OR (on word)
OR, ORN, ORF, ORR
Output configuration
Outputs addressing characteristics special
Outputs (relay)
characteristics connection
Outputs (24 VDC, sink) characteristics connection
Outputs (24 VDC, source) characteristics connection
Overflow index task
P
Parentheses
Password
Paste (an) instruction(s)
Peer PLC configuration description use/program
Periodic (scan)
PLC cycle
PLC diagnostics
PLC editor
PLC status
PLC status (SECURITY) output A 4/1
Post-processing (Grafcet)
Potentiometers description operation
Power return
Power supply
FTX 117
TSX 07
Pre-processing (Grafcet)
Preferences
Preset value (BLK.P)
Presetting (Grafcet)
Program clear create general insert modify save
Program animation
Program diagnostics
Program editor (Prg)
Program jump
Programmable input filters A 1/15, C 3/5
Protected outputs
PULSE (PLS) output A 4/7, B 3/18, C 3/7
PWM
PWM pulse generator
___________________________________________________________________________
A/18
Appendices
Q
Q (output)
%PLS
%TM
R
R (reset)
Boolean instruction
%C
%DR
%MSG
%R
%SBR
%SC
READ (%FC.V) B 3/22, B 3/24, C 4/2
Register (function blocks)
Relay outputs characteristics connection
REM
Replace
Reset (solid state outputs)
RET
Reversibility
ROL
ROR
RTC
RUN
RUN (LED)
RUN/STOP input
S
S (set)
Boolean instruction
%C
%FC
%SBR
%SC
C 2/17
Save data (data table) data to the PLC program to the PLC
program via terminal, back-up protected RAM, flash or card
Scan speed
Scan time description
operation
Scanning
normal, periodic
Schedule blocks (RTC)
Screen (FTX117)
Search
SECURITY (PLC status) output
Selecting
Sequential processing (Grafcet)
Service conditions
Shift (SHR, SHL, ROL, ROR)
SHL
SHORT
SHR
Software version
SQRT
SRi
ST, STN
Step (Grafcet)
Step counter
STOP
Stopping/starting the PLC via programmer
RUN/STOP input
Subroutine
Subtraction
System words
G
___________________________________________________________________________
A/19
G
T
TB (time base)
%PLS
%PWM
%TM
Terminal editor (FTX)
Terminal language (selection)
Terminal port
Threshold outputs A 4/3, B 3/21, C 3/6
Time-of-day clock date-stamping, measurement of duration description schedule block
setting date and time B 5/4, C 7/1
Timers
Transfer
Transistor output characteristics connection
Transition (Grafcet)
Tripping (solid state outputs)
Troubleshooting
TSX 07 wiring
TSX battery
U
U (%DR)
UNI-TELWAY
Up/down counter configuration function
V
Var (access variables not shown on the keypad)
Variable access
W
Watchdog
Word register
Word table
Words (definition, list)
X
XOR (on word)
XOR, XORN, XORF, XORR
#Di
#i
%Ci
%DRi
%EXCH
%FC
%IWxx
%Ix.y
%KWxx
%Li:
%MSG
%MWxx
%Mxx
%PLS
%PWM
%QWxx
%Qx.y
%Ri
%SBRi
%SCi
%SWxx
%Sxx
%TMi
%Xi
-*-i
=*=i
=*=POST
___________________________________________________________________________
A/20
Introduction
Thank you for purchasing the TSX07 Nano PLC. This document is intended to serve as an addendum to the TSX 07/FTX 117 user's manual. What follows are clarifications to the information contained in that manual. Future revisions of the manual will incorporate these changes.
As indicated in the TSX 07/FTX 117 users manual, the FTX 117 version 2.2
offers increased capability over the earlier versions of the terminal. Users that have the FTX 117 Terminal of version 2.1 or lower are encouraged to have their terminals upgraded to version 2.2. Please contact your local representative for more information.
Under each addendum title, a diagram indicates the types of PLC (TSX 07 2A,
TSX 07 2B, TSX 07 20, TSX 07 21) concerned. Relevant PLC types are highlighted in gray.
Addendum 1: Section B 3.1-2 - Structured Objects - Bit String Transfer
TSX 07 2A 2B 20 21
The following information should be added to this section:
The address of the first bit of a bit string must be a multiple of 8 (0, 8,
16,...96,...).
For example: %M64:6 is acceptable (64 is a multiple of 8)
%M17:16 is unacceptable (17 is not a multiple of 8).
As stated, this operation is concerned with the transfer of a contiguous string of bits (System Bits %Si:L, Grafcet Step Bits %Xi:L, Internal Memory Bits %Mi:L) for the following types of operations:
• Bit String --> Bit String,
• Bit String --> Word,
• Word--> Bit String,
• Immediate Value --> Bit String.
Using Version 2.2 or higher of the FTX 117 will prevent you from entering a bit address that is not a multiple of eight.
!
WARNING
UNITENTIONAL TRANSFER OF DATA
If you are using a FTX 117 version 2.1 or lower and you do not respect the multiple of eight rule the bit string transfer may result in affecting the value of other data areas (%MWi, %Xi....)
Failure to observe this precaution can cause equipment damage, personal injury or death
Note that, as stated in the ma nual, Input and Output bit strings (%I0:L and %Q0:L or %I1:L and %Q1:L), by definition, always start with an implied bit 0.
2
Addendum 2: Sections B 4.2 Schedule blocks
C 5.1 Configuring the schedule blocks (RTC)
TSX 07 2A 2B 20 21
The following information should be added to these sections:
1. With a FTX 117 terminal version V2.2 or higher
You can define up to 16 schedule blocks
- In Offline mode: you may create or delete up to 16 schedule blocks without restriction
- In Online mode: attempts at creating or deleting a 10 th schedule block is prevented by the terminal.
2. With a FTX 117 terminal version V2.1 or lower
You can define up to 9 schedule blocks
- In either Offline or Online mode, any attempt to create or delete a 10 th schedule block will result in a PLC error condition that will require the reloading of your program. If you are using schedule blocks, we encourage you to upgrade your terminal to version 2.2.
Addendum 3: Sections A 1.10 Status Display of PLC and the I/O
D 1.1 Troubleshooting using the PLC status LEDs
TSX 07 2A 2B 20 21
The following information should be added to this section:
The TSX 07 PLC's allow the user to control some of the LED status lights on the front face of the PLC.
In the version of the PLC referred to as the TSX 07 2A/2B PLCs (TSX072A•••• and TSX072B••••) the user can use memory bit %M112 to control the ERR light, on the front of the PLC, to indicate a user application error. The TSX07 operating system also uses this light to indicate a number of PLC errors as well.
If you wish to use the ERR light exclusively for system errors, avoid using the %M112 memory bit on the TSX 07 2A/2B PLCs.
Note : This feature has been enhanced in the TSX07 20/21 PLCs (TSX0720•••• and
TSX0721••••). In these PLCs, the ERR light is no longer used. Instead, memory bits
%M112 through %M127 can be used to control the I/O status lights as documented in the User'smanual (refer to sections A 1.9 and D 1.1).
3
Addendum 4: Sections C 4.2 Creating a program
C 4.3 Modifying a program
C 4.5 Programming Diagnostics
C 8.4 Modifying the Program in RUN Mode
TSX 07 2A 2B 20 21
To ensure a valid program exists, checks are performed (syntax diagnostics) by the terminal whenever a program is created or modified.
The time needed to perform the check varies depending on the size of the program and the instructions used.
1. In Offline mode
- With a FTX 117 terminal version V2.2 or higher the syntax diagnostic check is performed:
• At the User's request (in the program editor, menu option 3 Dgn)
• When transferring the program (in the program editor, menu option 1 Trf)
• When leaving the program editor (pressing the 'Edit' key)
In this way, the syntax check is made only once.
- With a FTX 117 terminal version V2.1 or lower the syntax diagnostic check is performed every time that you enter a "structuring" instruction such as function blocks (including timers and counters), stack operations and parenthetical AND's and OR's (refer to the instructions listed in Section G A.4).
2. In Online mode
For TSX07 PLCs version 2.2 or lower, the Online mode can provide a rapid means of modifying programs, especially in startup or machine trouble shooting situations. Basic programming/addressing changes, data modifications and configuration changes can be performed given that the precautions noted below are followed.
- PLC in RUN
Inserting, deleting, modifying "structuring" instructions is prevented by the
FTX 117 terminal.
- PLC in STOP
For TSX07 PLCs, version 2.2 or lower, we recommend that modifications of the program be made Offline if the modifications involve the structuring instructions as listed in Section G.A.4. In these PLCs, the watchdog may be triggered when the diagnostic syntax check is made, requiring a reinitialization
(ERR LED flashing) or power cycling (ERR LED lit continously) of the PLC.
4
Addendum 5 : Section B 3.1-6 Numerical instructions
TSX 07 2A 2B 20 21
Division (syntax [Op1 := Op2 / Op3]) or the remainder of division of 2
operands (syntax [Op1 := Op2 REM Op3]): With TSX 07 PLCs versionV2.2 or lower, the result of theses two operations is not significant when operand 3
(Op3) contains a value greater than 255.
Addendum 6 : Section B 3.3-6 SEND message transmission
Comments
TSX 07 2A 2B 20 21
When using the SEND instruction with an internal word table as an operand
(syntax [SEND %MWi:L]), non-retentive memory for word table should be use, i.e, the internal word table %MWi:L must have a base address of 16 or greater to ensure proper message transmission (i>15), and the table length must not exceed %MW255 (i+L<256).
Addendum 7 : Section B 2.3 Grafcet instructions
Addendum 7 : Section B 2.4-3 JUMP instruction to a label %Li
Addendum 7 : Section B 2.4-4 Subroutine instr. SRi, SRi:, RET,
TSX 07 2A 2B 20 21
The number i in a label (%Li:), in a subroutine declaration (SRi:) or in a Grafcet step (-*-i or =*=i) must be defined only once in a program.
With TSX 07 PLC version V2.2 or lower when on-line, or a FTX 117 Terminal version 2.2 or lower when off-line, any attempt to modify the number (i) to another number already existing elsewhere in the program will result in an invalid application, and the program will have to be reloaded.
Addendum 8 : Section B 2.4-5 Master control relay instructions
MCR and MCS
TSX 07 2A 2B 20 21
With TSX 07 PLC version V2.0 or V2.2, operate blocks must not be used between a MCS instruction and a MCR instruction.
!
WARNING
UNINTENTIONAL EQUIPMENT OPERATION
Do not program numerical instructions within a master control relay
(MCR/MCS) zone or the application program will run based on erroneous input image table information, causing unintentional output activation.
Failure to observe this precaution can result in equipment damage, severe personal injury or death.
5
Addendum 9 : Section B 4.2-1 Time-based programming
TSX 07 2A 2B 20 21
When using the real time Schedule Blocks with TSX 07s version V2.2 or lower, a cold restart must be performed by the program (by setting the system bit %S0 to 1) after each warm restart (system bit %S1 set to 1 by the operating system) to maintain proper schedule block operation. To do so, add the following 2 lines to the beginning of the program:
LD %S1 If %S1=1 (warm restart), then set system bit %S0 (cold restart) to 1 to
ST %S0 initialize. The system resets both of these bits to 0 at the end of the next scan cycle.
If the consequences resulting from the cold restart are incompatible with the application being controlled, do not use the real time Schedule Blocks, but program the equivalent functionality using the system words containing the current date and time (%SW50 to %SW53).
The following is true concerning a cold restart:
• internal bits %Mi, I/O bits %I/%Q: set to 0,
• system bits and words %Si and %SWi (except %S0): initialized with their default value.
• function blocks %TMi - %Ci: current values of %TMi.V - %Ci.V set to 0, loss of adjustment values with initialization of %TMi.P - %Ci.P% to the values defined during configuration.
• register blocks %Ri: contents of registers set to 0.
• drum controller blocks %DRi: initialized to step 0 with updating of command bits.
• counter function %FC: current value of %FC.V, outputs %FC.F, %FC.THi, and validation bit of Threshold outputs %SW111:X1 set to 0. Loss of adjustment values with initialization of %FC.P and %FC.Si to the values defined during configuration.
• shift bit register function blocks %SBRi: all %SBRi.j set to 0,
• step counter function blocks %SCi: loss of current step and initialization to step 0
%SCi.0,
• %PWM and %PLS functions: loss of adjustment values with initialization of
%PWM.P and %PLS.P to values defined during configuration,
• Schedule Blocks (RTC): real-time clock data defined at configuration retained.
• SEND message transmission : communication initialized %MSG.E=0 and
%MSG.D=1
• forcing: cancellation of forced bits,
• Grafcet: deactivation of steps -*-i and activation of initial step =*=i,
• restart execution cycle from beginning with bits %S0 and %S1 set to 0 at the end of the cycle.
6
Modicon
Instruction de service.
Quick Reference Guide.
Kurzanleitung.
Sortie analogique Analog Output Analogausgang
Guia de referencias rapidas.
Salida analógica
TSX ASN 101 (0…10V)
Wiring Diagram
TSX ASN 102 (4…20mA)
Parts description
Guida de riferimento rapido
Uscita analogico
TSX ASN 105 (-10…+10V)
Installation
1
SCE
(3)
TSX 07 3•
••02/08
Sink output
OUT
COM
0 1 2 3 +V OUT
COM
0
SINK
TSX 07 3•
••12
Source output
1 2 3 -V
+ —
24V DC
TSX NANO
OUTPUT
………
SCE
SINK
POWER
ANALOG OUTPUT
ANALOG
OUTPUT
+ —
TO TSX
(OUT 0)
2
3
4
5
(1)
6
Shield wire
+
–
24 VDC
External
FG
Power
Supply
(2)
Speed
Controller
(1) 2 m max. with
∅
0.5 mm shielded cable.
(2) 50 m max. with
∅
0.5 mm shielded cable (shielding connected at module end).
(3) These product referencies will be available during 97.
Présentation
Les modules TSX ASN 10. permettent l'utilisation d'une sortie analogique sur les automates TSX Nano à sorties statiques V3.
Principe de Fonctionnement
Les modules TSX ASN 10. réalisent une conversion fréquence -> tension/ courant, ce qui nécessite de connecter l'entrée fréquence du module à la sortie
Q0.0 de l'automate, configurée en fonction PWM (base de temps de 0,1 ms).
Le choix du mode de fonctionnement analogique est déterminé par paramètrage du mot %SW102.
L'image de la valeur de la sortie analogique à générer est écrite dans le mot
%SW103.
%SW102 Fonctionnement
0
1
2
3
Mode analogique invalide
Gestion sans mise à l'échelle
Mise à l'échelle
Mise à l'échelle
Valeurs de %SW103
Non utilisée
5...249
0...+10000
-10000...+10000
La résolution effective de la sortie analogique est de 245 points.
Cas particulier
Lorsque la valeur écrite dans %SW103 est hors bornes par rapport à la gamme sélectionnée, le signal appliqué au module de sortie analogique prend pour valeur la borne la plus proche.
Ex: pour %SW102 =1 (gamme 5...249) et %SW103 = 2 la valeur appliquée est
égale à 5.
Attention
En cas de repli des sorties TOR de l'automate (mise à zéro), le module TSX
ASN 105 (-10V...+10 V) délivre une tension égale à -10 V.
Presentation
TSX ASN 10. modules enable an analog output to be used on TSX Nano PLCs with V3 solid-state outputs.
Operating Principle
TSX ASN 10. modules perform frequency -> voltage/current conversion, which requires the frequency input of the module to be connected to the PLC Q0.0
output, configured as a PWM function (time base 0.1 ms).
The analog operating mode is selected by setting the parameters of word
%SW102.
The image of the analog output value to be generated is written in word
%SW103.
%SW102 Operation
0
1
2
3
Invalid analog mode
Managed without scaling
Scaling
Scaling
%SW103 value
Not used
5...249
0...+10000
-10000...+10000
The effective resolution of the analog output is 245 points.
Special case
If the value written in %SW103 is outside the limits of the range selected, the signal applied to the analog output module takes the nearest limit as its value.
Eg : if %SW102 =1 (range 5...249) and %SW103 = 2, the applied value is 5.
Attention
If the PLC discrete outputs are in fallback mode (set to zero), the TSX ASN 105 module (-10V...+10 V) will deliver a voltage equal to -10 V.
1 Power supply terminals
2 Ground terminal
3 Power indicator
4 Freq input selector switch
5 Frequency input terminal
6 Analog output terminals
Connection equipment
Each terminal may receive bare wires or wires equipped with cables ends, open or closed cable lugs.
Install the D/A converter unit on a 35 mm wide
DIN rail or a panel surface using the mounting hole layout shown below.
(A)
∅
M4 tapped holes or
∅
4,5 (0,177") drilled holes for mounting TSX ASN ...
TSX NANO PLC TSX ASN ...
(A)
5.5 mm max.
∅
3.2 mm min.
Caractéristiques électriques et d'environnement
20 min.
(0.787")
35
(1.378")
45
Sortie analogique Nombre de voie
Impédance de charge
1 (haut niveau)
≤
5 K
Ω
(2)
≤
250
Ω
(3)
Tension maxi adm sans destruction +/- 12 V(2) +/- 0,6 V(3)
Conversion Méthode de conversion
Résolution
F (Hz) -> U (V)
8 bits
Entrée fréquence
Temps de conversion
Précision
Tension nominale
Logique
0 à 95% 500 ms
+/- 1% de 0 à 60
°
C (1)
24 VDC
Positive ou négative
Alimentation
Normes
Tension nominale
Tensions limites
24 VDC
21...30 VDC
Environnement climatique
Puissance absorbée 2,5 W
Isolement
Courant d'appel
Entre l'alimentation et la terre
10 A maxi
1500 V AC >10 M
Ω
Tension/Résistance Entre l'entrée ou la sortie et la terre 1500 V AC >10 M
Ω
Entre l'entrée fréquence et la sortie 500 V AC >10 M
Ω
Chocs 300 m/s 2 , 3 chocs par axe, 3 axes
Vibrations 5 à 55 Hz, 60 m/s 2 , 2 heures par axe, 3 axes
Température de fonctionnement
Température de stockage
0...60
°
C
- 20
°
C...+70
°
C
Humidité relative 45...85% (sans cond)
Selon IEC 1131-2, UL508, CSA 22.2 et marquage CE
(Directives Européennes Basse Tension et CEM)
(1) Pleine échelle
(2) Modules (0...10 V) et (-10...+10 V)
(3) Module (4...20 mA)
Electrical and environmental characteristics
Analog output
Conversion
Channel number
Load impedance
Max permitted safe voltage
Conversion method
Resolution
1 (high level)
≤
5 K
Ω
(2)
≤
250
Ω
(3)
+/- 12 V(2) +/- 0.6 V(3)
F (Hz) -> U (V)
Frequency input
Conversion time
Precision
Nominal voltage
Logic
8 bits
0 to 95% 500 ms
+/- 1% from 0 to 60
°
C (1)
24 VDC
Positive or negative
Power supply
Vibrations
Climatic environment
Nominal voltage
Voltage range
24 VDC
21...30 VDC
Power consumption 2.5 W
Insulation
Inrush current
Between power supply and ground
10 A max
1500 V AC >10 M
Ω
Voltage/Resistance Between input or output and ground 1500 V AC >10 M
Ω
Between frequency input and the output 500 V AC >10 M
Ω
Shocks 300 m/s 2 , 3 shocks per axis, 3 axes
5 to 55 Hz, 60 m/s 2 , 2 hours per axis, 3 axes
Operating temperature
Storage temperature
0...60
°
C
- 20
°
C...+70
°
C
Relative humidity 45...85% (without
Standards condensation)
Conforms to IEC 1131-2, UL508, CSA 22.2 and CE marking
(European Low Voltage and EMC directives)
(1) Full scale
(2) Modules (0...10 V) and (-10...+10 V)
(3) Module (4...20 mA)
I
S
H
E
N
G
L
O
N
S
C
O
M
M
F
R
A
N
C
A
I
S
W9 1329 411 08 01 A01 1 Décembre 1996
467169
Beschreibung
Die Module TSX ASN 10. bieten zusätzliche Analogausgangsfunktionen für
Steuerungen des Typs TSX Nano mit Transistorausgängen V3.
Funktionsprinzip
Die Module TSX ASN 10. führen eine Frequenz-Spannungs-(bzw.Strom-)konversion durch. Aus diesem Grunde ist der Frequenzeingang des Moduls an den Ausgang Q0.0 der SPS zu legen (konfiguriert als PMW-Ausgang mit
Zeitbasis 0,1 ms). Die Wahl des analogen Funktionsmodus erfolgt durch
Parametrierung des Worts %SW102.
Das Abbild des zu generierenden analogen Ausgangswerts wird in das Wort
%SW103 geschrieben.
%SW102 Funktionsmodus
0
1
2
3
Analogmodus deaktiviert keine Skalierung
Skalierung
Skalierung
Werte von %SW103 nicht verwendet
5...249
0...+10000
-10000...+10000
Die effektive Auflösung des Analogausgangs beträgt 245 Punkte.
Sonderfall
Wenn der in %SW103 geschriebene Wert außerhalb der Bereichsgrenzen liegt, nimmt das an das Analogausgangsmodul übertragene Signal den Wert der nächstliegenden Grenze an.
Z.B: bei %SW102 =1 (Bereich 5...249) und %SW103 = 2 wird ein Signal entsprechend dem Wert 5 übertragen.
Achtung
Bei Übergang der digitalen Ausgänge der Steuerung in den Fehlerzustand (Setzen auf 0), liefert das Modul TSX ASN 105 (-10V...+10 V) eine Spannung von -10 V.
Presentación
Los módulos TSX ASN 10. admiten la utilización de una salida analógica en los autómatas TSX Nano con salidas estáticas de 3V.
Principio de funcionamiento
Los módulos TSX ASN 10. realizan una conversión de frecuencia -> tensión/ corriente, por lo que se tendrá que conectar la entrada de frecuencia del módulo a la salida Q0.0 del autómata, configurada en función PWM (base de tiempo de
0,1 ms).
La selección del modo de funcionamiento analógico se determina mediante la definición de los parámetros de la palabra %SW102.
La imagen del valor de la salida analógica que se va a generar se escribe con la palabra %SW103.
%SW102 Funcionamiento
0 Modo analógico inútil
1
2
Gestión sin puesta en escala
Puesta en escala
3 Puesta en escala
Valores de %SW103
No utilizada
5...249
0...+10000
-10000...+10000
Elektrische Kenndaten und Umgebungsdaten
Analogausgang
Konversion
Anz. Kanäle
Impedanz der Last
1 (hohe Auflös.)
≤
5 K
Ω
(2)
≤
250
Ω
(3)
Max. Spannung ohne Beschädigung +/- 12 V(2) +/- 0,6 V(3)
Konversionsmethode F (Hz) -> U (V)
Frequenseingang
Versorgung
Auflösung
Konversionsdauer
Präzision
Nominalspannung
Logik
Nominalspannung
Grenzspannungen
8 Bits
0 bis 95% 500 ms
+/- 1% von 0 - 60
°
C (1) a 24 V positiv oder negativ a 24 V
21...30 V
Verlustleistung 2,5 W
Isolierung
Einschaltstrom zwischen Versorgung und Erde
10 A max.
c 1500 V >10 M
Ω
Spannung/Widerst.
zwischen Eingang/Ausgang und Erde c 1500 V >10 M
Ω zw. Frequenzeingang und Ausgang c 500 V >10 M
Ω
Stoß 300 m/s 2 , 3 Stöße pro Achse, 3 Achsen
Erschütterung
Umgebung
5 bis 55 Hz, 60 m/s 2
Betriebstemperatur
Lagertemperatur
, 2 Std. pro Achse, 3 Achsen
0...60
°
C
- 20
°
C...+70
°
C
Relative Luftfeuchte 45...85% (ohne Kond.)
Normen Gemäß IEC 1131-2, UL508, CSA 22.2 und CE-Siegel
(Europäische Richtl. für Niederspannungssysteme und CEM)
(1) Voller Bereich
(2) Module (0...10 V) et (-10...+10 V)
(3) Modul (4...20 mA)
Características eléctricas y del entorno
Salida analógica
Conversión
Número de vía
Impedancia de carga
1 (alto nivel)
≤
5 K
Ω
(2)
≤
250
Ω
(3)
Tensión máx. adm. sin destrucción +/- 12 V(2) +/- 0,6 V(3)
Método de conversión
Resolución
F (Hz) -> U (V)
8 bits
Tiempo de conversión
Precisión
Entrada frecuencia Tensión nominal
Lógica de 0 a 95% 500 ms
+/- 1% de 0 a 60
°
C (1)
24 VCC
Positiva o negativa
Alimentación
Normas
Tensión nominal
Tensiones límites
24 VCC
21...30 VCC
Entorno climático
Potencia absorvida 2,5 W
Aislamiento
Corriente de llamada
Entre la alimentación y la tierra
10 A máximo
1500 V CA >10 M
Ω
Tensión/Resistencia Entre la entrada o la salida y la tierra 1500 V CA >10 M
Ω
Entre la entrada frecuencia y la salida 500 V CA >10 M
Ω
Choques 300 m/s 2 , 3 choques por eje, 3 ejes
Vibraciones 5 a 55 Hz, 60 m/s 2 , 2 horas por eje, 3 ejes
Temperatura de funcionamiento
Temperatura de almacenamiento
0...60
°
C
- 20
°
C...+70
°
C
Humedad relativa 45...85% (sin cond.)
Según IEC 1131-2, UL508, CSA 22.2 y marcas CE
(Directivas Europeas Baja Tensión y CEM)
(1) Escala completa
(2) Módulos (0...10 V) y (-10...+10 V)
(3) Módulo (4...20 mA)
Ñ
O
L
E
S
P
A
La resolución efectiva de la salida analógica es de 245 puntos.
Caso particular
Cuando el valor escrito en %SW103 no está limitado respecto a la gama seleccionada, la señal aplicada al módulo de salida analógica toma como valor el límite más cercano.
Ej.: para %SW102 =1 (gama 5...249) y %SW103 = 2 el valor aplicado es 5.
Atención
En caso de reposición de las salidas TON del autómata (paso a cero), el módulo
TSX ASN 105 (-10V...+10 V) libera una tensión igual a -10 V.
Presentazione
I moduli TSX ASN 10. permettono di utilizzare un'uscita analogica sui PLC TSX
Nano ad uscite statiche V3.
Principio di funzionamento
I moduli TSX ASN 10. consentono di realizzare una conversione frequenza -> tensione/corrente collegando l'ingresso di frequenza del modulo all'uscita Q0.0
del PLC, configurato in funzione PWM (base dei tempi 0,1 ms).
La scelta del modo di funzionamento analogico avviene tramite la parametrizzazione della parola %SW102.
L'immagine del valore dell'uscita analogica da generare è scritta nella parola
%SW103.
%SW102 Funzionamento
0 Modo analogico non valido
1
2
Gestione senza scalatura
Con scalatura
3 Con scalatura
Valori di %SW103
Non utilizzati
5...249
0...+10000
-10000...+10000
La risoluzione effettiva dell'uscita analogica è di 245 punti.
Caso particolare
Quando il valore scritto in %SW103 è fuori limite rispetto al campo selezionato, il segnale applicato al modulo d'uscita analogico assume come valore il limite più vicino.
Es: per %SW102 =1 (campo 5...249) e %SW103 = 2 il valore applicato è uguale a 5.
Attenzione
In caso di posiz. di sicurezza delle uscite digitali del PLC (azzeramento), il modulo TSX ASN 105 (-10V...+10 V) fornisce una tensione uguale a -10 V.
W9 1329 411 08 01 A01 2
Caratteristiche elettriche e ambientali
Uscita analogica
Conversione
Numero di canale
Impedenza di carico
Tensione max appl. senza danni
Metodo di conversione
Risoluzione
1 (livello alto)
≤
5 K
Ω
(2)
≤
250
Ω
(3)
+/- 12 V(2) +/- 0,6 V(3)
F (Hz) -> U (V)
Tempo di conversione
Precisione
Ingresso frequenza Tensione nominale
Logica
8 bits da 0 a 95% 500 ms
+/- 1% da 0 a 60
°
C (1)
24 VDC
Positiva o negativa
Alimentazione
Normativa
Tensione nominale
Tensioni limite
24 VDC
21...30 VDC
Vibrazioni
Ambiente
Assorbimento 2,5 W
Isolamento
Corrente di lavoro
Tra alimentazione e messa a terra
10 A maxi
1500 V AC >10 M
Ω
Tensione/Resistenza Tra ingresso o uscita e messa a terra 1500 V AC >10 M
Ω
Tra l'ingresso di frequenza e l'uscita 500 V AC >10 M
Ω
Shock 300 m/s 2 , 3 shock per asse, 3 assi da 5 a 55 Hz, 60 m/s 2 , 2 ore per asse, 3 assi
Temperatura di funzionamento 0...60
°
C
Temperatura di immagazzinamento - 20
°
C...+70
°
C
Umidità relativa 45...85% (senza cond.)
Secondo IEC 1131-2, UL508, CSA 22.2 e marchio CE
(Direttive Europee per la Bassa Tensione e CEM)
(1) Fondo scala
(2) Moduli (0...10 V) e (-10...+10 V)
(3) Modulo (4...20 mA)
Décembre 1996
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Modicon
Instruction de service.
Quick Reference Guide.
Kurzanleitung.
Entrée analogique Analog input Analogeingang
Guia de referencias rapidas.
Entrada analógica
Guida de riferimento rapido
Ingresso analogico
TSX AEN 101 (0…10V)
Wiring Diagram
SCE
+ —
IN
COM
0
+
–
FG
24 VDC
External
Power
Supply
(1)
SINK
+ —
IN
COM
0
TSX AEN 102 (4…20mA)
Parts description
1
1 Power supply terminals
2 Ground terminal
+
—
24V DC
TSX NANO
INPUT
………
SINK
POWER
SCE
ANALOG INPUT
ANALOG
INPUT
+ —
TO TSX
(IN 0)
2
3
4
5
3 Power indicator
4 Freq output selector switch
5 Frequency output terminal
6 Analog input terminals
Connection equipment
6
Each terminal may receive bare wires or wires equipped with cables ends, open or closed cable lugs.
(2)
TSX Nano
Sink input
TSX Nano
Source input
Sensor
Shield wire
(1) 2 m max. with
∅
0.5 mm shielded cable.
(2) 50 m max. with
∅
0.5 mm shielded cable (shielding connected at module end).
Présentation
Les modules TSX AEN 10. permettent l'utilisation d'une entrée analogique sur les automates TSX Nano à entrées continues V2 (*) et V3.
Principe de Fonctionnement
Les modules TSX AEN 10. réalisent une conversion tension/courant ->fréquence linéaire ce qui nécessite de connecter la sortie fréquence du module à l'entrée I0.0 de l'automate (configurée en fréquencemètre à 10 KHz).
Le choix du mode de fonctionnement analogique est déterminé par paramètrage du mot %SW100.
L'image de la valeur d'entrée analogique est écrite dans le mot %SW101.
%SW100 Fonctionnement
0 Mode analogique invalide
1 Gestion sans mise à l'échelle
4
5
2
3
Mise à l'échelle
Mise à l'échelle
Mise à l'échelle
Mise à l'échelle
Valeurs de %SW101
0
0...1000 Tc = 125 ms
0...+10000 Tc = 125 ms
-10000...+10000 Tc = 125 ms
0...+10000 Tc = 500 ms
-10000...+10000 Tc = 500 ms
Le nombre d'impulsions comptées est disponible dans le mot %FC.V. Elle est fonction du temps de conversion Tc. (125 ms -> 0...1000; 500 ms -> 0...4000)
(*) U tilisation avec les TSX Nano V2 (TSX 07 2 i iiii )
L'image de la valeur d'entrée analogique n'est disponible que dans le mot
%FC.V. La fréquence générée étant de 8 KHz à pleine échelle, la valeur d'entrée analogique réelle est obtenue à l'aide des formules suivantes :
Module 0...10 V U(V) = 1,25 x (%FC.V x 10 -3 )
Module 4...20 mA I(mA) = 2 x [(%FC.V x 10 -3 ) + 2]
Module -10...+10 V U(V) = 2,5 x [(%FC.V x 10 -3 ) - 4]
5.5 mm max.
∅
3.2 mm min.
TSX AEN 105 (-10…+10V)
Installation
Install the A/D converter unit on a 35 mm wide
DIN rail or a panel surface using the mounting hole layout shown below.
(A)
∅
M4 tapped holes or
∅
4,5 (0,177") drilled holes for mounting TSX AEN ...
TSX NANO PLC TSX AEN ...
(A)
20 min.
(0.787")
35
(1.378")
45
Caractéristiques électriques et d'environnement
Entrée analogique Nombre de voie
Impédance d'entrée
1 (haut niveau)
6,6 M
Ω
(4) 250
Ω
(5)
Tension maxi adm sans destruction +/- 16 V
Conversion Méthode de conversion
Résolution
U (V) -> F (Hz)
10 bits ou 12 bits
Sortie fréquence
Alimentation
Temps de conversion
Précision
Tension nominale
Logique
125 ms (2) 500 ms (3)
+/- 1% de 0 à 60
°
C (1)
24 VDC
Positive ou négative
Protection contre les courts circuits Non
Tension nominale 24 VDC
Tensions limites
Puissance absorbée
21...30 VDC
2,5 W
Isolement
Courant d'appel
Entre l'alimentation et la terre
10 A maxi
Tension/Résistance Entre l'entrée ou la sortie et la terre 1500 V AC >10 M
Ω
(sous 500VDC)
1500 V AC >10 M
Ω
Entre l'entrée et la sortie fréquence 500 V AC >10 M
Ω
Chocs 300 m/s 2 , 3 chocs par axe, 3 axes
Vibrations
Environnement climatique
5 à 55 Hz, 60 m/s 2 , 2 heures par axe, 3 axes
Température de fonctionnement
Température de stockage
0...60
°
C
- 20
°
C...+70
°
C
Normes
Humidité relative 45...85% (sans cond)
Selon IEC 1131-2, UL508, CSA 22.2 et marquage CE
(Directives Européennes Basse Tension et CEM)
(1) Pleine échelle (2) Résolution 10 bits
(4) Modules (0...10 V) et (-10...+10 V)
(5) Module (4...20 mA)
(3) Résolution 12 bits
Presentation
TSX AEN 10. modules enable an analog input to be used on TSX Nano PLCs with continuous inputs V2 (*) and V3.
Operating principle
TSX AEN 10. modules perform a linear voltage/current -> frequency conversion which requires the module frequency output to be connected to input I0.0 of the
PLC (configured as frequency meter at 10 KHz).
The analog operating mode selection is determined by the parameter setting for word %SW100.
The image of the analog input value is written in word %SW101.
%SW100 Operation
0 Invalid analog mode
1 Management without scaling
4
5
2
3
Scaling
Scaling
Scaling
Scaling
Values of %SW101
0
0...1000 Tc = 125 ms
0...+10000 Tc = 125 ms
-10000...+10000 Tc = 125 ms
0...+10000 Tc = 500 ms
-10000...+10000 Tc = 500 ms
The number of pulses counted is available in word %FC.V. It is a function of the conversion time Tc. (125 ms -> 0...1000; 500 ms -> 0...4000)
(*) U se with TSX Nano V2 (TSX 07 2 i iiii )
The image of the analog input value is only available in word %FC.V. The frequency generated is 8 KHz at full scale, the real analog input value is obtained using the following formulae :
Module 0...10 V U(V) = 1.25 x (%FC.V x 10 -3 )
Module 4...20 mA I(mA) = 2 x [(%FC.V x 10 -3 ) + 2]
Module -10...+10 V U(V) = 2.5 x [(%FC.V x 10 -3 ) - 4]
Electrical and environmental characteristics
Analog input
Conversion
Frequency output
Channel number
Input impedence
1 (high level)
6.6 M
Ω
(4) 250
Ω
(5)
Max perm. volt. without destruction +/- 16 V
Conversion method U (V) -> F (Hz)
Resolution
Conversion time
Precision
Nominal voltage
Logic
10 bits or 12 bits
125 ms (2) 500 ms (3)
+/- 1% of 0 to 60
°
C (1)
24 VDC
Positive or negative
Power supply
Protection against short circuits
Nominal voltage
Limit voltages
Power drawn
No
24 VDC
21...30 VDC
2.5 W
Isolation
Inrush current
Between power supply and ground
10 A max.
Voltage/Resistance Between input or output and ground 1500 V AC >10 M
Ω
(at 500VDC)
1500 V AC >10 M
Ω
Between input and frequency output 500 V AC >10 M
Ω
Shocks 300 m/s 2 , 3 shocks per axis, 3 axes
Vibrations
Climatic environment
5 to 55 Hz, 60 m/s 2 , 2 hours per axis, 3 axes
Operating temperature
Storage temperature
0...60
°
C
- 20
°
C...+70
°
C
Standards
Relative humidity 45...85% (without cond)
Conforming to IEC 1131-2, UL508, CSA 22.2 and CE marking
(Low Frequency and EMC European directives)
(1) Full scale (2) 10-bit resolution
(4) Modules (0...10 V) and (-10...+10 V)
(5) Module (4...20 mA)
(3) 12-bit resolution
W9 1329 402 08 01 A01 1 Septembre 1996
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Beschreibung
Die Module TSX AEN 10. ermöglichen die Konfiguration eines Analogeingangs auf Steuerungen des Typs TSX Nano mit Gs-Eingängen V2 (*) und V3.
Funktionsprinzip
Die Module TSX AEN 10. führen eine lineare Frenquenzkonversion eines
Spannungs-/Stromwerts durch. Der Frequenzausgang des Moduls ist daher mit dem Eingang I0.0 (als Frequenzmesser konfiguriert) der SPS zur verbinden.
Der analoge Funktionsmodus wird durch Parametrierung des Worts %SW100 bestimmt.
Das Image des analogen Eingangswerts wird in das Wort %SW101 geschrieben.
%SW100 Funktionsmodus
0 Analogmodus deaktiviert
1 Verarbeit. ohne Skalierung
4
5
2
3
Skalierung
Skalierung
Skalierung
Skalierung
Wert von %SW101
0
0...1000 Tc = 125 ms
0...+10000 Tc = 125 ms
-10000...+10000 Tc = 125 ms
0...+10000 Tc = 500 ms
-10000...+10000 Tc = 500 ms
Der Impulszählwert kann in Wort %FC.V abgelesen werden. Dieser Wert ist abhängig von der Konversionszeit Tc (125 ms -> 0...1000; 500 ms -> 0...4000).
(*) Einsatz mit SPS des Typs TSX Nano V2 (TSX 07 2 i iiii )
Das Image des analogen Eingangswerts kann nur in Wort %FC.V abgelesen werden. Da die bei vollem Skalenwert generierte Frequenz 8 kHz beträgt, läßt sich der tatsächliche analoge Eingangswert durch folgende Formeln berechnen:
Modul 0...10 V
Modul 4...20 mA
U(V) = 1,25 x (%FC.V x 10 -3 )
I(mA) = 2 x [(%FC.V x 10 -3 ) + 2]
Modul -10...+10 V U(V) = 2,5 x [(%FC.V x 10 -3 ) - 4]
Elektrische Kenndaten und Umgebungskenndaten
Analogeingang
Konversion
Anzahl Kanäle
Eingangsimpedanz
1 (Hochleistung)
6,6 M
Ω
(4) 250
Ω
(5)
Max. zul. Spannung ohne Beschäd.
+/- 16 V
Konversionsmethode U (V) -> F (Hz)
Versorgung
Auflösung
Konversionszeit
Präzision
Frequenzausgang Nennspannung
Logik
Kurzschlußschutz
Nennspannung
10 Bit oder 12 Bit
125 ms (2) 500 ms (3)
+/- 1%, 0 bis 60
°
C (1)
24 VGs positive oder negative nicht vorhanden
24 VGs
Grenzspannungen
Verlustleistung
21...30 VGs
2,5 W
Isolierung
(bei 500VDC)
Einschaltstrom zwischen Versorgung und Erde
10 A max.
1500 VWs >10 M
Ω
Spannung/Widerst.
zw. Eingang/Ausgang und Erde 1500 VWs >10 M
Ω zw. Eingang und Frequenzausgang 500 VWs >10 M
Ω
Stoß 300 m/s 2 , 3 Stöße/Achse, 3 Achsen
Erschütterung
Umgebungswerte
5 bis 55 Hz, 60 m/s 2
Betriebstemperatur
Lagertemperatur
, 2 h pro Achse, 3 Achsen
0...60
°
C
- 20
°
C...+70
°
C reL .Luftfeuchte
45...85% (ohne Kond.)
Normen Entspr. IEC 1131-2, UL508, CSA 22.2 und CE-Siegel
(Europ. Richtlinien für Niederspannung und CEM)
(1) Voller Skalenbereich
(4) Module (0...10 V) und (-10...+10 V)
(5) Modul (4...20 mA)
(2) Auflösung 10 Bit (3) Auflösung 12 Bit
Presentación
Los módulos TSX AEN 10. permiten el uso de una entrada analógica en los autómatas TSX Nano con entradas continuas V2 (*) y V3.
Funcionamiento
Los módulos TSX AEN 10. realizan una conversión tensión/corriente ->frecuencia lineal. Esto requiere la conexión de la salida frecuencia del módulo a la entrada
I0.0 del autómata (configurada en frequencímetro a 10 kHz).
El parametraje de la palabra %SW100 determina la selección del modo de funcionamiento analógico.
La imagen del valor de entrada analógica se escribe en la palabra %SW101.
%SW100 Funcionamiento
0 Modo analógico inválido
3
4
1
2
5
Gestión puesta a escala
Puesta a escala
Puesta a escala
Puesta a escala
Puesta a escala
Valores de %SW101
0
0...1000 Tc = 125 ms
0...+10000 Tc = 125 ms
-10000...+10000 Tc = 125 ms
0...+10000 Tc = 500 ms
-10000...+10000 Tc = 500 ms
El número de impulsos contados está disponible en la palabra %FC.V. Esta depende del tiempo de conversión Tc. (125 ms -> 0...1000; 500 ms ->
0...4000)
(*) U tilización con los TSX Nano V2 (TSX 07 2 i iiii )
La imagen del valor de entrada analógica sólo está disponible en la palabra
%FC.V. Puesto que la frecuencia generada es de 8 KHz al máximo de la escala, el valor de entrada analógica real se obtiene con las fórmulas siguientes:
Módulo 0...10 V U(V) = 1,25 x (%FC.V x 10 -3 )
Módulo 4...20 mA I(mA) = 2 x [(%FC.V x 10 -3 ) + 2]
Módulo -10...+10 V U(V) = 2,5 x [(%FC.V x 10 -3 ) - 4]
Presentazione
I moduli TSX AEN 10. permettono di utilizzare un ingresso analogico sui PLC
TSX Nano ad ingressi in CC V2 (*) e V3.
Principio di funzionamento
I moduli TSX AEN 10. consentono di realizzare una conversione tensione/ corrente ->frequenza lineare per la quale occorre collegare l'uscita di frequenza del modulo all'ingresso I0.0 del PLC (configurato ad una frequenza di 10 KHz).
La scelta del modo di funzionamento analogico avviene tramite la parametrizzazione della parola %SW100.
L'immagine del valore d'ingresso analogico è scritta nella parola %SW101.
%SW100 Funzionamento
0 Modo analogico non valido
1 Gestione senza scalatura
4
5
2
3
Con scalatura
Con scalatura
Con scalatura
Con scalatura
Valori di %SW101
0
0...1000 Tc = 125 ms
0...+10000 Tc = 125 ms
-10000...+10000 Tc = 125 ms
0...+10000 Tc = 500 ms
-10000...+10000 Tc = 500 ms
Il numero di impulsi contati è contenuto nella parola %FC.V. Essa è funzione del tempo di conversione Tc. (125 ms -> 0...1000; 500 ms -> 0...4000)
(*) U tilizzo con i TSX Nano V2 (TSX 07 2 i iiii )
L'immagine del valore di ingresso analogico è disponibile solo nella parola
%FC.V. La frequenza generata è di 8 KHz a fondo scala, il valore di ingresso analogico reale è ottenuto con le seguenti formule:
Modulo 0...10 V U(V) = 1,25 x (%FC.V x 10 -3 )
Modulo 4...20 mA I(mA) = 2 x [(%FC.V x 10 -3 ) + 2]
Modulo -10...+10 V U(V) = 2,5 x [(%FC.V x 10 -3 ) - 4]
W9 1329 402 08 01 A01 2
Características eléctricas y de entorno
Entrada analógica Número de vía
Impedancia de entrada
1 (alto nivel)
6,6 M
Ω
(4) 250
Ω
(5)
Tensión máx. adm. sin destrucción +/- 16 V
Conversión
Salida frecuencia
Método de conversión
Resolución
Tiempo de conversión
Precisión
Tensión nominal
Lógica
Protección contra cortocircuitos
U (V) -> F (Hz)
10 bits o 12 bits
125 ms (2) 500 ms (3)
+/- 1% de 0 a 60
°
C (1)
24 VDC
Positiva o negativa
No
Alimentación Tensión nominal
Límites de tensión
Potencia absorbida
24 VCD
21...30 VCD
2,5 W
Aislamiento
Corriente de llamada
Entre la alimentación y la tierra
10 A máx.
1500 V CA >10 M
Ω
Tensión/Resistencia Entre la entrada o la salida y la tierra 1500 V CA >10 M
Ω
(bajo 500VCD)
Entre la entrada y la salida frecuencia 500 V CA >10 M
Ω
Choques 300 m/s 2 , 3 choques por eje, 3 ejes
Vibraciones
Entorno clim á tico
5 a 55 Hz, 60 m/s 2 , 2 horas por eje, 3 ejes
Temperatura de funcionamiento
Temperatura de almacenamiento
Humedad relativa
0...60
°
C
- 20
°
C...+70
°
C
45...85% (sin cond.)
Normas Según IEC 1131-2, UL508, CSA 22.2 y marcado CE
(Directivas Europeas Baja Tensión y CEM)
(1) Escala máx.
(2) Resolución 10 bits (3) Resolución 12 bits
(4) Módulos (0...10 V) y (-10...+10 V)
(5) Módulo (4...20 mA)
Caratteristiche elettriche e ambientali
Ingresso analogico Numero di canale
Impedenza d'ingresso
Conversione
Tensione max appl. senza danni
Metodo di conversione
Risoluzione
1 (livello alto)
6,6 M
Ω
+/- 16 V
(4)
U (V) -> F (Hz)
250
Ω
(5)
Uscita frequenza
Alimentazione
Tempo di conversione
Precisione
Tensione nominale
Logica
Protezione contro i corto circuiti
Tensione nominale
Tensioni limite
Assorbimento
10 bit o 12 bit
125 ms (2) 500 ms (3)
+/- 1% da 0 a 60
°
C (1)
24 VDC
Positiva o negativa
No
24 VDC
21...30 VDC
2,5 W
Isolamento
Corrente di lavoro
Tra alimentazione e messa a terra
Tra ingresso e uscita frequenza
10 A maxi
Tensione/Resistenza Tra ingresso o uscita e messa a terra 1500 V AC >10 M
Ω
(a 500VDC)
1500 V AC >10 M
Ω
500 V AC >10 M
Ω
Shock 300 m/s 2 , 3 shock per asse, 3 assi
Vibrazioni
Ambiente da 5 a 55 Hz, 60 m/s 2 , 2 ore per asse, 3 assi
Temperatura di funzionamento 0...60
°
C
Temperatura di immagazzinamento - 20
°
C...+70
°
C
Normativa
Umidità relativa 45...85% (senza cond)
Secondo le IEC 1131-2, UL508, CSA 22.2 e marchio CE
(Direttive Europee per la Bassa Tensione e CEM)
(1) Fondo scala (2) Risoluzione 10 bit
(4) Moduli (0...10 V) e (-10...+10 V)
(5) Modulo (4...20 mA)
(3) Risoluzione 12 bit
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Septembre 1996
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