Embedded reference voltage. STMicroelectronics STM32F101VF, STM32F101VG, STM32F101RG, STM32F101RF, STM32F101ZG, STM32F101ZF
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STM32F101xF, STM32F101xG Electrical characteristics
5.3.5
The parameters given in
Table 13 are derived from tests performed under ambient
temperature and V
DD
supply voltage conditions summarized in
Symbol
Table 13. Embedded internal reference voltage
Parameter Conditions Min Typ Max Unit
V
REFINT
Internal reference voltage
T
S_vrefint
(1)
ADC sampling time when reading the internal reference voltage
–40 °C < T
A
< +85 °C 1.16
1.20
1.24
5.1
17.1
(2)
V
RERINT
(2)
Internal reference voltage spread over the temperature range
V
DD
= 3 V ±10 mV 10
V
µs mV
T
Coeff
(2)
Temperature coefficient 100 ppm/
°C
1. Shortest sampling time can be determined in the application by multiple iterations.
2. Guaranteed by design.
Supply current characteristics
The current consumption is a function of several parameters and factors such as the operating voltage, ambient temperature, I/O pin loading, device software configuration, operating frequencies, I/O pin switching rate, program location in memory and executed binary code.
The current consumption is measured as described in
Figure 10: Current consumption measurement scheme
.
All Run-mode current consumption measurements given in this section are performed with a reduced code that gives a consumption equivalent to Dhrystone 2.1 code.
Maximum current consumption
The MCU is placed under the following conditions:
• All I/O pins are in input mode with a static value at V
DD
or V
SS
(no load)
• All peripherals are disabled except if it is explicitly mentioned
• The Flash access time is adjusted to f
HCLK wait state from 24 to 36 MHz)
frequency (0 wait state from 0 to 24 MHz, 1
• Prefetch in on (reminder: this bit must be set before clock setting and bus prescaling)
• When the peripherals are enabled f
PCLK1
= f
HCLK/2
, f
PCLK2
= f
HCLK
The parameters given in
Table 14 are derived from tests performed under ambient
temperature and V
DD
supply voltage conditions summarized in
DocID16553 Rev 5
Electrical characteristics STM32F101xF, STM32F101xG
Table 14. Maximum current consumption in Run mode, code with data processing running from Flash
Max
(1)
Symbol Parameter Conditions f
HCLK
Unit
T
A
= 85 °C
36 MHz 41
I
DD
Supply current in Run mode
External clock
(2)
, all peripherals enabled
External clock
(2)
, all peripherals disabled
24 MHz
16 MHz
8 MHz
36 MHz
24 MHz
16 MHz
8 MHz
29
22
12.5
24
17.5
14
8.5
mA
1. Guaranteed by characterization results.
2. External clock is 8 MHz and PLL is on when f
HCLK
> 8 MHz.
Table 15. Maximum current consumption in Run mode, code with data processing running from RAM
Max
(1)
Symbol Parameter Conditions f
HCLK
Unit
T
A
= 85 °C
I
DD
Supply current in
Run mode
External clock
(2)
, all peripherals enabled
External clock
(2)
all peripherals disabled
36 MHz
24 MHz
16 MHz
8 MHz
36 MHz
24 MHz
16 MHz
8 MHz
37
26.5
19
11.5
20.5
15
11
7.5
mA
1. Guaranteed by characterization results, tested in production at V
DD max, f
HCLK
max.
2. External clock is 8 MHz and PLL is on when f
HCLK
> 8 MHz.
DocID16553 Rev 5
STM32F101xF, STM32F101xG Electrical characteristics
Figure 11. Typical current consumption in Run mode versus frequency (at 3.6 V) code with data processing running from RAM, peripherals enabled
25
20
15
10
35
30
5
0
8 MHz
16 MHz
24 MHz
36 MHz
-45 25
Temperature (°C)
70 85
Figure 12. Typical current consumption in Run mode versus frequency (at 3.6 V) code with data processing running from RAM, peripherals disabled
14
12
10
18
16
2
0
8
6
4
8 MHz
16 MHz
24 MHz
36 MHz
-45 25
Temperature (°C)
70 85
DocID16553 Rev 5
Electrical characteristics STM32F101xF, STM32F101xG
Table 16. Maximum current consumption in Sleep mode, code running from Flash or
RAM
Max
(1)
Symbol Parameter Conditions f
HCLK
Unit
T
A
= 85 °C
36 MHz 27.5
I
DD
Supply current in
Sleep mode
External clock
(2)
all peripherals enabled
External clock
(2)
, all peripherals disabled
24 MHz
16 MHz
8 MHz
36 MHz
24 MHz
16 MHz
8 MHz
5.9
5.4
4.7
20
15
9
6.9
mA
1. Guaranteed by characterization results, tested in production at V enabled.
DD max, f
HCLK
max with peripherals
2. External clock is 8 MHz and PLL is on when f
HCLK
> 8 MHz.
Table 17. Typical and maximum current consumptions in Stop and Standby modes
Typ
(1)
Max
Symbol Parameter Conditions V
DD
/
V
BAT
2.0 V
=
V
DD
/
V
BAT
2.4 V
=
V
DD
/V
BA
T
= 3.3 V
T
A
=
85 °C
Unit
I
DD
Supply current in Stop mode
Regulator in Run mode,
Low-speed and high-speed internal RC oscillators and high-speed oscillator
OFF (no independent watchdog)
Regulator in Low-power mode,
Low-speed and high-speed internal RC oscillators and high-speed oscillator
OFF (no independent watchdog)
Low-speed internal RC oscillator and independent watchdog ON
Supply current in Standby mode
Low-speed internal RC oscillator ON, independent watchdog OFF
Low-speed internal RC oscillator and independent watchdog OFF, low-speed oscillator and RTC OFF
I
DD_VBAT
Backup domain supply current
Low-speed oscillator and RTC ON
1. Typical values are measured at T
A
= 25 °C.
2. Guaranteed by characterization results.
-
-
-
-
-
1.05
34.5
24.5
3
2.8
1.9
1.1
35
25
3.8
3.6
2.1
1.4
379
365
-
-
5
(2)
2
µA
DocID16553 Rev 5
STM32F101xF, STM32F101xG Electrical characteristics
Figure 13. Typical current consumption on V different V
BAT
BAT
with RTC on vs. temperature at
values
9
9
9
9
9
±
7HPSHUDWXUH&
DL
Figure 14. Typical current consumption in Standby mode versus temperature at different V
DD
values
1.5
1
0.5
0
3.5
3
2.5
2
2.4V
2.7V
3.0V
3.3V
3.6V
-45 25
Temperature (°C)
70 85
DocID16553 Rev 5
Electrical characteristics STM32F101xF, STM32F101xG
Typical current consumption
The MCU is placed under the following conditions:
• All I/O pins are in input mode with a static value at V
DD
or V
SS
(no load)
• All peripherals are disabled except if it is explicitly mentioned
• The Flash access time is adjusted to f
HCLK wait state from 24 to 36 MHz)
frequency (0 wait state from 0 to 24 MHz, 1
• Prefetch is on (reminder: this bit must be set before clock setting and bus prescaling)
• When the peripherals are enabled f
PCLK1 f
PCLK2
/4
= f
HCLK/4
, f
PCLK2
= f
HCLK/2
, f
ADCCLK
=
• When the peripherals are enabled f
PCLK1
= f
HCLK
, f
PCLK2
= f
HCLK
, f
ADCCLK
= f
PCLK2
/2
The parameters given in
Table 18 are derived from tests performed under ambient
temperature and V
DD
supply voltage conditions summarized in
Table 18. Typical current consumption in Run mode, code with data processing running from Flash
Typ
(1)
Typ
(1)
Symbol Parameter Conditions f
HCLK All peripherals enabled
(2)
All peripherals disabled
Unit
I
DD
Supply current in
Run mode
External clock
(3)
Running on high speed internal RC
(HSI), AHB prescaler used to reduce the frequency
36 MHz
24 MHz
16 MHz
8 MHz
4 MHz
2 MHz
1 MHz
500 kHz
125 kHz
36 MHz
24 MHz
16 MHz
8 MHz
4 MHz
2 MHz
1 MHz
500 kHz
125 kHz
28.5
24.1
14
7.7
4.6
3
2.2
1.7
1.4
27.5
18.9
12.2
7.2
4
2.3
1.5
1.1
0.75
1. Typical values are measures at T
A
= 25 °C, V
DD
= 3.3 V.
2. Add an additional power consumption of 0.8 mA per ADC for the analog part. In applications, this consumption occurs only while the ADC is on (ADON bit is set in the ADC_CR2 register).
3. External clock is 8 MHz and PLL is on when f
HCLK
> 8 MHz.
3.4
2.3
1.8
1.5
1.3
17.5
18.7
12.8
9.2
5.4
11.6
8.2
4.8
2.7
1.7
1.2
0.9
0.7
mA
DocID16553 Rev 5
STM32F101xF, STM32F101xG Electrical characteristics
Table 19. Typical current consumption in Sleep mode, code running from Flash or
RAM
Typ
(1)
Typ
(1)
Symbol Parameter Conditions f
HCLK All peripherals enabled
(2)
All peripherals disabled
Unit
I
DD
Supply current in
Sleep mode
External clock
(3)
Running on High
Speed Internal
RC (HSI), AHB prescaler used to reduce the frequency
125 kHz
36 MHz
24 MHz
16 MHz
8 MHz
4 MHz
2 MHz
1 MHz
500 kHz
125 kHz
36 MHz
24 MHz
16 MHz
8 MHz
4 MHz
2 MHz
1 MHz
500 kHz
17.7
12.2
8.4
4.6
3
2.15
1.7
1.5
1.35
17
11.6
7.7
3.9
2.3
1.5
1.1
0.9
0.7
1. Typical values are measures at T
A
= 25 °C, V
DD
= 3.3 V.
2. Add an additional power consumption of 0.8 mA per ADC for the analog part. In applications, this consumption occurs only while the ADC is on (ADON bit is set in the ADC_CR2 register).
3. External clock is 8 MHz and PLL is on when f
HCLK
> 8 MHz.
0.7
0.6
0.5
0.5
0.5
1.15
3.35
2.3
1.6
0.8
1.3
1.25
1.2
1.15
4
3.1
2.3
1.5
mA
On-chip peripheral current consumption
The current consumption of the on-chip peripherals is given in
under the following conditions:
• all I/O pins are in input mode with a static value at V
DD
or V
SS
(no load)
• all peripherals are disabled unless otherwise mentioned
• the given value is calculated by measuring the current consumption
– with all peripherals clocked off
– with only one peripheral clocked on
• ambient operating temperature and V
DD
.
supply voltage conditions summarized in
DocID16553 Rev 5
Electrical characteristics STM32F101xF, STM32F101xG
Table 20. Peripheral current consumption (1)
Peripherals
AHB (up to 36MHz)
APB1 (up to 18 MHz)
DMA1
DMA2
FSMC
CRC
BusMatrix
(2)
APB1-Bridge
TIM2
TIM3
TIM4
TIM5
TIM6
TIM7
TIM12
TIM13
TIM14
SPI2/I2S2
(3)
SPI3/I2S3
(3)
USART2
USART3
UART4
UART5
I2C1
I2C2
DAC
(4)
WWDG
PWR
BKP
IWDG
µA/MHz
35.56
33.61
7.78
7.78
19.17
12.22
13.33
8.33
8.33
12.22
23.06
18.47
55.14
2.08
11.67
8.61
37.22
36.39
12.22
12.22
12.22
10.28
10.28
9.17
3.06
2.50
2.78
4.44
DocID16553 Rev 5
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