Pinouts. Infineon CY8C4045LQI-S412, CY8C4045LQI-S413, CY8C4025AZI-S413T, CY8C4024LQI-S412, CY8C4025AZQ-S403, CY8C4024LQI-S403T, CY8C4025LQI-S412, CY8C4025LQI-S402T, CY8C4045LQI-S411, CY8C4024AXI-S412
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PSoC 4: PSoC 4000S Datasheet
Pinouts
The following table provides the pin list for PSoC 4000S for the 48-pin TQFP, 40-pin QFN, 32-pin QFN, 24-pin QFN, 32-pin TQFP, and 25-ball CSP packages. All port pins support GPIO. Pin 11 is a No-Connect in the 48-TQFP.
Table 1. PSoC 4000S Pin List
48-pin TQFP
Pin
28
29
30
31
32
7
8
5
6
3
4
1
2
45
46
47
48
41
42
43
44
9
10
12
13
14
16
37
38
39
40
33
34
35
36
Name
P0.0
P0.1
P0.2
P0.3
P0.4
P2.7
VSSD
P3.0
P3.1
P3.2
P3.3
P1.7
P2.0
P2.1
P2.2
P2.3
P2.4
P2.5
P2.6
VSSA
P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P0.5
P0.6
P0.7
XRES
VCCD
VSSD
VDDD
VDDA
18
19
20
21
32-pin QFN
Pin
17
Name
P0.0
22
23
P0.1
P0.2
P0.3
P0.4
P0.5
P0.6
24
25
26
27
27
28
29
30
31
32
1
2
3
4
5
6
7
8
9
10
11
12
P1.7
P2.0
P2.1
P2.2
P2.3
P2.5
P2.6
P2.7
P3.0
P3.1
P3.2
P3.3
XRES
VCCD
VSSD
VDD
VDD
VSSA
P1.0
P1.1
P1.2
P1.3
21
21
22
18
19
20
1
2
3
15
16
17
24-pin QFN
Pin
13
14
Name
P0.0
P0.1
4
5
23
24
6
7
8
P0.4
P0.5
P0.6
XRES
VCCD
VSSD
VDD
VDD
VSSA
P1.2
P1.3
P1.7
P2.0
P2.1
P2.6
P2.7
P3.0
P3.2
P3.3
B2
B3
A1
A2
C2
C1
B1
A3
A3
A2
A4
B4
E5
D4
E4
D3
D5
C4
A2
25-ball CSP
Pin
D1
C3
Name
P0.0
P0.1
A5
B5
C5
P0.4
P0.5
P0.6
P0.7
XRES
VCCD
VSS
VDD
VDD
VSS
P1.2
P1.3
P1.7
P2.0
P2.1
P2.6
P2.7
VSS
P3.0
P3.1
P3.2
P3.3
P2.7
VSSD
P3.0
P3.1
P3.2
P3.3
P1.7
P2.0
P2.1
P2.2
P2.3
P2.4
P2.5
P2.6
8
9
10
11
12
13
6
7
4
5
2
3
40
1
36
37
38
39
32
33
34
35
27
28
29
30
31
23
24
25
26
40-pin QFN
Pin
22
Name
P0.0
P0.1
P0.2
P0.3
P0.4
P0.5
P0.6
P0.7
XRES
VCCD
VDDD
VDDA
VSSA
P1.0
P1.1
P1.2
P1.3
P1.4
27
27
28
29
24
25
26
30
31
32
9
10
11
12
6
7
8
3
4
1
2
5
18
19
20
21
32-pin TQFP
Pin
17
Name
P0.0
22
23
P0.1
P0.2
P0.3
P0.4
P0.5
P0.6
XRES
VCCD
VSSD
VDD
VDD
VSSA
P1.0
P1.1
P1.2
P1.3
P1.7
P2.0
P2.1
P2.2
P2.3
P2.5
P2.6
P2.7
P3.0
P3.1
P3.2
P3.3
Document Number: 002-00123 Rev. *N Page 11 of 42
PSoC 4: PSoC 4000S Datasheet
Table 1. PSoC 4000S Pin List (continued)
48-pin TQFP
Pin
21
22
23
24
25
17
18
19
20
Name
P3.4
P3.5
P3.6
P3.7
VDDD
P4.0
P4.1
P4.2
P4.3
32-pin QFN
Pin Name
13
14
15
16
P4.0
P4.1
P4.2
P4.3
24-pin QFN
Pin Name
9
10
11
12
P4.0
P4.1
P4.2
P4.3
25-ball CSP
Pin Name
E3
D2
E2
E1
P4.0
P4.1
P4.2
P4.3
18
19
20
21
40-pin QFN
Pin Name
14
15
16
17
P3.4
P3.5
P3.6
P3.7
P4.0
P4.1
P4.2
P4.3
32-pin TQFP
Pin Name
13
14
15
16
P4.0
P4.1
P4.2
P4.3
Note: Pins 11, 15, 26, and 27 are No connects (NC) on the 48-pin TQFP.
Descriptions of the pin functions are as follows:
VDDD : Power supply for the digital section.
VDDA : Power supply for the analog section.
VSSD, VSSA : Ground pins for the digital and analog sections respectively.
VCCD : Regulated digital supply (1.8 V ±5%)
VDD: Power supply to all sections of the chip
VSS: Ground for all sections of the chip
Alternate Pin Functions
Each port pin can be assigned to one of multiple functions; it can, for instance, be an analog I/O, a digital peripheral function, an LCD pin, or a CapSense pin. The pin assignments are shown in the following table.
Table 2. Pin Assignments
Port/
Pin
P0.0
P0.1
P0.2
P0.3
P0.4
P0.5
P0.6
P0.7
P1.0
Analog lpcomp.in_p[0] lpcomp.in_n[0] lpcomp.in_p[1] lpcomp.in_n[1] wco.wco_in
wco.wco_out
Smart I/O
P1.1
P1.2
P1.3
P1.4
Alternate Function 1 Alternate Function 2 Alternate Function 3 tcpwm.tr_in[0] tcpwm.tr_in[1]
Deep Sleep 1 Deep Sleep 2 scb[0].spi_select1:0 scb[0].spi_select2:0 scb[0].spi_select3:0 srss.ext_clk
tcpwm.line[2]:1 scb[1].uart_rx:0 scb[1].uart_tx:0 scb[1].uart_cts:0 scb[1].uart_rts:0 scb[0].uart_rx:1 tcpwm.line_compl[2]:1 scb[0].uart_tx:1 scb[1].i2c_scl:0 scb[1].i2c_sda:0 scb[0].i2c_scl:0 scb[0].i2c_sda:0 scb[1].spi_mosi:1 scb[1].spi_miso:1 scb[1].spi_clk:1 scb[1].spi_select0:1 scb[0].spi_mosi:1 scb[0].spi_miso:1 tcpwm.line[3]:1 tcpwm.line_compl[3]:1 scb[0].uart_cts:1 scb[0].uart_rts:1 tcpwm.tr_in[2] tcpwm.tr_in[3] scb[0].spi_clk:1 scb[0].spi_select0:1 scb[0].spi_select1:1
Document Number: 002-00123 Rev. *N Page 12 of 42
PSoC 4: PSoC 4000S Datasheet
Table 2. Pin Assignments (continued)
Port/
Pin
P1.5
Analog Smart I/O Alternate Function 1 Alternate Function 2 Alternate Function 3 Deep Sleep 1 Deep Sleep 2 scb[0].spi_select2:1
P1.6
scb[0].spi_select3:1
P1.7
P2.0
prgio[0].io[0] tcpwm.line[4]:0 csd.comp
tcpwm.tr_in[4] scb[1].i2c_scl:1 scb[1].spi_mosi:2
P2.1
P2.2
P2.3
P2.4
P2.5
P2.6
P2.7
P3.0
P3.1
P3.2
P3.3
P3.4
P3.5
P3.6
P3.7
P4.0
P4.1
P4.2
csd.vref_ext
csd.cshieldpads
csd.cmodpad
P4.3
csd.csh_tank
prgio[0].io[1] prgio[0].io[2] prgio[0].io[3] prgio[0].io[4] prgio[0].io[5] prgio[0].io[6] prgio[0].io[7] prgio[1].io[0] prgio[1].io[1] tcpwm.line_compl[4]:0 tcpwm.line[0]:1 tcpwm.line_compl[0]:1 tcpwm.line[1]:1 tcpwm.line_compl[1]:1 tcpwm.line[0]:0 tcpwm.line_compl[0]:0 scb[1].uart_rx:1 scb[1].uart_tx:1 prgio[1].io[2] prgio[1].io[3] prgio[1].io[4] prgio[1].io[5] prgio[1].io[6] prgio[1].io[7] tcpwm.line[1]:0 tcpwm.line_compl[1]:0 tcpwm.line[2]:0 tcpwm.line_compl[2]:0 tcpwm.line[3]:0 tcpwm.line_compl[3]:0 scb[1].uart_cts:1 scb[1].uart_rts:1 scb[0].uart_rx:0 scb[0].uart_tx:0 scb[0].uart_cts:0 scb[0].uart_rts:0 tcpwm.tr_in[5] scb[1].i2c_sda:1 scb[1].spi_miso:2 scb[1].spi_clk:2 scb[1].spi_select0:2 scb[1].spi_select1:1 scb[1].spi_select2:1 scb[1].spi_select3:1 lpcomp.comp[0]:1 scb[1].i2c_scl:2 scb[1].i2c_sda:2 scb[1].spi_mosi:0 scb[1].spi_miso:0 tcpwm.tr_in[6] tcpwm.tr_in[7] tcpwm.tr_in[8] tcpwm.tr_in[9] tcpwm.tr_in[10] tcpwm.tr_in[11] cpuss.swd_data
cpuss.swd_clk
scb[1].spi_clk:0 scb[1].spi_select0:0 scb[1].spi_select1:0 scb[1].spi_select2:0 scb[1].spi_select3:0 lpcomp.comp[1]:1 scb[0].i2c_scl:1 scb[0].i2c_sda:1 lpcomp.comp[0]:0 scb[0].spi_mosi:0 scb[0].spi_miso:0 scb[0].spi_clk:0 lpcomp.comp[1]:0 scb[0].spi_select0:0
Document Number: 002-00123 Rev. *N Page 13 of 42
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