Acronyms. Infineon CY8C4045LQI-S412, CY8C4045LQI-S413, CY8C4025AZI-S413T, CY8C4024LQI-S412, CY8C4025AZQ-S403, CY8C4024LQI-S403T, CY8C4025LQI-S412, CY8C4025LQI-S402T, CY8C4045LQI-S411, CY8C4024AXI-S412

PSoC 4: PSoC 4000S Datasheet

Acronyms

Table 42. Acronyms Used in this Document

Acronym abus

ADC

AG

AHB

Description analog local bus analog-to-digital converter analog global

AMBA (advanced microcontroller bus architecture) high-performance bus, an ARM data transfer bus

ALU arithmetic logic unit

AMUXBUS analog multiplexer bus

API

APSR

ARM

®

ATM application programming interface application program status register advanced RISC machine, a CPU architecture automatic thump mode

BW

CAN

CMRR

CPU

CRC bandwidth

Controller Area Network, a communications protocol common-mode rejection ratio central processing unit

DAC

DFB

DIO cyclic redundancy check, an error-checking protocol digital-to-analog converter, see also IDAC, VDAC digital filter block digital input/output, GPIO with only digital capabilities, no analog. See GPIO.

EMI

EMIF

EOC

EOF

EPSR

ESD

DMIPS

DMA

DNL

DNU

DR

DSI

DWT

ECC

Dhrystone million instructions per second direct memory access, see also TD differential nonlinearity, see also INL do not use port write data registers digital system interconnect data watchpoint and trace error correcting code

ECO external crystal oscillator

EEPROM electrically erasable programmable read-only memory electromagnetic interference external memory interface end of conversion end of frame execution program status register electrostatic discharge

Document Number: 002-00123 Rev. *N

Table 42. Acronyms Used in this Document (continued)

MISO

NC

NMI

NRZ

NVIC

NVL opamp

PAL

PC

PCB

LR

LUT

LVD

LVI

LVTTL

MAC

MCU

IIR

ILO

IMO

INL

I/O

IPOR

IPSR

IRQ

Acronym

ETM

FIR

Description embedded trace macrocell finite impulse response, see also IIR

FPB

FS

GPIO flash patch and breakpoint full-speed general-purpose input/output, applies to a PSoC pin high-voltage interrupt, see also LVI, LVD HVI

IC

IDAC integrated circuit current DAC, see also DAC, VDAC

IDE integrated development environment

I

2

C, or IIC Inter-Integrated Circuit, a communications protocol

ITM

LCD

LIN infinite impulse response, see also FIR internal low-speed oscillator, see also IMO internal main oscillator, see also ILO integral nonlinearity, see also DNL input/output, see also GPIO, DIO, SIO, USBIO initial power-on reset interrupt program status register interrupt request instrumentation trace macrocell liquid crystal display

Local Interconnect Network, a communications protocol.

link register lookup table low-voltage detect, see also LVI low-voltage interrupt, see also HVI low-voltage transistor-transistor logic multiply-accumulate microcontroller unit master-in slave-out no connect nonmaskable interrupt non-return-to-zero nested vectored interrupt controller nonvolatile latch, see also WOL operational amplifier programmable array logic, see also PLD program counter printed circuit board

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PSoC 4: PSoC 4000S Datasheet

SAR

SC/CT

SCL

SDA

S/H

SINAD

SIO

PWM

RAM

RISC

RMS

RTC

RTL

RTR

RX

PLL

PMDD

POR

PRES

PRS

PS

PSoC

®

PSRR

Acronym

PGA

PHUB

PHY

PICU

PLA

PLD

Table 42. Acronyms Used in this Document (continued)

SOC

SOF

SPI

SR

SRAM

SRES

SWD

SWV

TD

Description programmable gain amplifier peripheral hub physical layer port interrupt control unit programmable logic array programmable logic device, see also PAL phase-locked loop package material declaration datasheet power-on reset precise power-on reset pseudo random sequence port read data register

Programmable System-on-Chip™ power supply rejection ratio pulse-width modulator random-access memory reduced-instruction-set computing root-mean-square real-time clock register transfer language remote transmission request receive successive approximation register switched capacitor/continuous time

I

2

C serial clock

I

2

C serial data sample and hold signal to noise and distortion ratio special input/output, GPIO with advanced features. See GPIO.

start of conversion start of frame

Serial Peripheral Interface, a communications protocol slew rate static random access memory software reset serial wire debug, a test protocol single-wire viewer transaction descriptor, see also DMA

Document Number: 002-00123 Rev. *N

Table 42. Acronyms Used in this Document (continued)

Acronym

THD

TIA

TRM

TTL

TX

UART

UDB

USB

USBIO

VDAC

WDT

WOL

WRES

XRES

XTAL

Description total harmonic distortion transimpedance amplifier technical reference manual transistor-transistor logic transmit

Universal Asynchronous Transmitter Receiver, a communications protocol universal digital block

Universal Serial Bus

USB input/output, PSoC pins used to connect to a

USB port voltage DAC, see also DAC, IDAC watchdog timer write once latch, see also NVL watchdog timer reset external reset I/O pin crystal

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