SN32F100 Spec.

SN32F100 Series

32-Bit Cortex-M0 Micro-Controller

3.1.2 WATCHDOG RESET (WDT RESET)

Watchdog reset is a system protection. In normal condition, system works well and clears watchdog timer by program.

Under error condition, system is in unknown situation and watchdog can’t be clear by program before watchdog timer overflow. Watchdog timer overflow occurs and the system is reset. After watchdog reset, the system restarts and returns normal mode. Watchdog reset sequence is as following.

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Watchdog timer status: System checks watchdog timer overflow status. If watchdog timer overflow occurs, the system is reset.

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System initialization: All system registers is set as initial conditions and system is ready.

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Oscillator warm up: Oscillator operation is successfully and supply to system clock.

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Program executing: Power on sequence is finished and program executes from 0x0 .

Watchdog timer application note is as following.

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Before clearing watchdog timer, check I/O status and check RAM contents can improve system error.

 Don’t clear watchdog timer in interrupt vector and interrupt service routine. That can improve main routine fail.

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Clearing watchdog timer program is only at one part of the program. This way is the best structure to enhance the watchdog timer function.

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Note: Please refer to the “WATCHDOG TIMER” about watchdog timer detail information.

3.1.3 BROWN-OUT RESET

3.1.3.1 BROWN OUT DESCRIPTION

The brown-out reset is a power dropping condition. The power drops from normal voltage to low voltage by external factors (e.g. EFT interference or external loading changed). The brown out reset would make the system not work well or executing program error.

VDD

System Work

Well Area

V1

V2

V3

System Work

Error Area

VSS

Brown-Out Reset Diagram

The power dropping might through the voltage range that’s the system dead-band. The dead-band means the power range can’t offer the system minimum operation power requirement. The above diagram is a typical brown out reset diagram. There is a serious noise under the VDD, and VDD voltage drops very deep. There is a dotted line to separate the system working area. The above area is the system work well area. The below area is the system work error area called deadband. V1 doesn’t touch the below area and not effect the system operation. But the V2 and V3 is under the below area and may induce the system error occurrence. Let system under dead-band includes some conditions.

DC application:

The power source of DC application is usually using battery. When low battery condition and MCU drive any loading, the power drops and keeps in deadband. Under the situation, the power won’t drop deeper and not touch the system reset voltage. That makes the system under dead-band.

AC application:

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