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ADDRESS SPACES S3F80N8_UM_REV1.10
USING THE REGISTER POINTS
Register pointers RP0 and RP1, mapped to addresses D6H and D7H, are used to select two movable 8-byte working register slices in the register file. After a reset, they point to the working register common area: RP0 points to addresses C0H–C7H, and RP1 points to addresses C8H–CFH.
To change a register pointer value, you load a new value to RP0 and/or RP1 using an SRP or LD instruction.
(see Figures 2-5 and 2-6).
With working register addressing, you can only access those two 8-bit slices of the register file that are currently pointed to by RP0 and RP1.
The selected 16-byte working register block usually consists of two contiguous 8-byte slices. As a general programming guideline, it is recommended that RP0 point to the "lower" slice and RP1 point to the "upper" slice
(see Figure 2-5). In some cases, it may be necessary to define working register areas in different (noncontiguous) areas of the register file. In Figure 2-6, RP0 points to the "upper" slice and RP1 to the "lower" slice.
Because a register pointer can point to either of the two 8-byte slices in the working register block, you can flexibly define the working register area to support program requirements.
)
PROGRAMMING TIP — Setting the Register Pointers
RP0
← no change, RP1 ← 48H
RP0
← 00H, RP1 ← no change
← no change, RP1 ← 0F8H
Register File
Contains 24
8-Byte Slices
0 0 0 0 1 X X X
RP1
0 0 0 0 0 X X X
RP0
8-Byte Slice
8-Byte Slice
FH (R15)
8H
7H
0H (R0)
16-Byte
Contiguous
Working
Register block
Figure 2-5. Contiguous 16-Byte Working Register Block
2-6
S3F80N8_UM_REV1.10 ADDRESS
8-Byte Slice
F7H (R15)
F0H (R8)
1 1 1 1 0 X X X
RP1
0 0 0 0 0 X X X
RP0
Register File
Contains 24
8-Byte Slices
8-Byte Slice
7H (R7)
0H (R0)
16-Byte non-
Contiguous
Working
Register block
Figure 2-6. Non-Contiguous 16-Byte Working Register Block
)
PROGRAMMING TIP — Using the RPs to Calculate the Sum of a Series of Registers
Calculate the sum of registers 80H–85H using the register pointer. The register addresses from 80H through 85H contain the values 10H, 11H, 12H, 13H, 14H, and 15 H, respectively:
RP0
← R0 + R1
R0
← R0 + R3 + C
R0
← R0 + R5 + C
The sum of these six registers, 6FH, is located in the register R0 (80H). The instruction string used in this example takes 12 bytes of instruction code and its execution time is 36 cycles. If the register pointer is not used to calculate the sum of these registers, the following instruction sequence would have to be used:
80H
← (80H) + (82H) + C
80H
← (80H) + (85H) + C
Now, the sum of the six registers is also located in register 80H. However, this instruction string takes 15 bytes of instruction code rather than 12 bytes, and its execution time is 50 cycles rather than 36 cycles.
2-7
ADDRESS SPACES S3F80N8_UM_REV1.10
REGISTER ADDRESSING
The S3F8-series register architecture provides an efficient method of working register addressing that takes full advantage of shorter instruction formats to reduce execution time.
With Register (R) addressing mode, in which the operand value is the content of a specific register or register pair, you can access any location in the register file. With working register addressing, you use a register pointer to specify an 8-byte working register space in the register file and an 8-bit register within that space.
Registers are addressed either as a single 8-bit register or as a paired 16-bit register space. In a 16-bit register pair, the address of the first 8-bit register is always an even number and the address of the next register is always an odd number. The most significant byte of the 16-bit data is always stored in the even-numbered register, and the least significant byte is always stored in the next (+1) odd-numbered register.
Working register addressing differs from Register addressing as it uses a register pointer to identify a specific
8-byte working register space in the internal register file and a specific 8-bit register within that space.
MSB
Rn
LSB
Rn+1 n = Even address
Figure 2-7. 16-Bit Register Pair
2-8
S3F80N8_UM_REV1.10 ADDRESS
Special-Purpose Registers
FFH
Control
Registers
E0H
D0H
C0H
BFH
System
Registers
CFH
RP1
Register
Pointers
RP0
Each register pointer (RP) can independently point to one of the 24 8-byte "slices" of the register file. After a reset, RP0 points to locations C0H-C7H and RP1 to locations C8H-CFH (that is, to the common working register area).
NOTE:
In the S3F80N8 microcontroller, only Page 0 is implemented.
General-Purpose Register
Prime
Registers
C0H
80H
00H
Can be Pointed by Register Pointer
Figure 2-8. Register File Addressing
2-9
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Table of contents
- 31 WORKING REGISTERS
- 32 USING THE REGISTER POINTS
- 36 COMMON WORKING REGISTER AREA (C0H–CFH)
- 37 4-BIT WORKING REGISTER ADDRESSING
- 39 8-BIT WORKING REGISTER ADDRESSING
- 60 BTCON — Basic Timer Control Register
- 61 CLKCON — System Clock Control Register
- 62 EXTINT — External Interrupt Enable Register
- 63 EXTPND — External Interrupt Pending Register
- 64 FLAGS — System Flags Register
- 65 IMR — Interrupt Mask Register
- 66 IPH — Instruction Pointer (High Byte)
- 66 IPL — Instruction Pointer (Low Byte)
- 67 IPR — Interrupt Priority Register
- 68 IRQ — Interrupt Request Register
- 69 P0CONH — Port 0 Control Register (High Byte)
- 70 P0CONL — Port 0 Control Register (Low Byte)
- 71 P0PUR — Port 0 Pull-up Control Register
- 72 P1CONH — Port 1 Control Register (High Byte)
- 73 P1CONL — Port 1 Control Register (Low Byte)
- 74 P1PUR — Port 1 Pull-up Control Register
- 75 P2CONH — Port 2 Control Register (High Byte)
- 76 P2CONL — Port 2 Control Register (Low Byte)
- 77 P2PUR — Port 2 Pull-up Control Register
- 78 P3CON — Port 3 Control Register
- 79 P3PUR — Port 3 Pull-up Control Register
- 80 PP — Register Page Pointer
- 81 RP0 — Register Pointer 0
- 81 RP1 — Register Pointer 1
- 82 SPL — Stack Pointer (Low Byte)
- 83 STOPCON — Stop Control Register
- 84 SYM — System Mode Register
- 85 T0CON — Timer 0 Control Register
- 88 INTERRUPT TYPES
- 89 S3F80N8 INTERRUPT STRUCTURE
- 91 SYSTEM-LEVEL INTERRUPT CONTROL REGISTERS
- 92 INTERRUPT PROCESSING CONTROL POINTS
- 93 PERIPHERAL INTERRUPT CONTROL REGISTERS
- 94 SYSTEM MODE REGISTER (SYM)
- 95 INTERRUPT MASK REGISTER (IMR)
- 96 INTERRUPT PRIORITY REGISTER (IPR)
- 98 INTERRUPT REQUEST REGISTER (IRQ)
- 99 INTERRUPT PENDING FUNCTION TYPES
- 100 INTERRUPT SOURCE POLLING SEQUENCE
- 100 INTERRUPT SERVICE ROUTINES
- 101 GENERATING INTERRUPT VECTOR ADDRESSES
- 101 NESTING OF VECTORED INTERRUPTS
- 101 INSTRUCTION POINTER (IP)
- 101 FAST INTERRUPT PROCESSING
- 102 PROCEDURE FOR INITIATING FAST INTERRUPTS
- 102 FAST INTERRUPT SERVICE ROUTINE
- 102 RELATIONSHIP TO INTERRUPT PENDING BIT TYPES
- 102 PROGRAMMING GUIDELINES
- 103 DATA TYPES
- 103 REGISTER ADDRESSING
- 103 ADDRESSING MODES
- 108 FLAGS REGISTER (FLAGS)
- 109 FLAG DESCRIPTIONS
- 110 INSTRUCTION SET NOTATION
- 114 CONDITION CODES
- 115 INSTRUCTION DESCRIPTIONS
- 191 SYSTEM CLOCK CIRCUIT
- 192 MAIN OSCILLATOR CIRCUITS
- 193 CLOCK STATUS DURING POWER-DOWN MODES
- 194 SYSTEM CLOCK CONTROL REGISTER (CLKCON)
- 195 OVERVIEW
- 197 NORMAL MODE RESET OPERATION
- 197 HARDWARE RESET VALUES
- 199 STOP MODE
- 200 IDLE MODE
- 202 PORT DATA REGISTERS
- 203 PORT 0
- 205 PORT 1
- 209 PORT 2
- 211 PORT3 (32-PIN S3F80N8)
- 214 BASIC TIMER CONTROL REGISTER (BTCON)
- 215 BASIC TIMER FUNCTION DESCRIPTION
- 219 TIMER/COUNTER 0 CONTROL REGISTER (T0CON)
- 221 TIMER 0 FUNCTION DESCRIPTION
- 245 TARGET BOARDS
- 245 PROGRAMMING SOCKET ADAPTER
- 247 TB80N8 TARGET BOARD
- 252 OTP/MTP PROGRAMMER (WRITER)