USER`S MANUAL

RESET and POWER-DOWN S3F80N8_UM_REV1.10

IDLE MODE

Idle mode is invoked by the instruction IDLE (opcode 6FH). In idle mode, CPU operations are halted while some peripherals remain active. During idle mode, the internal clock signal is gated away from the CPU, but all peripherals remain active. Port pins retain the mode (input or output) they had at the time idle mode was entered.

There are two ways to release idle mode:

1. Execute a reset. All system and peripheral control registers are reset to their default values and the contents of all data registers are retained. The reset automatically selects the slow clock fosc because CLKCON.0 and

CLKCON.1 are cleared to ‘00B’. If interrupts are masked, a reset is the only way to release idle mode.

2. Activate any enabled interrupt, causing idle mode to be released. When you use an interrupt to release idle mode, the CLKCON.1 and CLKCON.0 register values remain unchanged, and the currently selected clock value is used. The interrupt is then serviced. When the return-from-interrupt (IRET) occurs, the instruction immediately following the one that initiated idle mode is executed.

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S3F80N8_UM_REV1.10

9

I/O PORTS

OVERVIEW

The S3F80N8 microcontroller has four bit-programmable ports, P0-3. This gives a total of 26 I/O pins. Each port can be flexibly configured to meet application design requirements. The CPU accesses ports by directly writing or reading port registers. No special I/O instructions are required. All ports of the S3F80N8 can be configured to input or output mode.

Table 9-1 gives you a General overview of the S3F80N8 I/O port functions.

Table 9-1. S3F80N8 Port Configuration Overview

0

1

2

3

Bit programmable I/O port.

Normal CMOS input or push-pull, open-drain output mode selected by software; software assignable pull-ups.

Bit programmable I/O port.

Normal CMOS input or push-pull, open-drain output mode selected by software; software assignable pull-ups. Alternately P1.0-1.7 can be used as inputs for external interrupts INT0-NT7

Bit programmable I/O port.

Normal CMOS input or push-pull, open-drain output mode selected by software; software assignable pull-ups. Alternately P2.2, P2.3 can be used as CLO, T0CK. P2.4 can be used as

T0PWM or T0CAP. PORT2[5:0] can sink 80mA current.

Bit programmable I/O port.

Normal CMOS input or push-pull, open-drain output mode selected by software; software assignable pull-ups.

NOTE: PORT2[5:0] can sink 80mA current. However only one PORT can be used to sink as large as 80mA current in the same time.

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