- No category
![](http://s1.manualzz.com/store/data/007296733_1-d7f53202a35347992ae51f17119fe70c-128x128.png)
advertisement
![USER`S MANUAL | Manualzz USER`S MANUAL | Manualzz](http://s1.manualzz.com/store/data/007296733_1-d7f53202a35347992ae51f17119fe70c-360x466.png)
S3F80N8_UM_REV1.10
PORT3 (32-PIN S3F80N8)
Port 3 is a 4-bit I/O port with individually configurable pins. Port 3 pins are accessed directly by writing or reading the Port 3 data register, P3 at location E3H. P3.0-3.3 can serve as inputs and as outputs (push pull or opendrain).
Port 3 Control Registers (P3CON)
Port 3 has an 8-bit control registers: P3CON for P3.0-3.3. A reset clears the P3CON registers to “00H”, configuring all pins to input mode. You use control registers settings to select input or output mode (push-pull or open drain).
Port 3 Pull-up Resistor Control Register (P3PUR)
Using the port 3 pull-up resistor control register, P3PUR (F3H), you can configure pull-up resistors to individual port 3 pins.
MSB .7
.6
Port 3 Control Register (P3CON)
F2H, R/W
.5
.4
.3
.2
.1
.0
LSB
P3.1
P3.2
P3.3
P3CON bit-pair pin configuration settings:
0 0
0 1
1 0
1 1
Input mode
Output mode, push-pull
Output mode, open-drain
Not used
P3.0
Figure 9-12. Port 3 Control Register (P3CON)
9-11
I/O PORTS
MSB .7
Port 3 Pull-up Control Register (P3PUR)
F3H, R/W
.6
.5
.4
.3
.2
.1
.0
LSB
P3.3
P3.2
P3.1
P3.0
Not used
P3PUR bit configuration settings:
0
1
Disable pull-up resistor
Enable pull-up resistor
NOTE:
The reset value of P3PUR is pull-up enable.
Figure 9-13. Port 3 Pull-up Control Register (P3PUR)
S3F80N8_UM_REV1.10
9-12
S3F80N8_UM_REV1.10 BASIC TIMER and TIMER 0
10
BASIC TIMER and TIMER 0
OVERVIEW
The S3F80N8 has two default timers: an 8-bit basic timer and one 8-bit general-purpose timer/counter. The 8-bit timer/counter is called timer 0.
BASIC TIMER (BT)
You can use the basic timer (BT) in two different ways:
— As a watchdog timer to provide an automatic reset mechanism in the event of a system malfunction.
— To signal the end of the required oscillation stabilization interval after a reset or a stop mode release.
The functional components of the basic timer block are:
— Clock frequency divider (f osc
divided by 4096, 1024, 128) with multiplexer
— 8-bit basic timer counter, BTCNT (FDH, read-only)
— Basic timer control register, BTCON (D3H, read/write)
10-1
advertisement
Related manuals
advertisement
Table of contents
- 31 WORKING REGISTERS
- 32 USING THE REGISTER POINTS
- 36 COMMON WORKING REGISTER AREA (C0H–CFH)
- 37 4-BIT WORKING REGISTER ADDRESSING
- 39 8-BIT WORKING REGISTER ADDRESSING
- 60 BTCON — Basic Timer Control Register
- 61 CLKCON — System Clock Control Register
- 62 EXTINT — External Interrupt Enable Register
- 63 EXTPND — External Interrupt Pending Register
- 64 FLAGS — System Flags Register
- 65 IMR — Interrupt Mask Register
- 66 IPH — Instruction Pointer (High Byte)
- 66 IPL — Instruction Pointer (Low Byte)
- 67 IPR — Interrupt Priority Register
- 68 IRQ — Interrupt Request Register
- 69 P0CONH — Port 0 Control Register (High Byte)
- 70 P0CONL — Port 0 Control Register (Low Byte)
- 71 P0PUR — Port 0 Pull-up Control Register
- 72 P1CONH — Port 1 Control Register (High Byte)
- 73 P1CONL — Port 1 Control Register (Low Byte)
- 74 P1PUR — Port 1 Pull-up Control Register
- 75 P2CONH — Port 2 Control Register (High Byte)
- 76 P2CONL — Port 2 Control Register (Low Byte)
- 77 P2PUR — Port 2 Pull-up Control Register
- 78 P3CON — Port 3 Control Register
- 79 P3PUR — Port 3 Pull-up Control Register
- 80 PP — Register Page Pointer
- 81 RP0 — Register Pointer 0
- 81 RP1 — Register Pointer 1
- 82 SPL — Stack Pointer (Low Byte)
- 83 STOPCON — Stop Control Register
- 84 SYM — System Mode Register
- 85 T0CON — Timer 0 Control Register
- 88 INTERRUPT TYPES
- 89 S3F80N8 INTERRUPT STRUCTURE
- 91 SYSTEM-LEVEL INTERRUPT CONTROL REGISTERS
- 92 INTERRUPT PROCESSING CONTROL POINTS
- 93 PERIPHERAL INTERRUPT CONTROL REGISTERS
- 94 SYSTEM MODE REGISTER (SYM)
- 95 INTERRUPT MASK REGISTER (IMR)
- 96 INTERRUPT PRIORITY REGISTER (IPR)
- 98 INTERRUPT REQUEST REGISTER (IRQ)
- 99 INTERRUPT PENDING FUNCTION TYPES
- 100 INTERRUPT SOURCE POLLING SEQUENCE
- 100 INTERRUPT SERVICE ROUTINES
- 101 GENERATING INTERRUPT VECTOR ADDRESSES
- 101 NESTING OF VECTORED INTERRUPTS
- 101 INSTRUCTION POINTER (IP)
- 101 FAST INTERRUPT PROCESSING
- 102 PROCEDURE FOR INITIATING FAST INTERRUPTS
- 102 FAST INTERRUPT SERVICE ROUTINE
- 102 RELATIONSHIP TO INTERRUPT PENDING BIT TYPES
- 102 PROGRAMMING GUIDELINES
- 103 DATA TYPES
- 103 REGISTER ADDRESSING
- 103 ADDRESSING MODES
- 108 FLAGS REGISTER (FLAGS)
- 109 FLAG DESCRIPTIONS
- 110 INSTRUCTION SET NOTATION
- 114 CONDITION CODES
- 115 INSTRUCTION DESCRIPTIONS
- 191 SYSTEM CLOCK CIRCUIT
- 192 MAIN OSCILLATOR CIRCUITS
- 193 CLOCK STATUS DURING POWER-DOWN MODES
- 194 SYSTEM CLOCK CONTROL REGISTER (CLKCON)
- 195 OVERVIEW
- 197 NORMAL MODE RESET OPERATION
- 197 HARDWARE RESET VALUES
- 199 STOP MODE
- 200 IDLE MODE
- 202 PORT DATA REGISTERS
- 203 PORT 0
- 205 PORT 1
- 209 PORT 2
- 211 PORT3 (32-PIN S3F80N8)
- 214 BASIC TIMER CONTROL REGISTER (BTCON)
- 215 BASIC TIMER FUNCTION DESCRIPTION
- 219 TIMER/COUNTER 0 CONTROL REGISTER (T0CON)
- 221 TIMER 0 FUNCTION DESCRIPTION
- 245 TARGET BOARDS
- 245 PROGRAMMING SOCKET ADAPTER
- 247 TB80N8 TARGET BOARD
- 252 OTP/MTP PROGRAMMER (WRITER)