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CONTROL REGISTERS S3F80N8_UM_REV1.10
PP
— Register Page Pointer DFH
Reset Value
Read/Write
Addressing Mode
.7–.0
.7 .6 .5 .4 .3 .2 .1 .0
0 0 0 0 0 0 0 0
R/W R/W R/W R/W R/W R/W R/W R/W
Register addressing mode only
Not used for the S3F80N8.
NOTE: In S3F80N8, only page 0 settings are valid. Register page pointer values for the source and destination register page are automatically set to ‘00H’ following a hardware reset. These values should not be changed during normal operation.
4-24
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Table of contents
- 31 WORKING REGISTERS
- 32 USING THE REGISTER POINTS
- 36 COMMON WORKING REGISTER AREA (C0H–CFH)
- 37 4-BIT WORKING REGISTER ADDRESSING
- 39 8-BIT WORKING REGISTER ADDRESSING
- 60 BTCON — Basic Timer Control Register
- 61 CLKCON — System Clock Control Register
- 62 EXTINT — External Interrupt Enable Register
- 63 EXTPND — External Interrupt Pending Register
- 64 FLAGS — System Flags Register
- 65 IMR — Interrupt Mask Register
- 66 IPH — Instruction Pointer (High Byte)
- 66 IPL — Instruction Pointer (Low Byte)
- 67 IPR — Interrupt Priority Register
- 68 IRQ — Interrupt Request Register
- 69 P0CONH — Port 0 Control Register (High Byte)
- 70 P0CONL — Port 0 Control Register (Low Byte)
- 71 P0PUR — Port 0 Pull-up Control Register
- 72 P1CONH — Port 1 Control Register (High Byte)
- 73 P1CONL — Port 1 Control Register (Low Byte)
- 74 P1PUR — Port 1 Pull-up Control Register
- 75 P2CONH — Port 2 Control Register (High Byte)
- 76 P2CONL — Port 2 Control Register (Low Byte)
- 77 P2PUR — Port 2 Pull-up Control Register
- 78 P3CON — Port 3 Control Register
- 79 P3PUR — Port 3 Pull-up Control Register
- 80 PP — Register Page Pointer
- 81 RP0 — Register Pointer 0
- 81 RP1 — Register Pointer 1
- 82 SPL — Stack Pointer (Low Byte)
- 83 STOPCON — Stop Control Register
- 84 SYM — System Mode Register
- 85 T0CON — Timer 0 Control Register
- 88 INTERRUPT TYPES
- 89 S3F80N8 INTERRUPT STRUCTURE
- 91 SYSTEM-LEVEL INTERRUPT CONTROL REGISTERS
- 92 INTERRUPT PROCESSING CONTROL POINTS
- 93 PERIPHERAL INTERRUPT CONTROL REGISTERS
- 94 SYSTEM MODE REGISTER (SYM)
- 95 INTERRUPT MASK REGISTER (IMR)
- 96 INTERRUPT PRIORITY REGISTER (IPR)
- 98 INTERRUPT REQUEST REGISTER (IRQ)
- 99 INTERRUPT PENDING FUNCTION TYPES
- 100 INTERRUPT SOURCE POLLING SEQUENCE
- 100 INTERRUPT SERVICE ROUTINES
- 101 GENERATING INTERRUPT VECTOR ADDRESSES
- 101 NESTING OF VECTORED INTERRUPTS
- 101 INSTRUCTION POINTER (IP)
- 101 FAST INTERRUPT PROCESSING
- 102 PROCEDURE FOR INITIATING FAST INTERRUPTS
- 102 FAST INTERRUPT SERVICE ROUTINE
- 102 RELATIONSHIP TO INTERRUPT PENDING BIT TYPES
- 102 PROGRAMMING GUIDELINES
- 103 DATA TYPES
- 103 REGISTER ADDRESSING
- 103 ADDRESSING MODES
- 108 FLAGS REGISTER (FLAGS)
- 109 FLAG DESCRIPTIONS
- 110 INSTRUCTION SET NOTATION
- 114 CONDITION CODES
- 115 INSTRUCTION DESCRIPTIONS
- 191 SYSTEM CLOCK CIRCUIT
- 192 MAIN OSCILLATOR CIRCUITS
- 193 CLOCK STATUS DURING POWER-DOWN MODES
- 194 SYSTEM CLOCK CONTROL REGISTER (CLKCON)
- 195 OVERVIEW
- 197 NORMAL MODE RESET OPERATION
- 197 HARDWARE RESET VALUES
- 199 STOP MODE
- 200 IDLE MODE
- 202 PORT DATA REGISTERS
- 203 PORT 0
- 205 PORT 1
- 209 PORT 2
- 211 PORT3 (32-PIN S3F80N8)
- 214 BASIC TIMER CONTROL REGISTER (BTCON)
- 215 BASIC TIMER FUNCTION DESCRIPTION
- 219 TIMER/COUNTER 0 CONTROL REGISTER (T0CON)
- 221 TIMER 0 FUNCTION DESCRIPTION
- 245 TARGET BOARDS
- 245 PROGRAMMING SOCKET ADAPTER
- 247 TB80N8 TARGET BOARD
- 252 OTP/MTP PROGRAMMER (WRITER)