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ADDRESS SPACES S3F80N8_UM_REV1.10
COMMON WORKING REGISTER AREA (C0H–CFH)
After a reset, register pointers RP0 and RP1 automatically select two 8-byte register slices, locations C0H–CFH, as the active 16-byte working register block:
This 16-byte address range is called common area. That is, locations in this area can be used as working registers by operations that address any location on any page in the register file. Typically, these working registers serve as temporary buffers for data operations between different pages.
FFH
FFH
Page 7
Page 6
FFH
FFH
Page 5
Page 4
FFH
FFH
FFH
FFH
Page 3
Page 2
Page 1
Page 0
FFH
FCH
E0H
D0H
C0H
Following a hardware reset, register pointers RP0 and RP1 point to the common working register area, locations C0H-CFH.
RP0 =
RP1 =
1 1 0 0 0 0 0 0
1 1 0 0 1 0 0 0
C0H
BFH
~
Page 0
Prime
Space
00H
NOTE:
In the S3F80N8 microcontrolle, only Page 0 is implemented.
Figure 2-9. Common Working Register Area
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~
~
~
~
~
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2-10
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Table of contents
- 31 WORKING REGISTERS
- 32 USING THE REGISTER POINTS
- 36 COMMON WORKING REGISTER AREA (C0H–CFH)
- 37 4-BIT WORKING REGISTER ADDRESSING
- 39 8-BIT WORKING REGISTER ADDRESSING
- 60 BTCON — Basic Timer Control Register
- 61 CLKCON — System Clock Control Register
- 62 EXTINT — External Interrupt Enable Register
- 63 EXTPND — External Interrupt Pending Register
- 64 FLAGS — System Flags Register
- 65 IMR — Interrupt Mask Register
- 66 IPH — Instruction Pointer (High Byte)
- 66 IPL — Instruction Pointer (Low Byte)
- 67 IPR — Interrupt Priority Register
- 68 IRQ — Interrupt Request Register
- 69 P0CONH — Port 0 Control Register (High Byte)
- 70 P0CONL — Port 0 Control Register (Low Byte)
- 71 P0PUR — Port 0 Pull-up Control Register
- 72 P1CONH — Port 1 Control Register (High Byte)
- 73 P1CONL — Port 1 Control Register (Low Byte)
- 74 P1PUR — Port 1 Pull-up Control Register
- 75 P2CONH — Port 2 Control Register (High Byte)
- 76 P2CONL — Port 2 Control Register (Low Byte)
- 77 P2PUR — Port 2 Pull-up Control Register
- 78 P3CON — Port 3 Control Register
- 79 P3PUR — Port 3 Pull-up Control Register
- 80 PP — Register Page Pointer
- 81 RP0 — Register Pointer 0
- 81 RP1 — Register Pointer 1
- 82 SPL — Stack Pointer (Low Byte)
- 83 STOPCON — Stop Control Register
- 84 SYM — System Mode Register
- 85 T0CON — Timer 0 Control Register
- 88 INTERRUPT TYPES
- 89 S3F80N8 INTERRUPT STRUCTURE
- 91 SYSTEM-LEVEL INTERRUPT CONTROL REGISTERS
- 92 INTERRUPT PROCESSING CONTROL POINTS
- 93 PERIPHERAL INTERRUPT CONTROL REGISTERS
- 94 SYSTEM MODE REGISTER (SYM)
- 95 INTERRUPT MASK REGISTER (IMR)
- 96 INTERRUPT PRIORITY REGISTER (IPR)
- 98 INTERRUPT REQUEST REGISTER (IRQ)
- 99 INTERRUPT PENDING FUNCTION TYPES
- 100 INTERRUPT SOURCE POLLING SEQUENCE
- 100 INTERRUPT SERVICE ROUTINES
- 101 GENERATING INTERRUPT VECTOR ADDRESSES
- 101 NESTING OF VECTORED INTERRUPTS
- 101 INSTRUCTION POINTER (IP)
- 101 FAST INTERRUPT PROCESSING
- 102 PROCEDURE FOR INITIATING FAST INTERRUPTS
- 102 FAST INTERRUPT SERVICE ROUTINE
- 102 RELATIONSHIP TO INTERRUPT PENDING BIT TYPES
- 102 PROGRAMMING GUIDELINES
- 103 DATA TYPES
- 103 REGISTER ADDRESSING
- 103 ADDRESSING MODES
- 108 FLAGS REGISTER (FLAGS)
- 109 FLAG DESCRIPTIONS
- 110 INSTRUCTION SET NOTATION
- 114 CONDITION CODES
- 115 INSTRUCTION DESCRIPTIONS
- 191 SYSTEM CLOCK CIRCUIT
- 192 MAIN OSCILLATOR CIRCUITS
- 193 CLOCK STATUS DURING POWER-DOWN MODES
- 194 SYSTEM CLOCK CONTROL REGISTER (CLKCON)
- 195 OVERVIEW
- 197 NORMAL MODE RESET OPERATION
- 197 HARDWARE RESET VALUES
- 199 STOP MODE
- 200 IDLE MODE
- 202 PORT DATA REGISTERS
- 203 PORT 0
- 205 PORT 1
- 209 PORT 2
- 211 PORT3 (32-PIN S3F80N8)
- 214 BASIC TIMER CONTROL REGISTER (BTCON)
- 215 BASIC TIMER FUNCTION DESCRIPTION
- 219 TIMER/COUNTER 0 CONTROL REGISTER (T0CON)
- 221 TIMER 0 FUNCTION DESCRIPTION
- 245 TARGET BOARDS
- 245 PROGRAMMING SOCKET ADAPTER
- 247 TB80N8 TARGET BOARD
- 252 OTP/MTP PROGRAMMER (WRITER)