STMicroelectronics VND5025BK-E Datasheet
The STMicroelectronics VND5025BK-E is a high-side driver IC designed for automotive applications, featuring double-channel operation, a wide operating voltage range (4.5V to 36V), and a low on-state resistance (25mΩ per channel). It provides precise current sense proportional to the load current, enabling accurate monitoring of load conditions. The device includes protection features such as undervoltage shutdown, overvoltage clamp, and current limitation, ensuring robust operation in various scenarios.
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VND5025BK-E
Double channel high-side driver with analog current sense for automotive applications
Features
Max transient supply voltage
Operating voltage range
V
CC
V
CC
Max on-state resistance (per ch.) R
ON
Current limitation (typ) I
LIMH
Off-state supply current I
S
1.
Typical value with all loads connected.
41 V
4.5 to 36 V
25 m Ω
60 A
2 µA
(1)
Description
PowerSSO-24™
– Electrostatic discharge protection
■ Features
– In-rush current active management by power limitation
– Very low standby current
The VND5025BK-E is a monolithic device made using STMicroelectronics™ VIPower™ M0-5 technology, intended for driving resistive or inductive loads with one side connected to ground, and suitable for driving LEDs.
■
– 3.0 V CMOS compatible input
– Optimized electromagnetic emission
– Very low electromagnetic susceptibility
– In compliance with the 2002/95/EC
European directive
– Two classes with different ‘K@3A’ ranges
– Package: ECOPACK ®
Diagnostic functions
Active V
CC
pin voltage clamp protects the device against low energy spikes (see ISO7637 transient compatibility table). This device integrates an analog current sense which delivers a current proportional to the load current (according to a known ratio) when CS_DIS is driven low or left open. When CS_DIS is driven high, the
CURRENT SENSE pin is in a high impedance condition.
– 3 A current sense precision of +/-8%
– Proportional load current sense
– High current sense precision for wide range currents
Output current limitation protects the device in overload condition. In case of long overload duration, the device limits the dissipated power to safe level up to thermal shutdown intervention.
Thermal shutdown with automatic restart allows – Current sense disable
– Thermal shutdown indication
■
– Very low current sense leakage
– Undervoltage shutdown fault condition disappears.
Table 1.
Device summary
Order codes
– Overvoltage clamp the device to recover normal operation as soon as
Package
Tube Tape and reel
– Load current limitation
– Self-limiting of fast thermal transients
– Protection against loss of ground and loss of V
CC
– Thermal shutdown
– Reverse battery protection
PowerSSO-24™
VND5025BK-E
VND5025B1K-E
VND5025B2K-E
VND5025BKTR-E
VND5025B1KTR-E
VND5025B2KTR-E
August 2010 Doc ID 13374 Rev 6 1/32 www.st.com
1
VND5025BK-E Contents
Contents
Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 22
Solution 1: resistor in the ground line (RGND only) . . . . . . . . . . . . . . . . 22
Solution 2: diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . . . 23
Maximum demagnetization energy (VCC = 13.5 V) . . . . . . . . . . . . . . . . . 24
Package and thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
PowerSSO-24™ thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
®
packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Obsolete Product(s) - Obsolete Product(s)
2/32 Doc ID 13374 Rev 6
VND5025BK-E
List of tables
List of tables
CC
= 13V; T j
= 25 °C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
< 16 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Obsolete Product(s) - Obsolete Product(s)
Doc ID 13374 Rev 6 3/32
List of figures
List of figures
VND5025BK-E
Delay response time between rising edge of output current and rising edge of current sense
OUT
/I
SENSE
vs I
OUT
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
case
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
LIMH
vs T case
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Rthj-amb vs PCB copper area in open box free air condition (one channel ON) . . . . . . . . 25
PowerSSO-24™ thermal impedance junction to ambient single pulse (one channel ON) . 26
Thermal fitting model of a double channel HSD in PowerSSO-24™ . . . . . . . . . . . . . . . . . 26
Obsolete Product(s) - Obsolete Product(s)
4/32 Doc ID 13374 Rev 6
VND5025BK-E
1
Block diagram and pin description
Block diagram and pin description
Figure 1.
Block diagram
GND
INPUT1
INPUT2
V
CC
CLAMP
UNDERVOLTAGE
LOGIC
PwCLAMP 1
DRIVER 1
I
LIM
1
V
DSLIM
1
Pwr
LIM
1
OVERTEMP. 1
I
OUT1
K 1
Pwr
LIM
2
CS_DIS
V
CC
DRIVER 2
PwCLAMP 2
I
LIM
2
V
DSLIM
2
I
OUT2
OVERTEMP. 2
K 2
OUTPUT1
CURRENT
SENSE1
OUTPUT2
CURRENT
SENSE2
Table 2.
Pin functions
Name
V
CC
OUTPUT
GND
INPUT
1,2
1,2
CURRENT SENSE
1,2
CS_DIS
Function
Battery connection.
Power output.
Ground connection; must be reverse battery protected by an external diode/resistor network.
Voltage controlled input pin with hysteresis, CMOS compatible; controls output switch state.
Analog current sense pin; delivers a current proportional to the load current.
Active high CMOS compatible pin to disable the current sense pin.
Obsolete Product(s) - Obsolete Product(s)
Doc ID 13374 Rev 6 5/32
Block diagram and pin description
Figure 2.
Configuration diagram (top view)
V
CC
GND
N.C.
INPUT2
N.C.
INPUT1
N.C.
CURRENT SENSE1
N.C.
CURRENT SENSE2
CS_DIS.
V
CC
3
4
1
2
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
OUTPUT2
OUTPUT2
OUTPUT2
OUTPUT2
OUTPUT2
OUTPUT2
OUTPUT1
OUTPUT1
OUTPUT1
OUTPUT1
OUTPUT1
OUTPUT1
TAB = V
CC
VND5025BK-E
Table 3.
Suggested connections for unused and not connected pins
Connection / pin Current sense N.C.
Output Input
Floating N.R.
(1)
X X
To Ground Through 1k
Ω
resistor X N.R.
X
Through 10k Ω resistor
CS_DIS
X
Through 10k Ω resistor
1. Not recommended.
Obsolete Product(s) - Obsolete Product(s)
6/32 Doc ID 13374 Rev 6
VND5025BK-E Electrical specification
Figure 3.
Current and voltage conventions
V
CSD
V
IN1
V
IN2
I
CSD
I
IN1
I
IN2
CS_DIS
INPUT1
INPUT2
I
S
GND
V
CC
V
F
I
OUT1
OUTPUT1
I
SENSE1
CURRENT
SENSE1
I
OUT2
V
SENSE1
OUTPUT2
CURRENT
SENSE2
I
SENSE2
V
SENSE2
V
OUT2
V
OUT1
I
GND
V
CC
Note: V
Fn
= V
OUTn
- V
CC
during reverse battery condition.
2.1 Absolute maximum ratings
Stressing the device above the rating listed in the “Absolute maximum ratings” table may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied. Exposure to the conditions in table below for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality document.
Table 4.
Symbol
Absolute maximum ratings
Parameter Value Unit
V
CC
-V
CC
DC supply voltage
Reverse DC supply voltage
41
0.3
DC reverse ground pin current 200 -I
GND
Obsolete Product(s) - Obsolete Product(s)
- I
OUT
Internally limited
Reverse DC output current 24
A mA
DC input current I
IN
I
CSD
-I
CSENSE
V
CSENSE
DC current sense disable input current
DC reverse CS pin current
-1 to 10
200 mA
Current sense maximum voltage V
CC
- 41 to +V
CC
V
V
Doc ID 13374 Rev 6 7/32
Electrical specification
Table 4.
Symbol
Absolute maximum ratings (continued)
Parameter
E
MAX
V
(1)
ESD
Maximum switching energy (single pulse)
I
(L = 0.3 mH; R
L
OUT
= I
= 0 Ω ; V bat limL
(Typ.))
= 13.5 V; T jstart
= 150 °C;
Electrostatic discharge
(Human Body Model: R = 1.5 k Ω ; C = 100 pF)
- Input
- Current sense
- CS_DIS
- Output
- V
CC
Charge device model (CDM-AEC-Q100-011) V
ESD
T j
T stg
Junction operating temperature
Storage temperature
1.
See
VND5025BK-E
Value
109
Unit mJ
4000
2000
4000
5000
5000
750
-40 to 150
-55 to 150
V
V
V
V
V
V
°C
Table 5.
Symbol
Thermal data
Parameter
R thj-case
Thermal resistance junction-case (with one channel ON)
R thj-amb
Thermal resistance junction-ambient
Maximum value Unit
1.35
See
°C/W
Obsolete Product(s) - Obsolete Product(s)
8/32 Doc ID 13374 Rev 6
VND5025BK-E Electrical specification
8 V < V
CC
< 36 V; -40 °C < T j
< 150 °C, unless otherwise specified.
Table 6.
Symbol
Power section
Parameter Test conditions Min. Typ. Max. Unit
V
CC
V
USD
Operating supply voltage
Undervoltage shutdown
V
USDhyst
Undervoltage shut-down hysteresis
V
I
R
I
ON clamp
L(off)
V
S
F
On-state resistance
Clamp voltage
Supply current
(1)
Off-state output current
(1)
I
OUT
= 3 A; T j
= 25 °C
I
OUT
= 3 A; T j
= 150 °C
I
OUT
= 3 A; V
CC
= 5 V; T j
= 25 °C
I
S
= 20 mA
Off-state; V
CC
V
IN
= V
OUT
= V
= 13 V; T
SENSE j
= V
= 25 °C;
CSD
= 0 V
On-state; V
CC
= 13 V;
V
IN
= 5 V; I
OUT
= 0 A
V
IN
= V
OUT
= 0 V;
V
CC
= 13V; T j
= 25 °C
V
IN
= V
OUT
= 0 V;
V
CC
= 13 V; T j
= 125 °C
Output - V
CC
diode voltage
(1)
-I
OUT
= 4 A; T j
= 150 °C
1.
For each channel.
2.
PowerMOS leakage included.
4.5
13 36
3.5
4.5
41
0
0
0.5
46
2
(2)
3
0.01
5
(2)
6
3
5
0.7
25
50
35
52
V m
V
V
Ω
µA mA
µA
Table 7.
Symbol
Switching (V
CC
= 13V; T j
= 25 °C)
Parameter Test conditions Min.
Typ.
Max. Unit t d(on) t d(off)
Turn-on delay time
Turn-off delay time
R
L
= 4.3
Ω
(see
)
—
—
35
50
—
—
µs
(dV
OUT
/dt) on
(dV
OUT
/dt) off
Turn-on voltage slope —
—
Turn-off voltage slope
= 4.3
Ω
—
—
V/µs
Switching energy losses
R
L
W
ON
— 0.45
— during t
W ON
R
L
= 4.3
Ω mJ
(see
)
W
OFF
Switching energy losses
— 0.35
— during t
W OFF
Doc ID 13374 Rev 6 9/32
Electrical specification VND5025BK-E
Table 8.
Symbol
V
IL
I
IL
V
IH
I
IH
V
I(hyst)
Logic input
Parameter
Input low level voltage
Low level input current
Input high level voltage
High level input current
Input hysteresis voltage
V
ICL
Input clamp voltage
V
CSDL
I
CSDL
V
CSDH
I
CSDH
V
CSD(hyst)
CS_DIS low level voltage
Low level CS_DIS current
CS_DIS high level voltage
High level CS_DIS current
CS_DIS hysteresis voltage
V
CSCL
CS_DIS clamp voltage
Test conditions
V
IN
= 0.9 V
V
IN
= 2.1 V
I
IN
= 1 mA
I
IN
= -1 mA
V
CSD
= 0.9 V
V
CSD
= 2.1 V
Min.
Typ. Max.
Unit
0.9
1
2.1
10
V
µA
V
µA
0.25
5.5
7
V
-0.7
0.9
1
2.1
10
µA
V
µA
0.25
5.5
7 V
-0.7
I
CSD
= 1 mA
I
CSD
= -1 mA
Table 9.
Symbol
Protection and diagnostics (1)
Parameter Test conditions Min.
Typ.
Max.
Unit
I
LIMH
I
LIML
DC short circuit current
Short circuit current during thermal cycling
V
CC
= 13 V
5 V < V
CC
< 36 V
V
CC
T
R
= 13 V;
< T j
< T
TSD
43 60
24
85
T
TSD
T
R
T
RS
Shutdown temperature
Reset temperature
Thermal reset of STATUS
150 175
T
RS
+ 1 T
RS
+ 5
135
200
°C
T
HYST
Thermal hysteresis
(T
TSD
-T
R
)
7
Turn-off output voltage I
OUT
= 2 A;
V
DEMAG
V
ON clamp
I
OUT
T j
= 0; L = 6 mH
V
CC
- 41 V
CC
- 46 V
CC
- 52 V
V
IN
Obsolete Product(s) - Obsolete Product(s) limitation
= 0.2 A
= -40 °C to 150 °C 40 mV
(see
A
1.
To ensure long term reliability under heavy overload or short circuit conditions, protection and related diagnostic signals must be used together with a proper software strategy. If the device is subjected to abnormal conditions, this software must limit the duration and number of activation cycles.
10/32 Doc ID 13374 Rev 6
VND5025BK-E Electrical specification
Table 10.
Current sense (8 V < V
CC
< 16 V)
Symbol Parameter Test conditions Min. Typ. Max. Unit
K
LED
K
0
K
1 dK
1
/K
1
(1)(2)
Current sense ratio drift
K
2
I
OUT
/I
SENSE
I
OUT
/I
SENSE
I
OUT
/I
SENSE
I
OUT
/I
SENSE
I
OUT
V
CSD
= 0.05 A; V
SENSE
= 0 V; T j
= 0.5 V;
= -40 °C to 150 °C
I
OUT
V
CSD
= 0.5 A; V
SENSE
= 0 V; T j
= 0.5 V;
= -40 °C to 150 °C
I
OUT
= 2 A; V
SENSE
= 4 V;
V
CSD
= 0 V;
T j
= -40 °C
T j
= 25 °C to 150 °C
I
OUT
= 2 A; V
SENSE
= 4 V;
V
CSD
= 0 V;
T j
= -40 °C to 150 °C
I
OUT
= 3 A; V
SENSE
= 4 V;
V
CSD
= 0 V;
T j
= -40 °C to 150 °C
ClassB
ClassB1
ClassB2
1740 3300 4570
1920 3020 3930
2090
2320
2810
2810
3440
3200
-8
2510
2510
2690
+8
3160
2960
3160 dK
2
/K
2
K
3 dK
3
/K
3
I
SENSE0
Current sense ratio drift
I
OUT
/I
SENSE
Current sense ratio drift
Analog sense leakage current
I
OUT
= 3 A; V
SENSE
= 4 V; V
CSD
= 0 V;
T j
= -40 °C to 150 °C
I
OUT
= 10 A; V
SENSE
= 4 V;
V
CSD
= 0 V;
T j
= -40 °C
T j
= 25 °C to 150 °C
I
OUT
= 10 A; V
SENSE
= 4 V; V
CSD
= 0 V;
T j
= -40 °C to 150 °C
I
OUT
V
IN
= 0 A; V
SENSE
= 0 V; T j
= 0 V; V
CSD
= -40 °C to 150 °C
= 5 V;
V
CSD
T j
= 0 V; V
IN
= 5 V;
= -40 °C to 150 °C
I
OUT
V
IN
= 2 A; V
SENSE
= 5 V; T j
= 0 V; V
CSD
= -40 °C to 150 °C
= 5 V;
-6
2610
2650
2760
2760
2970
2870
-3
0
0
0
+6
+3
1
2
1
Max analog
V
SENSE
Analog sense
I
OUT
= 3 A; V
CSD
= 0 V 5 Sense output
Obsolete Product(s) - Obsolete Product(s)
V
V
SENSEH output voltage in over temperature condition
V
CC
= 13 V; R
SENSE
= 3.9 k Ω 9
%
%
µA
µA
µA
%
I
SENSEH
Analog sense output current in over temperature condition
V
CC
= 13 V; V
SENSE
= 5 V 8 mA
Doc ID 13374 Rev 6 11/32
Electrical specification VND5025BK-E
Table 10.
Current sense (8 V < V
CC
< 16 V) (continued)
Symbol Parameter Test conditions Min. Typ. Max. Unit t t t
DSENSE1H
DSENSE1L
DSENSE2H
Delay response time from falling edge of CS_DIS pin
V
SENSE
I
SENSE
< 4 V, 0.5 < I
OUT
< 10 A
= 90 % of I
SENSEMAX
(see
)
Delay response time from rising edge of CS_DIS pin
V
SENSE
I
SENSE
< 4 V, 0.5 < I
OUT
< 10 A
= 10 % of I
SENSEMAX
(see
)
Delay response time from rising edge of INPUT pin
V
SENSE
I
SENSE
(see
< 4 V, 0.5 < I
OUT
< 10 A
= 90 % of I
SENSEMAX
)
Δ t
DSENSE2H
Delay response time between rising edge of output current and rising edge of current sense
V
SENSE
< 4 V,
I
SENSE
= 90 % of I
SENSEMAX,
I
OUT
= 90 % of I
(see
)
OUTMAX
, I
OUTMAX
= 3 A t
DSENSE2L
Delay response time from falling edge of INPUT pin
V
SENSE
I
SENSE
< 4 V, 0.5 < I
OUT
< 10 A
= 10 % of I
SENSEMAX
(see
)
50 100
5 20
70 300
100
110
250
1.
Parameter guaranteed by design; it is not tested.
2.
Current sense ratio drift is the deviation of factor K for a given device (measured over the range -40 °C to
150 °C and 8 V < V
CC
< 16 V) from its value measured at T j
= 25 °C, V
CC
= 13 V.
µs
Figure 4.
Current sense delay characteristics
INPUT
CS_DIS
LOAD CURRENT
SENSE CURRENT t
DSENSE1L t
DSENSE1H t
DSENSE2L t
DSENSE2H
Obsolete Product(s) - Obsolete Product(s)
12/32 Doc ID 13374 Rev 6
VND5025BK-E Electrical specification
Figure 5.
Delay response time between rising edge of output current and rising edge of current sense (CS enabled)
V
IN
Δ t
DSENSE2H t
I
OUT
90% I
OUTMAX
I
OUTMAX t
I
SENSE I
SENSEMAX
90% I
SENSEMAX t
Obsolete Product(s) - Obsolete Product(s)
Doc ID 13374 Rev 6 13/32
Electrical specification
Figure 6.
I
OUT
/I
SENSE
vs I
OUT
Iout/Isense
Class B
3400
3200
3000
2800
2600
2400
2200
2000
2
Max, Tj = -40 °C to 150 °C
Min, Tj = -40 °C to 150 °C
4 6
Iout [A]
Class B1
Iout/Isense
3400
3200
3000
2800
2600
2400
2200
2000
2
Max, Tj = -40 °C to 150 °C
Min, Tj = -40 °C to 150 °C
4 6
Iout [A]
Iout/Isense
Note: See
for details.
3400
3200
3000
2800
2600
2400
2200
2000
2
Max, Tj = -40 °C to 150 °C
Min, Tj = -40 °C to 150 °C
4 6
Iout [A]
14/32 Doc ID 13374 Rev 6
8
8
8
VND5025BK-E
10
10
10
VND5025BK-E
Figure 7.
Maximum current sense ratio drift vs load current
2
0
-2
-4
-6
-8
-10
2
10 dK/K [%]
8
6
4
3
Max, Tj = -40 °C to 150 °C
Min, Tj = -40 °C to 150 °C
4 5 6
Iout [A]
Note: Parameter guaranteed by design; it is not tested.
7 8
Electrical specification
9 10
Table 11.
Truth table
Conditions
Normal operation
Overtemperature
Undervoltage
Input
L
H
L
H
L
H
Output
L
H
L
L
Sense (V
CSD
= 0 V)
(1)
0
Nominal
0
V
SENSEH
0
L 0
L Short circuit to GND (R
SC
≤
10m Ω ) 0 if T j
< T
TSD
H
V
SENSEH
if T j
> T
TSD Obsolete Product(s) - Obsolete Product(s)
Short circuit to V
CC
L
H
0
H < Nominal
Negative output voltage clamp L L 0
1.
If the V
CSD
is high, the SENSE output is at a high impedance; its potential depends on leakage currents and external circuit.
Doc ID 13374 Rev 6 15/32
Electrical specification
Figure 8.
Switching characteristics
V
OUT t
Won
80% dV
OUT
/dt
(on) t r 10%
INPUT t d(on) t d(off) t
Woff
90% t f dV
OUT
/dt
(off)
VND5025BK-E t t
Figure 9.
Output voltage drop limitation
V
CC
- V
OUT
T j
= 150 °C
T j
= 25 °C
T j
= -40 °C
V on
I
OUT
V on
/R on(T)
Obsolete Product(s) - Obsolete Product(s)
16/32 Doc ID 13374 Rev 6
VND5025BK-E Electrical specification
Table 12.
Electrical transient requirements (part 1/3)
ISO 7637-2:
2004(E)
Test pulse
III
Test levels
(1)
IV
Number of pulses or test times
Burst cycle/pulse repetition time
Min.
Max.
1
2a
-75V
+37V
-100V
+50V
5000 pulses
5000 pulses
0.5s
0.2s
5s
5s
3a
3b
-100V
+75V
-150V
+100V
1h
1h
90ms
90ms
100ms
100ms
4
5b
(2)
-6V -7V 1 pulse
+65V +87V 1 pulse
1.
The above test levels must be considered referred to V
CC
= 13.5V except for pulse 5b.
2.
Valid in case of external load dump clamp: 40V maximum referred to ground.
Delays and
Impedance
2 ms, 10 Ω
50µs, 2 Ω
0.1µs, 50
Ω
0.1µs, 50 Ω
100ms, 0.01
Ω
400ms, 2 Ω
Table 13.
Electrical transient requirements (part 2/3)
ISO 7637-2:
2004E
Test pulse III
Test level results
1
2a
3a
3b
C
C
C
C
5b
4
(1)
C
C
1.
Valid in case of external load dump clamp: 40V maximum referred to ground.
VI
C
C
C
C
C
C
Table 14.
Electrical transient requirements (part 3/3)
Class Contents
C All functions of the device performed as designed after exposure to disturbance.
One or more functions of the device did not perform as designed after exposure to disturbance and cannot be returned to proper operation without replacing the device.
Doc ID 13374 Rev 6 17/32
Electrical specification
Figure 10. Waveforms
NORMAL OPERATION
INPUT
CS_DIS
LOAD CURRENT
SENSE CURRENT
UNDERVOLTAGE
V
USDhyst
V
CC
INPUT
CS_DIS
LOAD CURRENT
SENSE CURRENT
V
USD
INPUT
CS_DIS
LOAD VOLTAGE
LOAD CURRENT
SENSE CURRENT
< Nominal
SHORT TO V
CC
< Nominal
OVERLOAD OPERATION
T
R
T
TSD
T
RS
T j
INPUT
CS_DIS
LOAD CURRENT
SENSE CURRENT
Current limitation
SHORTED LOAD
VND5025BK-E
I
LIMH
I
LIML
V
SENSEH
NORMAL LOAD
18/32 Doc ID 13374 Rev 6
VND5025BK-E Electrical specification
Figure 11. Off-state output current
Iloff (uA)
0.5
0.45
0.4
0.35
0.3
0.25
0.2
0.15
0.1
0.05
0
-50 -25
Off State
Vcc=13V
Vin=Vout=0V
0 25 50 75
Tc (°C)
100 125 150 175
Figure 13. Input clamp voltage
Vicl (V)
7
6.75
6.5
6.25
6
5.75
Iin=1mA
5.5
5.25
5
-50 -25 0 25 50 75
Tc (°C)
100 125 150 175
Figure 15. Input low level
Vil (V)
2
1.8
1.6
1.2
1
0.8
0.6
0.4
0.2
0
-50 -25 0 25 50 75
Tc (°C)
100 125 150 175
Figure 12. High level input current
Iih(uA)
5
4.5
4
3.5
3
2.5
2
1.5
1
0.5
0
-50 -25
Vin=2.1V
0 25 50 75
Tc (°C)
100 125 150 175
Figure 14. Input high level
2.5
2
1.5
1
0.5
Vih (V)
4
3.5
3
0
-50 -25 0 25 50 75
Tc (°C)
100 125 150 175
Figure 16. Input hysteresis voltage
Vhyst (V)
1
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
-50 -25 0 25 50 75
Tc (°C)
100 125 150 175
Doc ID 13374 Rev 6 19/32
Electrical specification
Figure 17. On-state resistance vs T case
40
30
20
10
0
-50
Ron (mOhm)
100
90
80
70
Iout=3A
Vcc=13V
60
50
-25 0 25 50 75
Tc (°C)
100 125 150 175
Figure 19. Undervoltage shutdown
10
8
6
4
Vusd (V)
16
14
12
2
0
-50 -25 0 25 50 75
Tc (°C)
100 125 150 175
Figure 21. Turn-on voltage slope
(dVout/dt)on (V/ms)
1000
900
800
Vcc=13V
Rl=4.3Ohm
700
500
400
300
200
100
0
-50 -25 0 25 50 75
Tc (°C)
100 125 150 175
VND5025BK-E
Figure 18. On-state resistance vs V
CC
50
40
30
20
10
0
0
Ron (mOhm)
80
70
60
5 10 15 20
Vcc (V)
25
Figure 20. I
LIMH
vs T case
Tc=150°C
Tc= 125°C
Tc= 25°C
Tc= -40°C
30 35 40
Ilimh (A)
100
90
80
70
60
50
40
30
20
10
0
-50 -25
Vcc=13V
0 25 50 75
Tc (°C)
100 125 150 175
Figure 22. Turn-off voltage slope
(dVout/dt)off (V/ms)
1000
900
800
700
600
Vcc=13V
Rl=4.3Ohm
500
400
300
200
100
0
-50 -25 0 25 50 75
Tc (°C)
100 125 150 175
20/32 Doc ID 13374 Rev 6
VND5025BK-E
Figure 23. CS_DIS high level voltage
Vcsdh (V)
4
3.5
3
2.5
2
1.5
1
0.5
0
-50 -25 0 25 50 75
Tc (°C)
100 125 150 175
Figure 25. CS_DIS clamp voltage
Vcsdcl (V)
8
7.5
7
6.5
6
5.5
5
4.5
4
-50 -25
Icsd=1mA
0 25 50 75
Tc (°C)
100 125 150 175
Electrical specification
Figure 24. CS_DIS low level voltage
Vcsdl (V)
4
3.5
3
2.5
2
1.5
1
0.5
0
-50 -25 0 25 50 75
Tc (°C)
100 125 150 175
Obsolete Product(s) - Obsolete Product(s)
Doc ID 13374 Rev 6 21/32
Application information VND5025BK-E
Figure 26. Application schematic
+5V
R prot CS_DIS
µC
V
CC
C
R prot
R prot
EXT
INPUT
R
CURRENT SENSE
SENSE
GND
V
GND
R
GND
D
GND
OUTPUT
D ld
Note: Channel 2 has the same internal circuit as channel 1.
3.1 GND protection network against reverse battery
This section provides two solutions for implementing a ground protection network against reverse battery.
3.1.1 Solution 1: resistor in the ground line (R
GND
only)
This first solution can be used with any type of load.
The following formulas indicate how to dimension the R
GND resistor:
1.
R
GND
≤
600 mV / (I
S(on)max
)
2. R
GND
≥ (-V
CC
) / (-I
GND
) where -I
GND
is the DC reverse ground pin current and can be found in the absolute maximum rating section of the device datasheet.
= (-V
CC
)
2
GND
(when V
CC
Power Dissipation in R
P
D
/ R
GND
< 0 during reverse battery situations) is: Obsolete Product(s) - Obsolete Product(s)
This resistor can be shared among several different HSDs. Please note that the value of this resistor is calculated with formula (1), where I
S(on)max
becomes the sum of the maximum onstate currents of the different devices.
Please note that if the microprocessor ground is not shared by the device ground, the R
GND produces a shift (I
S(on)max
* R
GND
) in the input thresholds and the status output values. This shift varies depending on how many devices are ON in the case of several high-side drivers sharing the same R
GND
.
22/32 Doc ID 13374 Rev 6
VND5025BK-E
3.1.2
Application information
If the calculated power dissipation leads to a large resistor or several devices have to share the same resistor, then ST suggests to utilize the following Solution 2.
Solution 2: diode (D
GND
) in the ground line
If the device drives an inductive load, insert a resistor (R
GND
= 1 k
Ω
) in parallel to D
GND
.
This small signal diode can be safely shared among several different HSDs. Also in this case, the presence of the ground network produces a shift (
≈
600 mV) in the input threshold and in the status output values if the microprocessor ground is not common to the device ground. This shift does not vary if more than one HSD shares the same diode/resistor network.
3.3
D ld
is necessary (Voltage Transient Suppressor) if the load dump peak voltage exceeds the
V
CC
maximum DC rating. The same applies if the device is subject to transients on the V
CC line that are greater than the ones shown in the ISO 7637-2:2004E table.
MCU I/Os protection
If a ground protection network is used and negative transients are present on the V
CC
line, the control pins are pulled negative. ST suggests to insert an in-line resistor (R prot
) to prevent the microcontroller I/O pins from latch-up.
The value of these resistors is a compromise between the leakage current of microcontroller and the current required by the HSD I/Os (input levels compatibility) with the latch-up limit of microcontroller I/Os.
-V
CCpeak
/I latchup
≤
R prot
≤
(V
OHµC
-V
IH
-V
GND
) / I
IHmax
Calculation example:
For V
CCpeak
= -100 V and I latchup
≥
20 mA; V
OHµC
≥
4.5 V
5 k Ω ≤
R prot
≤
65 k Ω
Recommended values: R prot
= 10 k Ω , C
EXT
= 10 nF.
Obsolete Product(s) - Obsolete Product(s)
Doc ID 13374 Rev 6 23/32
Application information
3.4 Maximum demagnetization energy (V
CC
= 13.5 V)
VND5025BK-E
Figure 27. Maximum turn-off current versus inductance (for each channel)
100
C
A
B
10
1
0,1 1 L (mH) 10 100
A: T jstart
= 150 °C single pulse
B: T jstart
= 100 °C repetitive pulse
C: T jstart
= 125 °C repetitive pulse
V
IN
, I
L
Demagnetization Demagnetization Demagnetization
Obsolete Product(s) - Obsolete Product(s) t
Note:
Values are generated with R
L
= 0
Ω.
In case of repetitive pulses, T jstart
(at beginning of each demagnetization) of every pulse must not exceed the temperature specified above for curves A and B.
24/32 Doc ID 13374 Rev 6
VND5025BK-E
4 Package and thermal data
Figure 28. PowerSSO-24™ PC board
Package and thermal data
Note:
Layout condition of R th
and Z th
measurements (PCB: Double layer, Thermal Vias, FR4 area = 77 mm x 86 mm, PCB thickness = 1.6 mm, Cu thickness = 70 µm (front and back side), Copper areas: from minimum pad layout to 8 cm
2
).
Figure 29. R thj-amb
ON)
vs PCB copper area in open box free air condition (one channel
RTHj_amb(°C/W)
55
50
45
40
35
30 Obsolete Product(s) - Obsolete Product(s)
PCB Cu heatsink area (cm^2)
Doc ID 13374 Rev 6 25/32
Package and thermal data VND5025BK-E
Figure 30. PowerSSO-24™ thermal impedance junction to ambient single pulse (one channel ON)
ZTH (°C/W)
1000
100
10
1
Footprint
2 cm
2
8 cm
2
0.1
0.0001
0.001
0.01
0.1
Time (s)
1 10 100 1000
Equation 1: pulse calculation formula
Z
TH δ = R
TH where δ = t
P
/T
⋅ δ
+ Z
THtp
( 1 –
δ )
Figure 31. Thermal fitting model of a double channel HSD in PowerSSO-24™
Obsolete Product(s) - Obsolete Product(s)
Note: Values are given in
26/32 Doc ID 13374 Rev 6
VND5025BK-E
Table 15.
Thermal parameters
Area/Island (cm
2
) Footprint
R1 (°C/W)
R2 (°C/W)
R3 (°C/W)
R4 (°C/W)
R5 (°C/W)
R6 (°C/W)
R7 (°C/W)
R8 (°C/W)
C1 (W.s/°C)
C2 (W.s/°C)
C3 (W.s/°C)
C4 (W.s/°C)
C5 (W.s/°C)
C6 (W.s/°C)
C7 (W.s/°C)
C8 (W.s/°C)
0.28
0.9
0.001
0.003
0.025
0.75
1
0.28
0.9
6
7.7
9
28
2.2
0.001
0.003
9
17
4
5
2
Package and thermal data
8
8
10
9
17
Obsolete Product(s) - Obsolete Product(s)
Doc ID 13374 Rev 6 27/32
Package and packing information
5 Package and packing information
VND5025BK-E
5.1 ECOPACK
®
packages
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
®
packages, depending on their level of environmental compliance. ECOPACK
® specifications, grade definitions and product status are available at: www.st.com
.
ECOPACK
®
is an ST trademark.
5.2 Package mechanical data
Figure 32. PowerSSO-24™ package dimensions
Obsolete Product(s) - Obsolete Product(s)
28/32 Doc ID 13374 Rev 6
VND5025BK-E Package and packing information
Table 16.
PowerSSO-24™ mechanical data
Symbol
Min
L
O
Q h k
S
T
U
N
X e3
F
G
H c
D
E e
A
A2 a1 b
2.15
0
0.33
0.23
10.10
7.4
10.1
0°
0.55
4.1
6.5
Millimeters
Typ
0.8
8.8
2.3
1.2
0.8
2.9
3.65
1.0
Max
2.45
2.35
0.1
0.51
0.32
10.50
7.6
0.1
10.5
0.4
8°
0.85
10°
4.7
7.1
Doc ID 13374 Rev 6 29/32
Package and packing information VND5025BK-E
Figure 33. PowerSSO-24™ tube shipment (no suffix)
C
B
Base Qty
Bulk Qty
Tube length (±0.5)
A
B
C (±0.1)
All dimensions are in mm.
A
Figure 34. PowerSSO-24™ tape and reel shipment (suffix “TR”)
49
1225
532
3.5
13.8
0.6
REEL DIMENSIONS
Base Qty
Bulk Qty
A (max)
B (min)
C (±0.2)
F
G (+2 / -0)
N (min)
T (max)
1000
1000
330
1.5
13
20.2
24.4
100
30.4
TAPE DIMENSIONS
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb. 1986
Tape width
Tape Hole Spacing
Component Spacing
Hole Diameter
Hole Diameter
Hole Position
Compartment Depth
Hole Spacing
W
P0 (±0.1)
24
4
P 12
D (±0.05) 1.55
D1 (min)
F (±0.1)
K (max)
P1 (±0.1)
1.5
11.5
2.85
2
All dimensions are in mm.
End tape
Start
No components Components No components
500mm min 500mm min
Empty components pockets sealed with cover tape.
User direction of feed
30/32 Doc ID 13374 Rev 6
VND5025BK-E Revision history
Table 17.
Document revision history
Date
28-Mar-2007
02-Jul-2009
23-Jul-2009
08-Feb-2010
22-Jul-2010
05-Aug-2010
Revision
1
2
3
4
5
6
Changes
Initial release
Updated Table 16: PowerSSO-24™ mechanical data
Updated Figure 32: PowerSSO-24™ package dimensions
.
Updated Table 16: PowerSSO-24™ mechanical data :
– Deleted G1 row
– Added O, Q, S, T and U rows
Updated I
LIMH
value from 41 A to 60 A
Updated Table 1: Device summary
.
Table 10: Current sense (8 V < V
:
– Updated K
2
values and test conditions.
Table 10: Current sense (8 V < V
:
– Updated K
1
minimum value at T j
= 25 °C to 150 °C
Obsolete Product(s) - Obsolete Product(s)
Doc ID 13374 Rev 6 31/32
VND5025BK-E
Please Read Carefully:
Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice.
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Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein.
No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such third party products or services or any intellectual property contained therein.
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OF ANY JURISDICTION), OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT.
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Resale of ST products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever, any liability of ST.
ST and the ST logo are trademarks or registered trademarks of ST in various countries.
Information in this document supersedes and replaces all information previously supplied.
Obsolete Product(s) - Obsolete Product(s)
The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners.
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32/32 Doc ID 13374 Rev 6
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