Quad-SPI memory interface (QUADSPI). STMicroelectronics STM32F479ZI, STM32F479VI, STM32F479BI, STM32F479II, STM32F479VG, STM32F479NG, STM32F479ZG, STM32F479AG, STM32F479NI, STM32F479AI

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Quad-SPI memory interface (QUADSPI). STMicroelectronics STM32F479ZI, STM32F479VI, STM32F479BI, STM32F479II, STM32F479VG, STM32F479NG, STM32F479ZG, STM32F479AG, STM32F479NI, STM32F479AI | Manualzz

STM32F479xx Functional overview

All STM32F479xx devices embed a Quad-SPI memory interface, which is a specialized communication interface targeting Single, Dual, Quad or Dual-flash SPI memories. It can work in direct mode through registers, external flash status register polling mode and memory mapped mode. Up to 256 Mbytes external Flash memory are mapped, supporting

8, 16 and 32-bit access. Code execution is supported.

The opcode and the frame format are fully programmable. Communication can be either in

Single Data Rate or Dual Data Rate.

The LCD-TFT display controller provides a 24-bit parallel digital RGB (Red, Green, Blue) and delivers all signals to interface directly to a broad range of LCD and TFT panels up to

XGA (1024x768) resolution with the following features:

 2 displays layers with dedicated FIFO (64x32-bit)

 Color Look-Up table (CLUT) up to 256 colors (256x24-bit) per layer

 Up to 8 Input color formats selectable per layer

 Flexible blending between two layers using alpha value (per pixel or constant)

 Flexible programmable parameters for each layer

 Color keying (transparency color)

 Up to 4 programmable interrupt events.

2.12 DSI Host (DSIHOST)

The DSI Host is a dedicated peripheral for interfacing with MIPI

DSI compliant displays. It includes a dedicated video interface internally connected to the LTDC and a generic APB interface that can be used to transmit information to the display.

These interfaces are as follows:

 LTDC interface:

– Used to transmit information in Video Mode, in which the transfers from the host processor to the peripheral take the form of a real-time pixel stream (DPI).

– Through a customized for mode, this interface can be used to transmit information in full bandwidth in the Adapted Command Mode (DBI).

 APB slave interface:

– Allows the transmission of generic information in Command mode, and follows a proprietary register interface.

– Can operate concurrently with either LTDC interface in either Video Mode or

Adapted Command Mode.

 Video mode pattern generator:

– Allows the transmission of horizontal/vertical color bar and D-PHY BER testing pattern without any kind of stimuli.

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Functional overview STM32F479xx

The DSI Host main features:

 Compliant with MIPI

Alliance standards

 Interface with MIPI

D-PHY

 Supports all commands defined in the MIPI

Alliance specification for DCS:

– Transmission of all Command mode packets through the APB interface

– Transmission of commands in low-power and high-speed during Video Mode

 Supports up to two D-PHY data lanes

 Bidirectional communication and escape mode support through data lane 0

 Supports non-continuous clock in D-PHY clock lane for additional power saving

 Supports Ultra Low-Power mode with PLL disabled

 ECC and Checksum capabilities

 Support for End of Transmission Packet (EoTp)

 Fault recovery schemes

 3D transmission support

 Configurable selection of system interfaces:

– AMBA APB for control and optional support for Generic and DCS commands

– Video Mode interface through LTDC

– Adapted Command Mode interface through LTDC

 Independently programmable Virtual Channel ID in

– Video Mode

– Adapted Command Mode

– APB Slave

Video Mode interfaces features

 LTDC interface color coding mappings into 24-bit interface:

– 16-bit RGB, configurations 1, 2, and 3

– 18-bit RGB, configurations 1 and 2

– 24-bit RGB

 Programmable polarity of all LTDC interface signals

 Maximum resolution is limited by available DSI physical link bandwidth:

– Number of lanes: 2

– Maximum speed per lane: 500 Mbps

Adapted interface features

 Support for sending large amounts of data through the memory_write_start (WMS) and memory_write_continue (WMC) DCS commands

 LTDC interface color coding mappings into 24-bit interface:

– 16-bit RGB, configurations 1, 2, and 3

– 18-bit RGB, configurations 1 and 2

– 24-bit RGB

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