A/D Channel Read Back Register. HP (Hewlett-Packard) NuDAQ PCI-9111HR, PCI-9111DG/HR

3.5 A/D Channel Read Back Register

The AD channel setting can be read back from this register.

Address: BASE + 6h

Attribute: read only

Data Format:

Bit 7 6 5 4 3 2 1 0

BASE+6h AS3 AS2 AS1 AS0 CN3 CN2 CN1 CN0

BASE+7h -- -- -- -- -- -- -- --

Where:

CNn: channel number

ASn: Auto scan channel number.

There are 8 bits in this register. Under non-auto scan mode, the 4 LSBs

(CN0~CN3) show the channel number setting and the 4 MSBs (AS3~AS0) is all ‘0’. Under auto-scan mode, the 4LSBs record the ending channel number. The 4 MSBs is the selected channel, and the value will increase automatically if any A/D trigger signal is inserted.

3.6 A/D Input Signal Range Control Register

The A/D range register is used to adjust the analog input ranges. This register directly controls the PGA (programmable gain amplifier). When a different gain value is set, the analog input range will be changed to the its corresponding value.

G2

0

0

0

0

1

Address: BASE + 8h

Attribute: write only

Data Format:

Bit

BASE+8h

BASE+9h

7

X

X

6

X

X

5

X

X

4

X

X

3

X

X

2

G2

X

1

G1

X

0

G0

X

The relationship between gain setting and its corresponding A/D range is listed in the table below.

G1

0

0

1

1

0

G0

0

1

0

1

0

GAIN

1

2

4

8

16

Analog Input Range

±

±

± 10V

± 5V

± 2.5V

1.25V

0.625V

Gain Code used in

Software Library

AD_B_10_V

AD_B_5_v

AD_B_2_5_V

AD_B_1_25_v

AD_B_0_625_V

16 • Registers Format