STM8S007C8 Product overview
4.12 TIM4 - 8-bit basic timer
• 8-bit autoreload, adjustable prescaler ratio to any power of 2 from 1 to 128
• Clock source: CPU clock
• Interrupt source: 1 x overflow/update
Table 3. TIM timer features
Timer
Counter size
(bits)
Prescaler
Counting mode
CAPCOM channels
Complem. outputs
Ext. trigger
Timer synchronization/ chaining
TIM1
TIM2
TIM3
TIM4
16
16
16
8
Any integer from 1 to 65536
Any power of 2 from 1 to 32768
Any power of 2 from 1 to 32768
Any power of 2 from 1 to 128
Up/down
Up
Up
Up
2
0
4
3
0
0
3
0
Yes
No
No
No
No
4.13 Analog-to-digital converter (ADC2)
STM8S007C8 value line products contain a 10-bit successive approximation A/D converter
(ADC2) with up to 10 multiplexed input channels and the following main features:
• Input voltage range: 0 to V
DDA
• Conversion time: 14 clock cycles
• Single and continuous modes
• External trigger input
• Trigger from TIM1 TRGO
• End of conversion (EOC) interrupt
The following communication interfaces are implemented:
• UART1: full feature UART, SPI master mode, SmartCard mode, IrDA mode, LIN2.1 master capability, single-wire mode
• UART3: full feature UART, LIN2.1 master/slave capability
• SPI: full and half-duplex, 10 Mbit/s
• I²C: up to 400 Kbit/s
DS8633 Rev 6
17/93
25
Product overview STM8S007C8
4.14.1 UART1
Main features
• 1 Mbit/s full duplex SCI
• SPI emulation
• High precision baud rate generator
• Smartcard emulation
• IrDA SIR encoder decoder
• LIN master mode
• Single wire half duplex mode
Asynchronous communication (UART mode)
• Full duplex communication - NRZ standard format (mark/space)
• Programmable transmit and receive baud rates up to 1 Mbit/s (f
CPU following any standard baud rate regardless of the input frequency
/16) and capable of
• Separate enable bits for transmitter and receiver
• Two receiver wakeup modes:
– Address bit (MSB)
– Idle line (interrupt)
• Transmission error detection with interrupt generation
• Parity control
Synchronous communication
• Full duplex synchronous transfers
• SPI master operation
• 8-bit data communication
• Maximum speed: 1 Mbit/s at 16 MHz (f
CPU
/16)
LIN master mode
• Emission: generates 13-bit synch. break frame
• Reception: detects 11-bit break frame
4.14.2 UART3
Main features
• 1 Mbit/s full duplex SCI
• LIN master capable
• High precision baud rate generator
18/93
DS8633 Rev 6
STM8S007C8 Product overview
Asynchronous communication (UART mode)
• Full duplex communication - NRZ standard format (mark/space)
• Programmable transmit and receive baud rates up to 1 Mbit/s (f
CPU following any standard baud rate regardless of the input frequency
/16) and capable of
• Separate enable bits for transmitter and receiver
• Two receiver wakeup modes:
– Address bit (MSB)
– Idle line (interrupt)
• Transmission error detection with interrupt generation
• Parity control
LIN master capability
• Emission: Generates 13-bit synch break frame
• Reception: Detects 11-bit break frame
LIN slave mode
• Autonomous header handling - one single interrupt per valid message header
• Automatic baud rate synchronization - maximum tolerated initial clock deviation ±15 %
• Synch delimiter checking
• 11-bit LIN synch break detection - break detection always active
• Parity check on the LIN identifier field
• LIN error management
• Hot plugging support
4.14.3 SPI
• Maximum speed: 10 Mbit/s (f
MASTER
/2) both for master and slave
• Full duplex synchronous transfers
• Simplex synchronous transfers on two lines with a possible bidirectional data line
• Master or slave operation - selectable by hardware or software
• CRC calculation
• 1 byte Tx and Rx buffer
• Slave/master selection input pin
DS8633 Rev 6
19/93
25
Product overview
4.14.4 I
2
C
• I 2 C master features
– Clock generation
– Start and stop generation
• I 2 C slave features
– Programmable I 2 C address detection
– Stop bit detection
• Generation and detection of 7-bit/10-bit addressing and general call
• Supports different communication speeds
– Standard speed (up to 100 kHz)
– Fast speed (up to 400 kHz)
STM8S007C8
20/93
DS8633 Rev 6
