- Computers & electronics
- Computer components
- System components
- Processors
- Intel
- AT80571RG0601ML
- Data Sheet
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Boxed Processor Specifications
7.4.2
Variable Speed Fan
If the boxed processor fan heatsink 4-pin connector is connected to a 3-pin motherboard header it will operate as follows:
The boxed processor fan will operate at different speeds over a short range of internal chassis temperatures. This allows the processor fan to operate at a lower speed and noise level, while internal chassis temperatures are low. If internal chassis temperature increases beyond a lower set point, the fan speed will rise linearly with the internal temperature until the higher set point is reached. At that point, the fan speed is at its maximum. As fan speed increases, so does fan noise levels. Systems should be designed to provide adequate air around the boxed processor fan heatsink that remains cooler then lower set point. These set points, represented in
Table 30 , can vary by a few degrees from fan heatsink
to fan heatsink. The internal chassis temperature should be kept below 38 ºC.
Meeting the processor's temperature specification (see
) is the responsibility of the system integrator.
The motherboard must supply a constant +12 V to the processor's power header to ensure proper operation of the variable speed fan for the boxed processor. Refer to
for the specific requirements.
Figure 26.
Boxed Processor Fan Heatsink Set Points
Higher Set Point
Highest Noise Level
Increasing Fan
Speed & Noise
Lower Set Point
Lowest Noise Level
X Y
Internal Chassis Temperature (Degrees C)
Z
Datasheet 97
Boxed Processor Specifications
Table 30.
Fan Heatsink Power and Signal Specifications
Boxed Processor
Fan Heatsink Set
Point (°C)
Boxed Processor Fan Speed
X ≤ 30
Y = 35
When the internal chassis temperature is below or equal to this set point, the fan operates at its lowest speed.
Recommended maximum internal chassis temperature for nominal operating environment.
When the internal chassis temperature is at this point, the fan operates between its lowest and highest speeds.
Recommended maximum internal chassis temperature for worst-case operating environment.
Z ≥ 38
When the internal chassis temperature is above or equal to this set point, the fan operates at its highest speed.
NOTES:
1. Set point variance is approximately ± 1 °C from fan heatsink to fan heatsink.
Notes
1
-
-
If the boxed processor fan heatsink 4-pin connector is connected to a 4-pin motherboard header and the motherboard is designed with a fan speed controller with
PWM output (CONTROL see
Table 29 ) and remote thermal diode measurement
capability the boxed processor will operate as follows:
As processor power has increased the required thermal solutions have generated increasingly more noise. Intel has added an option to the boxed processor that allows system integrators to have a quieter system in the most common usage.
The 4th wire PWM solution provides better control over chassis acoustics. This is achieved by more accurate measurement of processor die temperature through the processor's Digital Thermal Sensors (DTS) and PECI. Fan RPM is modulated through the use of an ASIC located on the motherboard that sends out a PWM control signal to the
4th pin of the connector labeled as CONTROL. The fan speed is based on actual processor temperature instead of internal ambient chassis temperatures.
If the new 4-pin active fan heat sink solution is connected to an older 3-pin baseboard processor fan header, it will default back to a thermistor controlled mode, allowing compatibility with existing 3-pin baseboard designs. Under thermistor controlled mode, the fan RPM is automatically varied based on the Tinlet temperature measured by a thermistor located at the fan inlet.
For more details on specific motherboard requirements for 4-wire based fan speed control, refer to the appropriate Thermal and Mechanical Design Guidelines (see
).
§
98 Datasheet
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Key Features
- IntelĀ® CeleronĀ® E3200 2.4 GHz
- 1 MB L2 LGA 775 (Socket T)
- Processor cores: 2 45 nm 64-bit 65 W
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Table of contents
- 9 Introduction
- 9 Terminology
- 10 Processor Terminology Definitions
- 11 References
- 13 Electrical Specifications
- 13 Power and Ground Lands
- 13 Decoupling Guidelines
- 13 VCC Decoupling
- 13 VTT Decoupling
- 14 FSB Decoupling
- 14 Voltage Identification
- 16 Reserved, Unused, and TESTHI Signals
- 16 Power Segment Identifier (PSID)
- 17 Voltage and Current Specification
- 17 Absolute Maximum and Minimum Ratings
- 18 DC Voltage and Current Specification
- 20 VCC Overshoot
- 21 Die Voltage Validation
- 21 Signaling Specifications
- 22 FSB Signal Groups
- 23 CMOS and Open Drain Signals
- 24 Processor DC Specifications
- 25 Platform Environment Control Interface (PECI) DC Specifications
- 26 GTL+ Front Side Bus Specifications
- 27 Clock Specifications
- 27 Front Side Bus Clock (BCLK[1:0]) and Processor Clocking
- 28 FSB Frequency Select Signals (BSEL[2:0])
- 29 Phase Lock Loop (PLL) and Filter
- 29 BCLK[1:0] Specifications
- 33 Package Mechanical Specifications
- 33 Package Mechanical Drawing
- 37 Processor Component Keep-Out Zones
- 37 Package Loading Specifications
- 37 Package Handling Guidelines
- 38 Package Insertion Specifications
- 38 Processor Mass Specification
- 38 Processor Materials
- 38 Processor Markings
- 39 Processor Land Coordinates
- 41 Land Listing and Signal Descriptions
- 41 Processor Land Assignments
- 64 Alphabetical Signals Reference
- 75 Thermal Specifications and Design Considerations
- 75 Processor Thermal Specifications
- 75 Thermal Specifications
- 78 Thermal Metrology
- 78 Processor Thermal Features
- 78 Thermal Monitor
- 80 On-Demand Mode
- 81 PROCHOT# Signal
- 81 THERMTRIP# Signal
- 82 Platform Environment Control Interface (PECI)
- 82 Introduction
- 82 TCONTROL and TCC activation on PECI-Based Systems
- 83 PECI Specifications
- 83 PECI Device Address
- 83 PECI Command Support
- 83 PECI Fault Handling Requirements
- 83 PECI GetTemp0() Error Code Support
- 85 Features
- 85 Power-On Configuration Options
- 85 Clock Control and Low Power States
- 86 Normal State
- 86 HALT and Extended HALT Powerdown States
- 86 HALT Powerdown State
- 87 Extended HALT Powerdown State
- 87 Stop Grant and Extended Stop Grant States
- 87 Stop-Grant State
- 88 Extended Stop Grant State
- 88 Stop Grant Snoop State, and Stop Grant Snoop State
- 88 HALT Snoop State, Stop Grant Snoop State
- 88 Extended HALT Snoop State, Extended Stop Grant Snoop State
- 88 Sleep State
- 89 Deep Sleep State
- 89 Deeper Sleep State
- 90 Technology
- 90 Processor Power Status Indicator (PSI) Signal
- 91 Boxed Processor Specifications
- 91 Introduction
- 92 Mechanical Specifications
- 92 Boxed Processor Cooling Solution Dimensions
- 93 Boxed Processor Fan Heatsink Weight
- 93 Boxed Processor Retention Mechanism and Heatsink Attach Clip Assembly
- 93 Electrical Requirements
- 93 Fan Heatsink Power Supply
- 95 Thermal Specifications
- 95 Boxed Processor Cooling Requirements
- 97 Variable Speed Fan
- 99 Debug Tools Specifications
- 99 Logic Analyzer Interface (LAI)
- 99 Mechanical Considerations
- 99 Electrical Considerations