STMicroelectronics VN5E010AH Datasheet
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VN5E010AH
10 m
high-side driver with analog current sense for automotive applications
Features
Max supply voltage
Operating voltage range
Typ. ON-state resistance
Current limitation (typ)
OFF-state supply current
V
CC
V
CC
R
ON
I
LIMH
I
S
1. Typical value with all loads connected
41 V
4.5 V to 28 V
10 m
85 A
2 µA
(1)
• General
– Inrush current active management by power limitation
– Very low standby current
– 3 V CMOS compatible inputs
– Optimized electromagnetic emissions
– Very low electromagnetic susceptibility
– In compliance with the 2002/95/EC european directive
– Very low current sense leakage
• Diagnostic functions
– Proportional load current sense
– High current sense precision for wide current range
– Current sense disable
– OFF-state open-load detection
– Output short to V
CC
detection
– Overload and short to ground (power limitation) indication
– Thermal shutdown indication
• Protection
– Undervoltage shutdown
– Overvoltage clamp
– Load current limitation
– Self limiting of fast thermal transients
– Protection against loss of ground and loss of V
CC
– Overtemperature shut down with autorestart (thermal shutdown)
September 2013 Doc ID 15984 Rev 3
– Reverse battery protection with self switch on of the Power MOSFET
– Electrostatic discharge protection
Applications
• All types of resistive, inductive and capacitive loads
• Suitable as LED driver
Description
The VN5E010AH is a single-channel high-side driver manufactured in the ST proprietary
VIPower M0-5 technology and housed in the tiny
HPAK package. The VN5E010AH is designed to drive 12 V automotive grounded loads delivering protection, diagnostics and easy 3 V and 5 V
CMOS compatible interface with any microcontroller.
The device integrates advanced protective functions such as load current limitation, inrush and overload active management by power limitation, overtemperature shut-off with autorestart and overvoltage active clamp. A dedicated analog current sense pin is associated with every output channel in order to provide ehnanced diagnostic functions including fast detection of overload and short-circuit to ground through power limitation indication, overtemperature indication, short-circuit to Vcc diagnosis and
ON- and OFF-state open-load detection.
The current sensing and diagnostic feedback of the whole device can be disabled by pulling the
CS_DIS pin high to allow sharing of the external sense resistor with other similar devices .
1/37 www.st.com
1
Contents
Contents
VN5E010AH
Block diagram and pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Current sense and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Short to VCC and OFF-state open-load detection . . . . . . . . . . . . . . . . . 26
Maximum demagnetization energy (VCC = 13.5 V) . . . . . . . . . . . . . . . . . 27
Package and PC board thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
HPAK suggested land pattern . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
2/37 Doc ID 15984 Rev 3
VN5E010AH
List of tables
List of tables
< 18 V). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Doc ID 15984 Rev 3 3/37
List of figures
List of figures
VN5E010AH
Delay response time between rising edge of ouput current and rising edge of current sense
OUT
/I
SENSE
vs. I
OUT
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Maximum current sense ratio drift vs. load current
(1)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
J
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
evolution in overload or short to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Maximum turn-off current versus inductance
(1)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
(1)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Thermal fitting model of a single-channel HSD in HPAK
. . . . . . . . . . . . . . . . . . . . . . . . 29
suggested pad layout
(1)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
tape and reel (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
4/37 Doc ID 15984 Rev 3
VN5E010AH
1
Block diagram and pin configuration
Block diagram and pin configuration
Figure 1.
Block diagram
V
CC
Signal Clamp
Undervoltage
Reverse
Battery
Protection
IN
CS_
DIS
CS
LOGIC
Control & Diagnostic
Power
Clamp
DRIVER
V
ON
Limitation
Over temp.
Current
Limitation
OFF State
Open load
V
SENSEH
Current
Sense
OVERLOAD PROTECTION
(ACTIVE POWER LIMITATION)
OUT
GND
Table 1.
Name
Pin functions
Function
V
CC
OUT
Battery connection
Power output
(1)
GND
IN
Ground connection
Voltage controlled input pin with hysteresis, CMOS compatible. Controls output switch state
Analog CS pin, delivers a current proportional to the load current CS
CS_DIS Active high CMOS compatible pin, to disable the CS pin
1. Pins 1 and 7 must be externally tied together.
Doc ID 15984 Rev 3 5/37
Block diagram and pin configuration
Figure 2.
Configuration diagram (top view) not in scale
VN5E010AH
1 2 3 4 5 6 7
OUT GND IN Vcc CS CS_DIS OUT
Table 2.
Suggested connections for unused and not connected pins
Connection / pin CS OUT IN
Floating
To ground
Not allowed
Through 1 k resistor
X
Through 22 k resistor
X
Through 10 k resistor
CS_DIS
X
Through 10 k resistor
6/37 Doc ID 15984 Rev 3
VN5E010AH Electrical specifications
Figure 3.
Current and voltage conventions
V
CSD
V
I
CSD
CS_DIS
I
IN
IN
IN
V
CC
OUT
GND
I
GND
CS
I
SENSE
V
SENSE
I
S
I
OUT
V
OUT
V
CC
2.1 Absolute maximum ratings
Stressing the device above the rating listed in the
Table 3: Absolute maximum ratings may
cause permanent damage to the device . These are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE program and other relevant quality document.
Table 3.
Symbol
V
CC
-V
CC
I
OUT
-I
OUT
I
IN
I
CSD
Absolute maximum ratings
Parameter
DC supply voltage
Reverse DC supply voltage
DC output current
Reverse DC output current
DC input current
DC current sense disable input current
V
CSENSE
Current sense maximum voltage (V
CC
> 0)
E
MAX
Maximum switching energy (single pulse)
I
(L = 2.2 mH; R
L
OUT
= I limL
= 0 ; V
(Typ.) )
BAT
= 13.5 V; T jstart
= 150 °C;
Value Unit
41
16
Internally limited A
20 A
V
V
-1 to 10
-1 to 10
V
CC
- 41
+V
CC mA mA
V
V
645 mJ
Doc ID 15984 Rev 3 7/37
Electrical specifications
Table 3.
Symbol
V
ESD
V
ESD
T j
T stg
Absolute maximum ratings (continued)
Parameter
Electrostatic discharge
(human body model: R = 1.5 k C = 100 pF)
– IN
– CS
– CS_DIS
– OUT
– V
CC
Charge device model (CDM-AEC-Q100-011)
Junction operating temperature
Storage temperature
Table 4.
Symbol
R thj-case
R thj-amb
Thermal data
Parameter
Thermal resistance junction-case
Thermal resistance junction-ambient
VN5E010AH
Value Unit
4000
2000
4000
5000
5000
750
-40 to 150
-55 to 150
°C
°C
V
V
V
V
V
V
Max. value
0.55
67.7
Unit
°C/W
°C/W
8/37 Doc ID 15984 Rev 3
VN5E010AH Electrical specifications
Values specified in this section are for 8 V < V
CC otherwise specified.
< 28 V, -40 °C < T j
< 150 °C, unless
Table 5.
Symbol
Power section
Parameter Test conditions
V
CC
V
USD
Operating supply voltage
Undervoltage shutdown
V
USDhyst
Undervoltage shutdown hysteresis
R
ON-Rev
V clamp
R
DSON in reverse battery condition
Clamp voltage
I
R
I
ON
S
L(off)
ON-state resistance
Supply current
OFF-state output current
I
OUT
= 6 A; T j
= 25 °C
I
OUT
= 6 A; T j
= 150 °C
I
OUT
= 6 A; V
CC
= 5 V; T j
= 25 °C
V
CC
T j
= -13 V; I
= 25 °C
OUT
= -6 A;
I
CC
= 20 mA; I
OUT
= 0 A
OFF-state: V
CC
= 13 V; T j
= 25 °C;
V
IN
= V
OUT
= V
SENSE
= 0 V
ON-state: V
CC
= 13 V; V
IN
= 5 V;
I
OUT
= 0 A
V
IN
= V
OUT
= 0 V; V
CC
= 13 V;
T j
= 25 °C
V
IN
= V
OUT
= 0 V; V
CC
= 13 V;
T j
= 125 °C
Min. Typ. Max.
Unit
4.5
13 28
3.5
4.5
41
0
0.5
10
10
46
1.5
0 0.01
20
13
52
5
V
V
V m m
V
2 5 µA
3
3 mA
µA
Table 6.
Symbol t d(on)
Switching (V
CC
= 13 V, T j
= 25 °C)
Turn-on delay time t d(off)
Turn-off delay time
(dV
OUT
/dt) on
Turn-on voltage slope
(dV
OUT
/dt) off
Turn-off voltage slope
W
W
ON
OFF
Switching energy losses at turn-on
(t won
)
Switching energy losses at turn-off
(t woff
)
Min.
R
L
= 2.2
(see
R
L
= 2.2
(see
R
L
= 2.2 -
-
-
R
L
= 2.2 -
R
L
= 2.2
(see
R
L
= 2.2
(see
-
-
Typ.
40
28
)
)
2
0.6
Max.
Unit
-
-
-
-
-
µs
µs
V µs
V µs mJ mJ
Doc ID 15984 Rev 3 9/37
Electrical specifications VN5E010AH
Table 7.
Symbol
V
IL
I
IL
V
IH
I
IH
V
I(hyst)
Logic inputs
Parameter
Low-level input voltage
Low-level input current
High-level input voltage
High-level input current
Input hysteresis voltage
V
ICL
Input clamp voltage
V
CSDL
I
CSDL
V
CSDH
I
CSDH
V
CSD(hyst)
Low-level CS_DIS voltage
Low-level CS_DIS current
High-level CS_DIS voltage
High-level CS_DIS current
CS_DIS hysteresis voltage
V
CSCL
CS_DIS clamp voltage
Test conditions
V
IN
= 0.9 V
V
IN
= 2.1 V
I
IN
= 1 mA
I
IN
= -1 mA
V
CSD
= 0.9 V
V
CSD
= 2.1 V
Min.
Typ.
Max.
Unit
1
2.1
0.25
5.5
0.9
10
7
V
µA
V
µA
V
V
-0.7
1
2.1
0.25
5.5
0.9
10
7
V
µA
V
µA
V
V
-0.7
I
CSD
= 1 mA
I
CSD
= -1 mA
Table 8.
Symbol
Protection and diagnostics (1)
Parameter Test conditions Min.
Typ.
Max.
Unit
I limH
Short-circuit current
I limL
Short-circuit current during thermal cycling
T
TSD
T
R
T
RS
Shutdown temperature
Reset temperature
Thermal reset of status
T
HYST
V
DEMAG
Thermal hysteresis
(T
TSD
- T
R
)
Turn-off output voltage clamp
V
CC
= 13 V
5 V < V
CC
< 28 V
T
V
CC
R
< T
=13 V; j
< T
TSD
60
150 175
T
RS
+ 1 T
RS
+ 5
135
85
21
7
120
120
200
A
A
°C
I
OUT
= 2 A; V
IN
= 0;
L = 6 mH
V
CC
- 41 V
CC
- 46 V
CC
- 52 V
V
ON
Output voltage drop limitation T j
I
OUT
= 0.5 A;
= -40 °C to 150 °C
25
1. To ensure long term reliability under heavy overload or short-circuit conditions, protection and related diagnostic signals must be used together with a proper software strategy. If the device is subjected to abnormal conditions, this software must limit the duration and number of activation cycles mV
°C
°C
°C
10/37 Doc ID 15984 Rev 3
VN5E010AH Electrical specifications
Table 9.
Symbol
Current sense (8 V < V
CC
< 18 V)
Parameter Test conditions dK dK dK
1
2
3
/K
/K
/K
1
(1)
2
(1)
3
(1)
V
SENSEH
(2)
I
I
V
I
K
K
K
K
0
1
2
3
SENSE0
OL
SENSE
SENSEH
(2)
I
I
I
I
OUT
OUT
OUT
OUT
/I
/I
/I
/I
SENSE
SENSE
Current sense ratio drift
SENSE
Current sense ratio drift
SENSE
Current sense ratio drift
Analog sense leakage current
I
OUT
= 0.25 A; V
SENSE
= 0.5 V
T j
= -40 °C to 150 °C
T j
= 25 °C to 150 °C
I
OUT
= 6 A; V
SENSE
= 0.5 V
T j
= -40 °C to 150 °C
T j
= 25 °C to 150 °C
I
OUT
= 6 A; V
SENSE
= 0.5 V;
V
CSD
=0V;
T j
= -40 °C to 150 °C
I
OUT
= 10 A; V
SENSE
= 4 V
T j
= -40 °C to 150 °C
T j
= 25 °C to 150 °C
I
OUT
= 10 A; V
SENSE
= 4 V;
V
CSD
= 0 V;
T j
= -40 °C to 150 °C
I
OUT
= 25 A; V
SENSE
= 4 V
T j
= -40 °C to 150 °C
T j
= 25 °C to 150 °C
I
OUT
= 25 A; V
SENSE
= 4 V;
V
CSD
= 0 V;
T j
= -40 °C to 150 °C
I
OUT
= 0 A; V
SENSE
= 0 V;
V
CSD
= 5 V; V
IN
=0 V;
T j
= -40 °C to 150 °C
I
OUT
= 0 A; V
SENSE
= 0 V;
V
CSD
= 0 V; V
IN
= 5 V;
T j
= -40 °C to 150 °C
I
OUT
= 2 A; V
SENSE
= 0 V;
V
CSD
= 5 V; V
IN
= 5 V;
T j
= -40 °C to 150 °C
Open load ON-state current detection threshold
Max analog sense output voltage
I
I
V
IN
= 5 V, 8 V < V
SENSE
OUT
= 5 µA
= 18 A; R
CC
SENSE
< 18 V
= 3.9 k
Analog sense output voltage in fault condition
V
CC
= 13 V; R
SENSE
= 3.9 k
Analog sense output current in fault condition
V
CC
= 13 V; V
SENSE
= 5 V
Min.
Typ.
Max.
Unit
3000
3000
7410
7410
12000
11600
5350
5510
6740
6740
8500
7745
-15
5850
5800
6570
6570
7690
7195
-11
5915
5850
6420
6420
7000
6755
-8
0
0
5
5
8
9
15
11
8
1
2
1
80
%
%
%
µA mA
V
V mA
Doc ID 15984 Rev 3 11/37
Electrical specifications VN5E010AH
Table 9.
Symbol
Current sense (8 V < V
CC
< 18 V) (continued)
Parameter Test conditions Min.
Typ.
Max.
Unit t t
DSENSE1H
DSENSE1L
Delay response time from falling edge of
CS_DIS pin
Delay response time from rising edge of
CS_DIS pin
V
SENSE
< 4 V,
1.5 A < I
OUT
< 25 A
I
SENSE
= 90% of I
SENSE max
(see
)
V
SENSE
< 4 V,
1.5 A < I
OUT
< 25 A
I
SENSE
=10% of I
SENSE max
(see
) t
DSENSE2H
Delay response time from rising edge of
IN pin
V
SENSE
< 4 V,
1.5 A < I
OUT
< 25 A
I
SENSE
=90% of I
SENSE max
(see
)
t
DSENSE2H t
DSENSE2L
Delay response time between rising edge of output current and rising edge of current sense
Delay response time from falling edge of
IN pin
V
SENSE
< 4V,
I
SENSE
= 90% of I
SENSEMAX,
I
OUT
= 90% of I
OUTMAX
I
OUTMAX
V
SENSE
< 4 V,
1.5 A < I
OUT
< 25 A
I
SENSE
=10% of I
SENSE max
(see
)
50
5
270
100
1. Parameter guaranteed by design, it is not tested.
2. Fault condition includes: power limitation, over-temperature and open load OFF-state detection.
100
20
600
310
250
µs
µs
µs
µs
µs
Table 10.
Open load detection (8 V < V
CC
< 18 V)
Symbol Parameter Test conditions
V
OL t
DSTKON
Open-load OFF-state voltage detection threshold
Output short-circuit to
V
CC
detection delay at turn-off
I
I
L(off2)r
L(off2)f t d_vol
OFF-state output current at V
OUT
= 4 V
OFF-state output current at V
OUT
= 2 V
Delay response from output rising edge to
V
SENSE rising edge in open-load
V
IN
= 0 V
See
V
IN
= 0 V; V
SENSE
= 0 V
V
OUT rising from 0 V to 4 V
V
IN
= 0 V; V
SENSE
= V
SENSEH
;
V
OUT falling from V
CC
to 2 V
V
OUT
= 4 V; V
IN
= 0 V
V
SENSE
= 90% of V
SENSEH
Min.
2
180
-120
-50
Typ.
See
Max.
Unit
4
1200 µs
90
90
20
V
µA
µA
µs
12/37 Doc ID 15984 Rev 3
VN5E010AH
Figure 4.
Current sense delay characteristics
Electrical specifications
INPUT
CS_DIS
LOAD CURRENT
CURRENT SENSE t
DSENSE2H t
DSENSE1L t
DSENSE1H t
DSENSE2L
Figure 5.
Open-load OFF-state delay timing
OUTPUT STUCK TO V
CC
V
IN
V
OUT
> V
OL
V
SENSEH
V
CS t
DSTKON
Figure 6.
Switching characteristics
V
OUT t
Won
80% dV
OUT
/dt
(on) t r
10%
INPUT t d(on) t d(off) t
Woff
90% t f dV
OUT
/dt
(off) t t
Doc ID 15984 Rev 3 13/37
Electrical specifications VN5E010AH
Figure 7.
Delay response time between rising edge of ouput current and rising edge of current sense (CS enabled)
V
IN
t
DSENSE2H t
I
OUT
90% I
OUTMAX
I
OUTMAX t
I
SENSE I
SENSEMAX
90% I
SENSEMAX t
Figure 8.
Output voltage drop limitation
V cc
-V out
T j
=150 o
C
T j
=25 o C
T j
=-40 o
C
V on
I out
V on
/R on(T)
14/37 Doc ID 15984 Rev 3
VN5E010AH Electrical specifications
Figure 9.
I
OUT
/I
SENSE
vs. I
OUT
I
OUT
/I
SENSE
12800
11600
10400
9200
8000
6800
5600
4400
3200
2000
-2 1
B
C
E
A
4
D
7 10 13
I
OUT
(A)
16 19 22 25 28
A : Max, T j
B : Max, T j
= -40 °C to 150 °C
= 25 °C to 150 °C
C : Typical, T j
= -40 °C to 150 °C
D : Min, T j
E : Min, T j
= 25 °C to 150 °C
= -40 °C to 150 °C
Figure 10. Maximum current sense ratio drift vs. load current
(1) dK/K (%)
20
15
10
5
0
-5
-10
-15
-20
4 7 10
A
B
13 16
I
OUT
(A)
19 22 25 28
A : Max, T j
= -40 °C to 150 °C
1. Parameter guaranteed by design; it is not tested.
B : Min, T j
= -40 °C to 150 °C
Doc ID 15984 Rev 3 15/37
Electrical specifications VN5E010AH
Table 11.
Truth table
Conditions
Normal operation
Overtemperature
Undervoltage
Overload
Input
L
H
L
H
L
H
H
H
Output
L
L
L
H
L
L
X
(no power limitation)
Cycling
(power limitation)
L
L
SENSE (V
CSD
= 0 V)
(1)
0
Nominal
0
V
SENSEH
0
0
Nominal
V
SENSEH
Short-circuit to GND
(power limitation)
Open load OFF-state
(with external pull-up)
Short-circuit to V
CC
(external pull-up disconnected)
Negative output voltage clamp
L
H
L
L
H
L
H
H
H
L
V
V
V
0
SENSEH
SENSEH
SENSEH
< Nominal
0
1. If the V
CSD
is high, the SENSE output is at a high-impedance, its potential depends on leakage currents and external circuit.
16/37 Doc ID 15984 Rev 3
VN5E010AH Electrical specifications
Table 12.
Electrical transient requirements (part 1)
ISO 7637-2:
2004(E)
Test pulse
III
Test levels
(1)
IV
Number of pulses or test times
Burst cycle/pulse repetition time
Min.
Max.
1
2a
3a
3b
4
5b (2)
-75 V
+37 V
-100 V
+75 V
-6 V
+65 V
-100 V
+50 V
-150 V
+100 V
-7 V
+87 V
5000 pulses
5000 pulses
1h
1h
1 pulse
1 pulse
0.5 s
0.2 s
90 ms
90 ms
5 s
5 s
100 ms
100 ms
1. The above test levels must be considered referred to V
CC
= 13.5 V except for pulse 5b.
2. Valid in case of external load dump clamp: 40 V maximum referred to ground.
Delays and
Impedance
2 ms, 10
50 µs, 2
0.1 µs, 50
0.1 µs, 50
100 ms, 0.01
400 ms, 2
Table 13.
Electrical transient requirements (part 2)
ISO 7637-2:
2004(E)
Test pulse III
Test level results
1
2a
3a
3b
4
5b
(1)
C
C
C
C
C
C
1. Valid in case of external load dump clamp: 40V maximum referred to ground.
IV
C
C
C
C
C
C
Table 14.
Electrical transient requirements (part 3)
Class Contents
C
E
All functions of the device are performed as designed after exposure to disturbance.
One or more functions of the device are not performed as designed after exposure to disturbance and cannot be returned to proper operation without replacing the device.
Doc ID 15984 Rev 3 17/37
Electrical specifications
2.4 Waveforms
Figure 11. Normal operation
I I
18/37
Figure 12. Overload or short to GND
I I
I I
I I
Doc ID 15984 Rev 3
VN5E010AH
VN5E010AH
Figure 13. Intermittent overload
I I
I I
I I
Electrical specifications
Figure 14. OFF-state open-load with external circuitry
I I t t
Doc ID 15984 Rev 3 19/37
Electrical specifications
Figure 15. Short to V
CC
Resistive
Short to V
Hard
Short to V
VN5E010AH
I I t t
Figure 16. T
J
evolution in overload or short to GND t t
20/37
I I
I I
Doc ID 15984 Rev 3
VN5E010AH Electrical specifications
Figure 17. OFF-state output current
Iloff [nA]
6000
5000
4000
3000
2000
1000
0
-50 -25 0 25 50 75
Tc [°C]
100 125 150 175
Figure 18. High-level input current
3
2.5
2
1.5
Iih [uA]
5
4.5
4
3.5
1
0.5
0
-50 -25
Vin= 2.1V
0 25 50
Tc [°C]
75 100 125 150 175
Figure 19. Input clamp voltage
6.2
6
5.8
5.6
Vicl [V]
7
6.8
6.6
6.4
5.4
5.2
5
-50
Iin= 1mA
-25 0 25 50 75
Tc [°C]
100 125 150 175
Figure 21. High-level input voltage
2
1.5
1
0.5
0
-50
Vih [V]
4
3.5
3
2.5
-25 0 25 50 75
Tc [°C]
100 125 150 175
Figure 20. Low-level input voltage
1.2
1
0.8
0.6
Vil [V]
2
1.8
1.6
1.4
0.4
0.2
0
-50 -25 0 25 50 75
Tc [°C]
100 125 150 175
Figure 22. Input hysteresis voltage
Vihyst [V]
1
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
-50 -25 0 25 50 75
Tc [°C]
100 125 150 175
Doc ID 15984 Rev 3 21/37
Electrical specifications VN5E010AH
Figure 23. ON-state resistance vs. T case
Ron [m Ohm ]
80
70
60
50
40
30
20
10
0
-50 -25
Iout= 6A
Vcc= 13V
0 25 50 75
Tc [°C]
100 125 150 175
Figure 24. ON-state resistance vs. V
CC
Ron [m Ohm ]
30
25
20
15
10
5
0
0 5 10 15 20
Vcc [V]
25 30
Tc= 150°C
Tc= 125°C
Tc= 25°C
Tc= -40°C
35 40
Figure 25. Undervoltage shutdown
Vusd [V]
16
14
12
10
8
6
4
2
0
-50 -25 0 25 50 75
Tc [°C]
100 125 150 175
Figure 26. Turn-on voltage slope
(dVout/dt)On [V/m s]
1000
900
800
700
600
500
400
300
200
100
0
-50 -25 0
Vcc= 13V
Rl= 13 Ω
25 50 75
Tc [°C]
100 125 150 175
Figure 27. I
LIMH
Vs. T case
Ilim h [A]
100
Vcc= 13V 90
80
70
60
50
40
-50 -25 0 25 50 75
Tc [°C]
100 125 150 175
Figure 28. Turn-off voltage slope
(dVout/dt)Off [V/m s]
1000
900
800
700
600
500
400
300
200
100
0
-50 -25 0 25
Vcc= 13V
Rl= 13 Ω
50 75
Tc [°C]
100 125 150 175
22/37 Doc ID 15984 Rev 3
VN5E010AH Electrical specifications
Figure 29. High-level CS_DIS voltage
Vcsdh [V]
4
3.5
3
2.5
2
1.5
1
0.5
0
-50 -25 0 25 50 75
Tc [°C]
100 125 150 175
Figure 30. CS_DIS clamp voltage
Vcsdcl [V]
10
9
8
7
6
5
4
3
2
1
0
-50 -25 0 25
Iin= 1m A
50 75
Tc [°C]
100 125 150 175
Figure 31. Low-level CS_DIS voltage
Vcsdl [V]
4
3.5
3
2.5
2
1.5
1
0.5
0
-50 -25 0 25 50 75
Tc [°C]
100 125 150 175
Doc ID 15984 Rev 3 23/37
Application information
Figure 32. Application schematic
+5V
R prot CS_DIS
MCU R prot
IN
R prot
C ext
R
SENSE
CS
45V
GND
V
CC
20V
OUT
VN5E010AH
D ld
3.2
24/37
D ld
is necessary (voltage transient suppressor) if the load dump peak voltage exceeds the
V
CC
max DC rating. The same applies if the device is subject to transients on the V
CC that are greater than the ones shown in the ISO 7637-2 2004 (E) table.
line
MCU I/Os protection
When negative transients are present on the V
CC
line, the control pins is pulled negative to approximatly -1.5 V. ST suggests to insert a resistor (R prot microcontroller I/Os pins to latch-up.
) in line to prevent the
The value of these resistors is a compromise between the leakage current of microcontroller and the current required by the HSD I/Os (input levels compatibility) with the latch-up limit of microcontroller I/Os.
Equation 1
-V
CCpeak
/ I latchup
R prot
(V
OH C
- V
IH
) / I
IHmax
Calculation example:
For V
CCpeak
= - 1.5 V; I latchup
20 mA; V
OH C
4.5 V
75 R prot
240 k .
Recommended values: R prot
=10 k C
EXT
=10 nF .
Doc ID 15984 Rev 3
VN5E010AH
3.3
Application information
Current sense and diagnostic
The current sense pin performs a double function (see Figure 33: Current sense and diagnostic
):
?
?
Current mirror of the load current in normal operation, delivering a current proportional to the load one according to a know ratio K
X
.
The current I
SENSE external resistor R
can be easily converted to a voltage V
SENSE
SENSE
. Linearity between I minimum (see parameter V
SENSE
OUT
and V
SENSE
by means of an
is ensured up to 5 V
in Table 9: Current sense (8 V < V
). The current sense accuracy depends on the output current (refer to current sense electrical characteristics
Table 9: Current sense (8 V < V
).
Diagnostic flag in fault conditions , delivering a fixed voltage V
SENSEH maximum current I
SENSEH
):
up to a
in case of the following fault conditions (refer to
– Power limitation activation
– Overtemperature
– Short to V
CC
in OFF-state
– Open load in OFF-state with additional external components.
A logic level high on CS_DIS pin sets at the same time all the current sense pins of the device in a high-impedance state, thus disabling the current monitoring and diagnostic detection. This feature allows multiplexing of the microcontroller analog inputs by sharing of sense resistance and ADC line among different devices.
Figure 33. Current sense and diagnostic
V
PU V
BAT
I
OUT
/K
X
41V
I
SENSEH
CS_DIS
R
PROT
To uC ADC
R
SENSE
CURRENT
SENSEn
V
SENSEH
V
SENSE
V
CC
Main MOSn
PU_CMD
Overtemperature
OL OFF
Pwr_Lim
INPUTn
+
-
R
PU
V
OL
OUTn
I
Loff2r
I
Loff2f
GND
R
PD
Load
Doc ID 15984 Rev 3 25/37
Application information VN5E010AH
3.3.1 Short
CC
and OFF-state open-load detection
Short to V
CC
A short-circuit between V
CC
V
SENSEH and output is indicated by the relevant current sense pin set to
during the device OFF-state. Small or no current is delivered by the current sense during the ON-state depending on the nature of the short-circuit.
OFF-state open-load with external circuitry
Detection of an open load in off mode requires an external pull-up resistor R
PU the output to a positive supply voltage V
PU
.
connecting
It is preferable V
PU
to be switched off during the module standby mode in order to avoid the overall standby current consumption to increase in normal conditions, i.e. when load is connected.
An external pull-down resistor R
PD
connected between output and GND is mandatory to avoid misdetection in case of floating outputs in OFF-state (see
Figure 33: Current sense and diagnostic ).
R
PD
must be selected in order to ensure V circuitry:
OUT
< V
OLmin
unless pulled-up by the external
Equation 2
V
OUT
Pull up _ OFF
R
PD
I
L ( off 2 ) f
V
OL min
2 V
R
PD
22 k is recommended.
For proper open load detection in OFF-state, the external pull-up resistor must be selected according to the following formula:
Equation 3
V
OUT
Pull up _ ON
R
PD
V
PU
R
PU
R
PU
R
PD
R
PD
I
L ( off 2 ) r
V
OL max
4 V
For the values of V
OLmin
).
,V
OLmax
, I
L(off2)r and I
L(off2)f
(see Table 10: Open load detection (8 V
26/37 Doc ID 15984 Rev 3
VN5E010AH
3.4
Application information
Maximum demagnetization energy (V
CC
= 13.5 V)
Figure 34. Maximum turn-off current versus inductance
100
B
A
C
10
1
0,1 1
A : T jstart
= 150 °C (single pulse)
B : T jstart
C : T jstart
= 100 °C (repetitive pulse)
= 125 °C (repetitive pulse)
V
IN
, I
L
L (mH)
Demagnetization
10
Demagnetization
100
Demagnetization
1. Values are generated with R
L
= 0
In case of repetitive pulses, T jstart
(at beginning of each demagnetization) of every pulse must not exceed the temperature specified above for curves A and B.
t
Doc ID 15984 Rev 3 27/37
Package and PC board thermal data
4 Package and PC board thermal data
4.1 HPAK thermal data
Figure 35. PC board
VN5E010AH
28/37
1. Layout condition of Rth and Zth measurements (PCB FR4 area = 58 mm x 58 mm,
PCB thickness =1.8 mm, Cu thickness = 70 µm, Copper areas: from minimum pad lay-out to 8 cm 2 ).
Figure 36. R thj-amb
vs. PCB copper area in open box free air condition
RTHj_amb(°C/W)
70
65
60
55
50
45
40
35
30
0 2 4 6
PCB Cu heatsink area (cm^2)
8 10
Doc ID 15984 Rev 3
VN5E010AH Package and PC board thermal data
Figure 37. HPAK thermal impedance junction ambient single pulse
ZTH (°C/W)
100
Cu=8 cm2
Cu=2 cm2
Cu=foot print
10
1
0.1
0.001
0.01
0.1
1
Time (s)
10 100
Figure 38. Thermal fitting model of a single-channel HSD in HPAK (1)
1000
1. The fitting model is a simplified thermal tool and is valid for transient evolutions where the embedded protections (power limitation or thermal cycling during thermal shutdown) are not triggered.
Doc ID 15984 Rev 3 29/37
Package and PC board thermal data
Equation 4: pulse calculation formula where = t
P
/T
Table 15.
Thermal parameter
Area/island (cm
2
)
R1 (°C/W)
R2 (°C/W)
R3 (°C/W)
R4 (°C/W)
R5 (°C/W)
R6 (°C/W)
C1 (W.s/°C)
C2 (W.s/°C)
C3 (W.s/°C)
C4 (W.s/°C)
C5 (W.s/°C)
C6 (W.s/°C)
Z
TH
= R
TH
+ Z
THtp
1 –
Footprint
0.01
0.15
0.5
8
0.1
0.4
0.8
3
28
31
0.005
0.05
4
22
25
1.4
6
VN5E010AH
8
3
9
12
16
30/37 Doc ID 15984 Rev 3
VN5E010AH
5
Package and packing information
Package and packing information
5.1 ECOPACK
®
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
®
packages, depending on their level of environmental compliance. ECOPACK
® specifications, grade definitions and product status are available at: www.st.com
.
ECOPACK
®
is an ST trademark.
5.2 HPAK mechanical data
Figure 39. HPAK package dimension
Doc ID 15984 Rev 3 31/37
32/37
Package and packing information
Table 16.
HPAK mechanical data
Ref. dim
Nom.
e e1 e2 e3
H
L
D
D1
E
E1 b b4 c c2
A
A1
A2
(L1)
L2
L4
R
V2
5.10
5.20
0.85
2.80
0.80
0.20
Data book mm
Min.
2.20
0.90
0.03
0.40
5.20
0.45
0.48
6.00
6.40
1.60
3.30
5.00
9.35
1
0.60
0°
VN5E010AH
Max.
2.40
1.10
0.23
0.55
5.40
0.60
0.60
6.20
6.60
1.80
3.50
5.20
10.10
1.00
8°
Doc ID 15984 Rev 3
VN5E010AH
5.3 HPAK suggested land pattern
Figure 40.
HPAK suggested pad layout
Package and packing information
All dimensions are in mm.
1. The land pattern proposed is not intended to overrule User's PCB design, manufacturing and soldering process rules
Doc ID 15984 Rev 3 33/37
Package and packing information VN5E010AH
The devices can be packed in tube or tape and reel shipments (see Table 17: Device summary ).
Figure 41.
HPAK tube shipment (no suffix)
A
B
C
Base q.ty
Bulk q.ty
Tube length (± 0.5)
A
B
C (± 0.1)
All dimensions are in mm.
75
3000
532
6
21.3
0.6
34/37
Figure 42.
HPAK tape and reel (suffix “TR”)
REEL DIMENSIONS
All dimensions are in mm.
Base q.ty
Bulk q.ty
A (max)
B (min)
C (± 0.2)
F
G (+ 2 / -0)
N (min)
T (max)
2500
2500
330
1.5
13
20.2
16.4
60
22.4
TAPE DIMENSIONS
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb 1986
Tape width
Tape hole spacing
Component spacing
Hole diameter
Hole diameter
Hole position
Compartment depth
Hole spacing
W
P0 (± 0.1)
16
4
P 8
D (± 0.1/-0) 1.5
D1 (min) 1.5
F (± 0.05)
K (max)
P1 (± 0.1)
7.5
2.75
2
All dimensions are in mm.
End
Top cover tape
No components
500mm min
Components No components
Empty components pockets saled with cover tape.
500mm min
User direction of feed
Start
Doc ID 15984 Rev 3
VN5E010AH Order codes
Table 17.
Device summary
Package
6 pins HPAK
Tube
VN5E010AH-E
Order codes
Tape and reel
VN5E010AHTR-E
Doc ID 15984 Rev 3 35/37
Revision history VN5E010AH
Table 18.
Document revision history
Date
2-Jul-2009
02-Oct-2009
19-Sep-2013
Revision
1
2
3
Changes
Initial release.
Updated
Table 10: Open load detection (8 V < VCC < 18 V) .
Updated Disclaimer.
36/37 Doc ID 15984 Rev 3
VN5E010AH
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Information in this document supersedes and replaces all information previously supplied.
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Doc ID 15984 Rev 3 37/37
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