STMicroelectronics VN5E010MH-E Datasheet
STMicroelectronics VN5E010MH-E is a single-channel high-side driver that delivers protection, diagnostics, and simple interfacing, making it suitable for various automotive applications. With advanced protective functions like load current limitation, inrush and overload active management, and overtemperature shutdown, it ensures reliable operation. Its analog current sense pin provides enhanced diagnostic functions for fast detection of overload and short-circuit conditions. Additionally, its 3 V and 5 V CMOS compatible inputs allow for easy integration with microcontrollers.
Oglas
Oglas
VN5E010MH-E
Single-channel high-side driver with analog current sense for automotive applications
Features
Max supply voltage
Operating voltage range
Typ. ON-state resistance
Current limitation (typ)
OFF-state supply current
V
CC
V
CC
R
ON
I
LIMH
I
S
41 V
4.5 V to 28 V
10 m
85 A
2 µA
(1)
1.
Typical value with all loads connected.
■
■
■
General
– Inrush current active management by power limitation
– Very low standby current
– 3 V CMOS compatible inputs
– Optimized electromagnetic emissions
– Very low electromagnetic susceptibility
– In compliance with the 2002/95/EC european directive
– Very low current sense leakage
Diagnostic functions
– Proportional load current sense
– High current sense precision for wide current range
– Current sense disable
– Output short to ground indication
– Overload and short to ground (power limitation) indication
– Thermal shutdown indication
Protections
– Undervoltage shutdown
– Overvoltage clamp
– Load current limitation
– Self limiting of fast thermal transients
– Protection against loss of ground and loss of V
CC
– Overtemperature shutdown with autorestart (thermal shutdown)
– Reverse battery protection with self switch on of the Power MOSFET
– Electrostatic discharge protection
Application
■ All types of resistive, inductive and capacitive loads
Description
The VN5E010MH-E is a single-channel high-side driver manufactured in the ST proprietary
VIPower M0-5 technology and housed in the tiny
HPAK package. The VN5E010MH-E is designed to drive 12 V automotive grounded loads delivering protection, diagnostics and easy 3 V and 5 V CMOS compatible interface with any microcontroller.
The device integrates advanced protective functions such as load current limitation, inrush and overload active management by power limitation, overtemperature shut-off with auto restart and overvoltage active clamp.
A dedicated analog current sense pin is associated with every output channel in order to provide enhanced diagnostic functions including fast detection of overload and short-circuit to ground through power limitation indication and overtemperature indication.
The current sensing and diagnostic feedback of the whole device can be disabled by pulling the
CS_DIS pin high to allow sharing of the external sense resistor with other similar devices .
September 2013 Doc ID 15681 Rev 6 1/34 www.st.com
1
Contents
Contents
VN5E010MH-E
Block diagram and pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Current sense and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Maximum demagnetization energy (V
= 13.5 V) . . . . . . . . . . . . . . . . . 24
Package and PC board thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
®
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
HPAK suggested land pattern . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
2/34 Doc ID 15681 Rev 6
VN5E010MH-E
List of tables
List of tables
< 18 V). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Doc ID 15681 Rev 6 3/34
List of figures
List of figures
VN5E010MH-E
Delay response time between rising edge of ouput current and rising edge of current sense
OUT
/I
SENSE
vs. I
OUT
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Maximum current sense ratio drift vs. load current
(1)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
J
evolution in overload or short to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
case
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Maximum turn-off current versus inductance
(1)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
(1)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Thermal fitting model of a single-channel HSD in HPAK
. . . . . . . . . . . . . . . . . . . . . . . . 26
suggested pad layout
(1)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
4/34 Doc ID 15681 Rev 6
VN5E010MH-E
1
Block diagram and pin configuration
Block diagram and pin configuration
Figure 1.
Block diagram
Table 1.
Name
Pin functions
Function
V
CC
OUT
GND
IN
CS
CS_DIS
Battery connection
Power output
(1)
Ground connection
Voltage controlled input pin with hysteresis, CMOS compatible. Controls output switch state
Analog current sense pin, delivers a current proportional to the load current
Active high CMOS compatible pin, to disable the current sense pin
1.
Pins 1 and 7 must be externally tied together.
Doc ID 15681 Rev 6 5/34
Block diagram and pin configuration
Figure 2.
Configuration diagram (top view) not in scale
VN5E010MH-E
1 2 3 4 5 6 7
OUT GND IN Vcc CS CS_DIS OUT
Table 2.
Suggested connections for unused and not connected pins
Connection / pin CS OUT IN
Floating
To ground
Not allowed
Through 1k
resistor
X
Through 22 k
resistor
X
Through 10 k
resistor
CS_DIS
X
Through 10 k
resistor
6/34 Doc ID 15681 Rev 6
VN5E010MH-E Electrical specifications
Figure 3.
Current and voltage conventions
V
CSD
V
I
CSD
CS_DIS
I
IN
IN
IN
V
CC
OUT
GND
I
GND
CS
I
SENSE
V
SENSE
I
S
I
OUT
V
OUT
V
CC
2.1 Absolute maximum ratings
Stressing the device above the rating listed in the
Table 3: Absolute maximum ratings
may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE program and other relevant quality document.
Table 3.
Symbol
V
CC
-V
CC
I
OUT
-I
OUT
I
IN
I
CSD
Absolute maximum ratings
Parameter
DC supply voltage
Reverse DC supply voltage
DC output current
Reverse DC output current
DC input current
DC current sense disable input current
V
CSENSE
Current sense maximum voltage (V
CC
> 0)
Value Unit
41 V
16 V
Internally limited A
20
-1 to 10
-1 to 10
V
CC
- 41
+V
CC
A mA mA
V
V
E
MAX
Maximum switching energy (single pulse)
(L = 2.2 mH; R
L
= 0
; V
BAT
= 13.5 V; T jstart
= 150 °C;
I
OUT
= I limL
(Typ.) )
645 mJ
Doc ID 15681 Rev 6 7/34
Electrical specifications
Table 3.
Symbol
V
ESD
V
ESD
T j
T stg
Absolute maximum ratings (continued)
Parameter
Electrostatic discharge
(human body model: R= 1.5 K
C= 100 pF)
– IN
– CS
– CS_DIS
– OUT
– V
CC
Charge device model (CDM-AEC-Q100-011)
Junction operating temperature
Storage temperature
VN5E010MH-E
Value Unit
4000
2000
4000
5000
5000
750
-40 to 150
-55 to 150
V
V
V
V
V
V
°C
°C
Table 4.
Symbol
R thj-case
R thj-amb
Thermal data
Parameter Max. value
Thermal resistance junction-case 0.55
Thermal resistance junction-ambient 67.7
Unit
°C/W
°C/W
8/34 Doc ID 15681 Rev 6
VN5E010MH-E Electrical specifications
Values specified in this section are for 8 V < V
CC
< 28 V, -40 °C < T j
< 150 °C, unless otherwise specified.
Table 5.
Symbol
Power section
Parameter Test conditions
V
CC
V
USD
Operating supply voltage
Undervoltage shutdown
V
USDhyst
Undervoltage shutdown hysteresis
R
ON-Rev
R
DSON in reverse battery condition
V
I
R
I
ON clamp
S
L(off)
ON-state resistance
Clamp voltage
Supply current
OFF-state output current
I
OUT
= 6 A; T j
= 25 °C
I
OUT
= 6 A; T j
= 150 °C
I
OUT
= 6 A; V
CC
= 5 V; T j
= 25 °C
V
CC
= -13 V; I
OUT
= -6 A;
T j
= 25 °C
I
CC
= 20 mA; I
OUT
= 0 A
OFF-state: V
CC
= 13 V; T j
= 25 °C;
V
IN
= V
OUT
= V
SENSE
= 0 V
ON-state: V
CC
= 13 V; V
IN
= 5 V;
I
OUT
= 0 A
V
IN
= V
OUT
= 0 V; V
CC
= 13 V;
T j
= 25 °C
V
IN
= V
OUT
= 0 V; V
CC
= 13 V;
T j
= 125 °C
Min. Typ. Max. Unit
4.5
13 28
3.5
4.5
V
V
41
0
0
0.5
10
10
46
1.5
0.01
20
13
52
5
V m m
V
2 5 µA
3
3 mA
µA
Table 6.
Symbol
Switching (V
CC
= 13 V, T j
= 25 °C) t t d(on) d(off)
(dV
OUT
/dt) on
Turn-on voltage slope
(dV
OUT
/dt) off
Turn-off voltage slope
W
W
ON
OFF
Turn-on delay time
R
L
= 2.2
(see
)
Turn-off delay time
R
L
= 2.2
(see
)
Switching energy losses at turn-on
(t won
)
Switching energy losses at turn-off
(t woff
)
R
L
R
L
R
= 2.2
= 2.2
(see
R
L
L
= 2.2
= 2.2
(see
)
)
Min.
-
-
Typ.
40
28
-
)
-
)
Max.
Unit
µs
-
-
-
µs
V
µs
V
µs
-
2
0.6
-
mJ mJ
Doc ID 15681 Rev 6 9/34
Electrical specifications VN5E010MH-E
Table 7.
Symbol
Logic inputs
Parameter Test conditions
V
IL
I
IL
V
IH
I
IH
V
I(hyst)
Low-level input voltage
Low-level input current
High-level input voltage
High-level input current
Input hysteresis voltage
V
V
IN
IN
= 0.9 V
= 2.1 V
V
CSDL
I
CSDL
V
CSDH
I
CSDH
V
CSD(hyst)
V
V
ICL
CSCL
Input clamp voltage
I
IN
= 1 mA
I
IN
= -1 mA
Low-level CS_DIS voltage
Low-level CS_DIS current V
CSD
= 0.9 V
High-level CS_DIS voltage
High-level CS_DIS current V
CS_DIS hysteresis voltage
CS_DIS clamp voltage
CSD
= 2.1 V
I
CSD
= 1 mA
I
CSD
= -1 mA
Min.
Typ.
Max.
Unit
0.9
1
2.1
0.25
5.5
10
7
V
µA
V
µA
V
V
-0.7
1
2.1
0.25
5.5
0.9
10
7
V
µA
V
µA
V
V
-0.7
a
Table 8.
Symbol
Protection and diagnostics
(1)
Parameter Test conditions Min.
Typ.
Max.
Unit
I
I
T limH limL
TSD
Short-circuit current
V
CC
= 13 V
5 V < V
CC
< 28 V
Short-circuit current during thermal cycling
V
CC
= 13 V; T
R
< T j
< T
TSD
Shutdown temperature
Reset temperature
60
150
85
21
175
120
120
200
A
A
°C
T
R
T
RS
+ 1 T
RS
+ 5 °C
V
T
T
RS
HYST
DEMAG
Thermal reset of status
Thermal hysteresis
(T
TSD
-T
R
)
Turn-off output voltage clamp
I
OUT
= 2 A; V
IN
= 0;
L = 6 mH
V
135
CC
- 41 V
7
CC
- 46 V
CC
- 52
V
ON
Output voltage drop limitation
I
OUT
= 0.5 A;
T j
= -40 °C to 150 °C
25
1.
To ensure long term reliability under heavy overload or short-circuit conditions, protection and related diagnostic signals must be used together with a proper software strategy. If the device is subjected to abnormal conditions, this software must limit the duration and number of activation cycles.
°C
°C
V mV
10/34 Doc ID 15681 Rev 6
VN5E010MH-E Electrical specifications
Table 9.
Symbol
Current sense (8 V < V
CC
< 18 V)
Parameter Test conditions Min.
Typ.
Max.
Unit dK dK dK
I
1
2
3
K
K
/K
K
/K
K
0
1
2
3
/K
1
(1)
2
(1)
3
(1)
SENSE0
V
I
OL
SENSE
I
I
I
I
OUT
OUT
OUT
OUT
/I
/I
/I
/I
SENSE
SENSE
Current sense ratio drift
SENSE
Current sense ratio drift
SENSE
Current sense ratio drift
Analog sense leakage current
I
OUT
= 0.25 A; V
SENSE
= 0.5 V
T j
= -40 °C to 150 °C
T j
= 25 °C to 150 °C
I
OUT
= 6 A; V
SENSE
= 0.5 V
T j
= -40 °C to 150 °C
T j
= 25 °C to 150 °C
I
OUT
= 6 A; V
SENSE
= 0.5 V;
V
CSD
= 0 V;
T j
= -40 °C to 150 °C
I
OUT
= 10 A; V
SENSE
= 4 V
T j
= -40 °C to 150 °C
T j
= 25 °C to 150 °C
I
OUT
= 10 A; V
SENSE
= 4 V;
V
CSD
= 0 V;
T j
= -40 °C to 150 °C
I
OUT
= 25 A; V
SENSE
= 4 V
T j
= -40 °C to 150 °C
T j
= 25 °C to 150 °C
I
OUT
= 25 A; V
SENSE
= 4 V;
V
CSD
= 0 V;
T j
= -40 °C to 150 °C
I
OUT
= 0 A; V
SENSE
= 0 V;
V
CSD
= 5 V; V
IN
= 0 V;
T j
= -40 °C to 150 °C
I
OUT
= 0 A; V
SENSE
= 0 V;
V
CSD
= 0 V; V
IN
= 5 V;
T j
= -40 °C to 150 °C
I
OUT
= 2 A; V
SENSE
= 0 V;
V
CSD
= 5 V; V
IN
= 5 V;
T j
= -40 °C to 150 °C
Open load ON-state current detection threshold
I
V
IN
= 5 V, 8 V < V
SENSE
= 5 µA
CC
< 18 V
Max analog sense output voltage
I
OUT
= 18 A; R
SENSE
= 3.9 k
V
SENSEH
(2)
Analog sense output voltage in fault condition
V
CC
= 13 V; R
SENSE
= 3.9 k
I
SENSEH
(2)
Analog sense output current in fault condition
V
CC
= 13 V; V
SENSE
= 5 V
3000
3000
7410
7410
12000
11600
5350
5510
-15
5850
5800
-11
5915
5850
-8
0
0
5
5
6740
6740
6570
6570
6420
6420
8
9
8500
7745
15
7690
7195
11
7000
6755
8
1
2
1
80
%
%
%
µA mA
V
V mA
Doc ID 15681 Rev 6 11/34
12/34
Electrical specifications VN5E010MH-E
Table 9.
Symbol
Current sense (8 V < V
CC
< 18 V) (continued)
Parameter Test conditions t t
DSENSE1H
DSENSE1L
Delay response time from falling edge of
CS_DIS pin
Delay response time from rising edge of
CS_DIS pin
V
SENSE
< 4 V,
1.5 A < I
OUT
< 25 A
I
SENSE
= 90% of I
SENSE MAX
(see
V
SENSE
< 4 V,
1.5 A <I
OUT
< 25 A
I
SENSE
= 10% of I
SENSE MAX
(see
t
DSENSE2H
Delay response time from rising edge of
IN pin
V
SENSE
< 4 V,
1.5 A < I
OUT
< 25 A
I
SENSE
= 90% of I
SENSE max
(see
t
DSENSE2H t
DSENSE2L
Delay response time between rising edge of output current and rising edge of current sense
V
SENSE
< 4V,
I
SENSE
= 90% of I
SENSEMAX,
I
OUT
= 90% of I
OUTMAX
I
OUTMAX
= 3 A (see
)
Delay response time from falling edge of
IN pin
V
SENSE
< 4 V,
1.5 A < I
OUT
< 25 A
I
SENSE
= 10% of I
SENSE max
(see fig
1.
Parameter guaranteed by design, it is not tested.
2.
Fault condition includes: power limitation and overtemperature.
Min.
Typ.
Max.
Unit
50
5
100
20
270 600
310
100 250
µs
µs
µs
µs
µs
Figure 4.
Current sense delay characteristics
INPUT
CS_DIS
LOAD CURRENT
CURRENT SENSE t
DSENSE2H t
DSENSE1L t
DSENSE1H t
DSENSE2L
Doc ID 15681 Rev 6
VN5E010MH-E
Figure 5.
Switching characteristics
V
OUT t
Won
80% dV
OUT
/dt
(on) t r
10%
INPUT t d(on) t d(off) t
Woff
90% t f
Electrical specifications dV
OUT
/dt
(off) t t
Figure 6.
Delay response time between rising edge of ouput current and rising edge of current sense (CS enabled)
V
IN
t
DSENSE2H t
I
OUT
90% I
OUTMAX
I
OUTMAX t
I
SENSE I
SENSEMAX
90% I
SENSEMAX t
Doc ID 15681 Rev 6 13/34
Electrical specifications
Figure 7.
Output voltage drop limitation
V cc
-V out
T j
=150 o
C
T j
=25 o
C
T j
=-40 o
C
VN5E010MH-E
V on
I out
V on
/R on(T)
Figure 8.
I
OUT
/I
SENSE
vs. I
OUT
I
OUT
/I
SENSE
12800
11600
10400
9200
8000
6800
5600
4400
3200
2000
-2 1
B
C
E
A
4
D
7 10 13
I
OUT
(A)
16 19 22 25 28
A : Max, T j
= -40 °C to 150 °C
B : Max, T j
= 25 °C to 150 °C
C : Typical, T j
= -40 °C to 150 °C
D : Min, T j
= 25 °C to 150 °C
E : Min, T j
= -40 °C to 150 °C
14/34 Doc ID 15681 Rev 6
VN5E010MH-E Electrical specifications
Figure 9.
Maximum current sense ratio drift vs. load current
(1) dK/K (%)
20
15
A
10
5
0
-5
-10
-15
-20
4 7 10
B
13 16
I
OUT
(A)
19 22 25 28
A : Max, T j
= -40 °C to 150 °C B : Min, T j
= -40 °C to 150 °C
1.
Parameter guaranteed by design; it is not tested.
Table 10.
Truth table
Conditions
Normal operation
Overtemperature
Undervoltage
Overload
Input
L
H
L
H
L
H
H
H
Output
L
L
L
H
L
L
X
(no power limitation)
Cycling
(power limitation)
L
L
SENSE (V
CSD
= 0 V)
(1)
0
Nominal
0
V
SENSEH
0
0
Nominal
V
SENSEH
Short-circuit to GND
(power limitation)
Negative output voltage clamp
L
H
L L
V
0
SENSEH
0
1.
If the V
CSD
is high, the SENSE output is at a high-impedance, its potential depends on leakage currents and external circuit.
Doc ID 15681 Rev 6 15/34
Electrical specifications VN5E010MH-E
Table 11.
Electrical transient requirements (part 1)
ISO 7637-2:
2004(E)
Test pulse
III
Test levels
(1)
IV
Number of pulses or test times
Burst cycle/pulse repetition time
Min.
Max.
1
2a
3a
3b
4
5b
(2)
-75 V
+37 V
-100 V
+75 V
-6 V
+65 V
-100 V
+50 V
-150 V
+100 V
-7 V
+87 V
5000 pulses
5000 pulses
1 h
1 h
1 pulse
1 pulse
0.5 s
0.2 s
90 ms
90 ms
5 s
5 s
100 ms
100 ms
1.
The above test levels must be considered referred to V
CC
= 13.5 V except for pulse 5b.
2.
Valid in case of external load dump clamp: 40 V maximum referred to ground.
Delays and impedance
2 ms, 10
50 µs, 2
0.1µs, 50
0.1µs, 50
100 ms, 0.01
400 ms, 2
Table 12.
Electrical transient requirements (part 2)
ISO 7637-2:
2004(E)
Test pulse III
Test level results
1
2a
3a
C
C
C
3b
4
5b
(1)
C
C
C
1.
Valid in case of external load dump clamp: 40 V maximum referred to ground.
IV
C
C
C
C
C
C
Table 13.
Electrical transient requirements (part 3)
Class Contents
C
E
All functions of the device are performed as designed after exposure to disturbance.
One or more functions of the device are not performed as designed after exposure to disturbance and cannot be returned to proper operation without replacing the device.
16/34 Doc ID 15681 Rev 6
VN5E010MH-E
2.4 Waveforms
Figure 10.
Normal operation
I I
Figure 11.
Overload or short to GND
I I
I I
I I
Doc ID 15681 Rev 6
Electrical specifications
17/34
Electrical specifications
Figure 12.
Intermittent overload
I I
I I
I I
VN5E010MH-E
Figure 13.
T
J
evolution in overload or short to GND
18/34
I I
I I
Doc ID 15681 Rev 6
VN5E010MH-E Electrical specifications
Figure 14.
OFF-state output current
Iloff [nA]
6000
5000
4000
3000
2000
1000
0
-50 -25 0 25 50 75
Tc [°C]
100 125 150 175
Figure 15.
High-level input current
3
2.5
2
1.5
Iih [uA]
5
4.5
4
3.5
1
0.5
0
-50 -25
Vin= 2.1V
0 25 50
Tc [°C]
75 100 125 150 175
Figure 16.
Input clamp voltage
6.2
6
5.8
5.6
Vicl [V]
7
6.8
6.6
6.4
5.4
5.2
5
-50
Iin= 1mA
-25 0 25 50 75
Tc [°C]
100 125 150 175
Figure 18.
High-level input voltage
2
1.5
1
0.5
0
-50
Vih [V]
4
3.5
3
2.5
-25 0 25 50 75
Tc [°C]
100 125 150 175
Figure 17.
Low-level input voltage
1.2
1
0.8
0.6
Vil [V]
2
1.8
1.6
1.4
0.4
0.2
0
-50 -25 0 25 50 75
Tc [°C]
100 125 150 175
Figure 19.
Input hysteresis voltage
Vihyst [V]
1
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
-50 -25 0 25 50 75
Tc [°C]
100 125 150 175
Doc ID 15681 Rev 6 19/34
Electrical specifications VN5E010MH-E
Figure 20.
ON-state resistance vs. T case
Ron [m Ohm ]
80
70
60
50
40
30
20
10
0
-50 -25
Iout= 6A
Vcc= 13V
0 25 50 75
Tc [°C]
100 125 150 175
Figure 21.
ON-state resistance vs. V
CC
Ron [m Ohm ]
30
25
20
15
10
5
0
0 5 10 15 20
Vcc [V]
25 30
Tc= 150°C
Tc= 125°C
Tc= 25°C
Tc= -40°C
35 40
Figure 22.
Undervoltage shutdown
Vusd [V]
16
14
12
10
8
6
4
2
0
-50 -25 0 25 50 75
Tc [°C]
100 125 150 175
Figure 23.
Turn-on voltage slope
(dVout/dt)On [V/m s]
1000
900
800
700
600
500
400
300
200
100
0
-50 -25 0
Vcc= 13V
Rl= 13 Ω
25 50 75
Tc [°C]
100 125 150 175
Figure 24.
I
LIMH
vs. T case
Ilim h [A]
100
Vcc= 13V 90
80
70
60
50
40
-50 -25 0 25 50 75
Tc [°C]
100 125 150 175
Figure 25.
Turn-off voltage slope
(dVout/dt)Off [V/m s]
1000
900
800
700
600
500
400
300
200
100
0
-50 -25 0 25
Vcc= 13V
Rl= 13 Ω
50 75
Tc [°C]
100 125 150 175
20/34 Doc ID 15681 Rev 6
VN5E010MH-E Electrical specifications
Figure 26.
High-level CS_DIS voltage
Vcsdh [V]
4
3.5
3
2.5
2
1.5
1
0.5
0
-50 -25 0 25 50 75
Tc [°C]
100 125 150 175
Figure 27.
CS_DIS clamp voltage
Vcsdcl [V]
10
9
8
7
6
5
4
3
2
1
0
-50 -25 0 25
Iin= 1m A
50 75
Tc [°C]
100 125 150 175
Figure 28.
Low-level CS_DIS voltage
Vcsdl [V]
4
3.5
3
2.5
2
1.5
1
0.5
0
-50 -25 0 25 50 75
Tc [°C]
100 125 150 175
Doc ID 15681 Rev 6 21/34
Electrical specifications
Figure 29.
Application schematic
+5V
R prot CS_DIS
MCU R prot
IN
R prot
C ext
R
SENSE
CS
45V
GND
V
CC
20V
OUT
VN5E010MH-E
D ld
2.8
D ld
is necessary (voltage transient suppressor) if the load dump peak voltage exceeds the
V
CC
max DC rating. The same applies if the device is subject to transients on the V
CC
line that are greater than the ones shown in the ISO 7637-2 2004 (E) table.
MCU I/Os protection
When negative transients are present on the V
CC
line, the control pins are pulled negative to approximatly -1.5 V. ST suggests to insert a resistor (R prot
) in line to prevent the microcontroller I/Os pins to latch-up.
The value of these resistors is a compromise between the leakage current of microcontroller and the current required by the HSD I/Os (input levels compatibility) with the latch-up limit of microcontroller I/Os.
Equation 1
-V
CCpeak
/ I latchup
R prot
(V
OH
C
- V
IH
) / I
IHmax
Calculation example:
For V
CCpeak
= - 1.5 V; I latchup
20 mA; V
OH
C
4.5 V
75
R prot
240 k
.
Recommended values: R prot
=10 k
C
EXT
= 10 nF .
22/34 Doc ID 15681 Rev 6
VN5E010MH-E
2.9
Electrical specifications
Current sense and diagnostic
The current sense pin performs a double function (see
Figure 30: Current sense and diagnostic
):
●
●
Current mirror of the load current in normal operation, delivering a current proportional to the load one according to a know ratio K
X
.
The current I
SENSE
can be easily converted to a voltage V
SENSE
by means of an external resistor R
SENSE
. Linearity between I
OUT
and V
SENSE
is ensured up to 5 V minimum (see parameter V
SENSE
in Table 9: Current sense (8 V < V
current sense accuracy depends on the output current (refer to current sense electrical characteristics
Table 9: Current sense (8 V < V
).
Diagnostic flag in fault conditions , delivering a fixed voltage V
SENSEH
up to a maximum current I
SENSEH
in case of the following fault conditions (refer to
):
– Power limitation activation
– Overtemperature
A logic level high on CS_DIS pin sets at the same time all the current sense pins of the device in a high-impedance state, thus disabling the current monitoring and diagnostic detection. This feature allows multiplexing of the microcontroller analog inputs by sharing of sense resistance and ADC line among different devices.
Figure 30.
Current sense and diagnostic
V
BAT
V
CC
Main MOSn
41V
Overtemperature
I
OUT
/K
X
I
SENSEH
Pwr_Lim
OUTn
CS_DIS
R
PROT
To uC ADC
R
SENSE
CURRENT
SENSEn
V
SENSEH
V
SENSE
GND
Load
Doc ID 15681 Rev 6 23/34
Electrical specifications
2.10 Maximum demagnetization energy (V
CC
= 13.5 V)
Figure 31.
Maximum turn-off current versus inductance
(1)
100
VN5E010MH-E
B
A
C
10
1
0,1 1
A : T jstart
= 150 °C (single pulse)
B : T jstart
= 100 °C (repetitive pulse)
C : T jstart
= 125 °C (repetitive pulse)
L (mH)
V
IN
, I
L
Demagnetization
10
Demagnetization
100
Demagnetization
1.
Values are generated with R
L
= 0
In case of repetitive pulses, T jstart
(at beginning of each demagnetization) of every pulse must not exceed the temperature specified above for curves A and B.
t
24/34 Doc ID 15681 Rev 6
VN5E010MH-E
3
Package and PC board thermal data
Package and PC board thermal data
3.1 HPAK thermal data
Figure 32.
PC board
(1)
1.
Layout condition of Rth and Zth measurements (PCB FR4 area = 58 mm x 58 mm,
PCB thickness =1.8 mm, Cu thickness = 70 µm, Copper areas: from minimum pad lay-out to 8 cm
2
).
Figure 33.
R thj-amb
vs. PCB copper area in open box free air condition
RTHj_amb(°C/W)
70
65
60
55
50
45
40
35
30
0 2 4 6
PCB Cu heatsink area (cm^2)
8 10
Doc ID 15681 Rev 6 25/34
Package and PC board thermal data
Figure 34.
HPAK thermal impedance junction ambient single pulse
ZTH (°C/W)
100
Cu=8 cm2
Cu=2 cm2
Cu=foot print
10
VN5E010MH-E
1
0.1
0.001
0.01
0.1
1
Time (s)
10 100
Figure 35.
Thermal fitting model of a single-channel HSD in HPAK (1)
1000
26/34
1.
The fitting model is a simplified thermal tool and is valid for transient evolutions where the embedded protections (power limitation or thermal cycling during thermal shutdown) are not triggered.
Equation 2: pulse calculation formula
Z
TH
= R
TH
+ Z
THtp
1 – where
= t
P
/T
Doc ID 15681 Rev 6
VN5E010MH-E
Table 14.
Thermal parameter
Area/island (cm
2
)
R1 (°C/W)
R2 (°C/W)
R3 (°C/W)
R4 (°C/W)
R5 (°C/W)
R6 (°C/W)
C1 (W.s/°C)
C2 (W.s/°C)
C3 (W.s/°C)
C4 (W.s/°C)
C5 (W.s/°C)
C6 (W.s/°C)
Footprint
0.005
0.05
0.1
0.4
0.8
3
0.01
0.15
0.5
8
28
31
Package and PC board thermal data
4
22
25
1.4
6
8
3
9
12
16
Doc ID 15681 Rev 6 27/34
Package and packing information
4 Package and packing information
VN5E010MH-E
4.1 ECOPACK
®
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
®
packages, depending on their level of environmental compliance. ECOPACK
® specifications, grade definitions and product status are available at: www.st.com
.
ECOPACK
®
is an ST trademark.
4.2 HPAK mechanical data
Figure 36.
HPAK package dimension
28/34 Doc ID 15681 Rev 6
VN5E010MH-E
Table 15.
HPAK mechanical data
Ref. dim
Nom.
D1
E
E1 e e1 e2 b4 c c2
D
A
A1
A2 b e3
H
L
(L1)
L2
L4
R
V2
5.10
5.20
0.85
2.80
0.80
0.20
1.60
3.30
5.00
9.35
1
0.60
0°
Package and packing information
Data book mm
Min.
5.20
0.45
0.48
6.00
2.20
0.90
0.03
0.45
6.40
Max.
5.40
0.60
0.60
6.20
2.40
1.10
0.23
0.60
6.60
1.80
3.50
5.20
10.10
1.00
8°
Doc ID 15681 Rev 6 29/34
Package and packing information
4.3 HPAK suggested land pattern
Figure 37.
HPAK suggested pad layout
(1)
VN5E010MH-E
All dimensions are in mm.
1.
The land pattern proposed is not intended to overrule User's PCB design, manufacturing and soldering process rules
30/34 Doc ID 15681 Rev 6
VN5E010MH-E Package and packing information
The devices can be packed in tube or tape and reel shipments (see
).
Figure 38.
HPAK tube shipment (no suffix)
A
B
C
Base q.ty
Bulk q.ty
Tube length (± 0.5)
A
B
C (± 0.1)
All dimensions are in mm.
75
3000
532
6
21.3
0.6
Figure 39.
HPAK tape and reel (suffix “TR”)
REEL DIMENSIONS
All dimensions are in mm.
Base q.ty
Bulk q.ty
A (max)
B (min)
C (± 0.2)
F
G (+ 2 / -0)
N (min)
T (max)
2500
2500
330
1.5
13
20.2
16.4
60
22.4
TAPE DIMENSIONS
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb 1986
Tape width
Tape hole spacing
Component spacing
Hole diameter
Hole diameter
Hole position
Compartment depth
Hole spacing
W 16
P0 (± 0.1) 4
P 8
D (± 0.1/-0) 1.5
D1 (min)
F (± 0.05)
K (max)
P1 (± 0.1)
1.5
7.5
2.75
2
All dimensions are in mm.
End
Top cover tape
No components
500mm min
Components
Empty components pockets saled with cover tape.
No components
500mm min
User direction of feed
Start
Doc ID 15681 Rev 6 31/34
Order codes VN5E010MH-E
Table 16.
Device summary
Package
6 pins HPAK
Tube
VN5E010MH-E
Order codes
Tape and reel
VN5E010MHTR-E
32/34 Doc ID 15681 Rev 6
VN5E010MH-E Revision history
Table 17.
Document revision history
Date Revision
28-May-2009
18-Jun-2009
15-Dec-2009
25-Jan-2010
27-May-2010
18-Sep-2013
1
2
3
4
5
6
Changes
Initial release.
– Changed footnote
Updated
Updated
Table 9: Current sense (8 V < V
Updated
Table 15: HPAK mechanical data .
Updated Disclaimer.
Doc ID 15681 Rev 6 33/34
VN5E010MH-E
Please Read Carefully:
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DOMAINS ACCORDING TO ST PRODUCT DESIGN SPECIFICATIONS. PRODUCTS FORMALLY ESCC, QML OR JAN QUALIFIED ARE
DEEMED SUITABLE FOR USE IN AEROSPACE BY THE CORRESPONDING GOVERNMENTAL AGENCY.
Resale of ST products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever, any liability of ST.
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Information in this document supersedes and replaces all information previously supplied.
The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners.
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34/34 Doc ID 15681 Rev 6
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