FlexCAN clocking. STMicroelectronics SPC570S40E3, SPC570Sx 32-bit Power Architecture® microcontroller, SPC570S40E1, SPC570S50E1, SPC570S50E3
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Clocking RM0349
The CAN_CLK is generated from either the XOSC or PLL0:PHI clocks, depending on the configuration of CGM_AC1_SC in the MC_CGM. The CAN_CLK can also be reduced by configuring the dividing factor in the CGM_AC1_DC0 (divide by 1 to 64).
23.6.2 System clock output pin
There is one system clock output pin on the device: CLOCKOUT. The output clock from
PLL0 and external oscillator (XOSC) can be selected for CLOCKOUT. See Figure 158
.
Figure 161. CLOCKOUT pin muxing
MC_CGM
SIUL2_MSCR
CLOCKOUT iomux
I/O Pad
CLOCKOUT
For all safety relevant clocks the microcontroller uses clock monitoring units (CMUs) to detect a missing clock or incorrect frequency. Each CMU is programmed independently (see
Figure 158 for CMU distribution). The IRCOSC and XOSC are used as the clock monitor
references. Detailed information on the CMUs can be found in the Clock Monitor Unit chapter.
This section explains the CMU configuration.
Figure 162 shows the block diagram for CMU_0 on the SPC570Sx.
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RM0349
Figure 162. CMU_0 block diagram
CLKMT0_RMN (IRCOSC)
CMU_CSR[CKSEL1]
CLK_SEL
N/A 01
N/A 10
00,11
CLKMN0_RMT (XOSC)
CMU_MDR
Frequency Meter
CMU_FDR
Clocking f
CLKMN0_RMT Supervisor
CLKMN0_RMT
< f
CLKMT0_RMN
/ 2 RCDIV
OLR
CLKMN0_RMT_ACTIVE
(from MC_ME)
Fixed
Prescaler
/4
CLKMN1
(monitored clock)
CLKMN1 Supervisor
CMU_HREF f
CLKMN1
> hfref or f
CLKMN1
< f
CLKMT0_RMN
/4 f
CLKMN1
< lfref
FHH
FLL
CMU_LFREF
CLKMN1_ACTIVE
(from MC_ME)
Figure 163 shows the block diagram for CMU[1:3] on the SPC570Sx.
Figure 163. CMU[1:3] block diagram
CLKMT0_RMN (IRCOSC)
CLKMN1 Supervisor
CMU_HREF
Fixed
Prescaler
/4 f
CLKMN1
> hfref or f
CLKMN1
< f
CLKMT0_RMN
/4
CLKMN1
(monitored clock) f
CLKMN1
< lfref
FHH
FLL
CMU_LFREF
CLKMN1_ACTIVE
(from MC_ME)
23.7.1.1 Clock input sources
shows the clocks that are monitored by each CMU. These signals are connected internally on the chip, but are not accessible via pins on the boundary of the device.
IRCOSC is the reference clock for all clock monitors. Only CMU_0 implements the XOSC
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