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PMAC2 VME Hardware Reference Manual
E17 - E18: Serial Connector Select
E17 and E18 control whether the RS-232 or RS-422 serial port is used.
E Point and
Physical Layout
E17
Location Description Default
B2 Jump pins 1 to 2 to use RS-232 serial interface.
Jump pins 2 to 3 to use RS -422 serial interface
E18 C2 Jump pins 1 to 2 to use RS -232 serial interface.
Jump pins 2 to 3 to use RS -422 serial interface
E20A-I: DPRAM Byte Order Control
1-2 jumper installed
1-2 jumper installed
Caution:
All E20A-I jumpers must be in the same setting for DPRAM communications to work.
E Point and
Physical Layout
E20
A 5 (4 3) (2 1)
B 5 (4 3) (2 1)
C 5 (4 3) (2 1)
D 5 (4 3) (2 1)
E 5 (4 3) (2 1)
F 5 (4 3) (2 1)
G 5 (4 3) (2 1)
H 5 (4 3) (2 1)
I 5 (4 3) (2 1)
Location Description Default
C4
C4
C4
C4
C4
D4
D4
D4
D4
Jump pins 1 to 2, and pins 3 to 4, to tie DPRAM data lines 8-15 to VME Bus data lines 8-15, and DPRAM data lines 0-7 to VME Bus data lines 0-7 (Motorola big-endian format)
Jump pins 2 to 3, and pins 4 to 5 to tie DPRAM data lines 8-15 to VME Bus data lines 0-7, and DPRAM data lines 0-7 to VME Bus data lines 8-15 (Intel littleendian format)
E39: Reset-From-Bus Enable
1-2, 3-4 jumpers installed (Motorola format)
E Point and
Physical Layout
E39
Location Description Default
D1 1-2 jumper installed Jump pin 1 to 2 to permit VME Bus reset line to reset
PMAC2.
Remove jumper so VME Bus reset line does not reset
PMAC2.
Jumper Summary 25
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Table of contents
- 5 INTRODUCTION
- 5 Features
- 5 PMAC2 VME Configuration
- 5 PMAC2 VME ASICs
- 5 DSPGATE1 Servo ASIC
- 6 DSPGATE2 I/O ASIC
- 6 PMAC2 VME Board Configuration
- 7 PMAC2 VME Setup
- 7 PMAC2 CPUs
- 8 Configurations
- 8 Firmware
- 8 Option 16 Supplemental Memory
- 9 Related Technical Documentation
- 11 CONNECTORS
- 11 PMAC2 VME Connector Summary
- 12 J1/JANA (20-Pin Header)
- 13 J2/JTHW (26-Pin Header)
- 14 J3/JIO (40-Pin Header)
- 15 J4 (JMACRO) 26-Pin Header
- 15 J5/JRS232 (10-Pin Header)
- 16 J5A/JRS422 (26-Pin Header)
- 17 J6/JDISP (14-Pin Header)
- 17 J7/JHW (20-Pin Header)
- 18 J8/JEQU (10-Pin Header)
- 18 J9/JMACH1 (100-Pin Header)
- 21 J10/JMACH2 (100-Pin Header)
- 24 P1 JMACH (96-Pin Header)
- 25 P2/JMACHA (96-Pin Header)
- 26 TB1 (2/4-Pin Terminal Block)
- 26 TB2 (3-Pin Terminal Block)
- 27 JUMPER SUMMARY
- 27 E1: Card 0 Select
- 27 E2: 40 MHz/60 MHz CPU Operation
- 27 E3: Re-Initialization on Reset Control
- 27 E4 - E6: (Reserved for future use)
- 28 E7A-H through E10A-H: P2 Connector B-Row Use Select
- 28 E11-E12: JEQU Port Sink/Source Select
- 28 E13: SCLK Direction Control
- 29 E17 - E18: Serial Connector Select
- 29 E20A-I: DPRAM Byte Order Control
- 29 E39: Reset-From-Bus Enable
- 30 Option 1V Piggyback Connector Description
- 30 J11/JMACH3 (100-Pin Header)
- 33 J12/JMACH4 (100-Pin Header)
- 36 P2A/JMACHB (96-Pin Header)
- 37 OPTION 1V PIGGYBACK JUMPER SUMMARY
- 37 E14: SCLK Direction Control
- 39 PMAC2 VME CPU
- 39 Connector Summary
- 39 J2 (JEXP)