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PMAC2 VME Hardware Reference Manual
PMAC2 VME CPU
Connector Summary
The following paragraphs provide a brief description of each connector on the PMAC2 VME CPUs.
J1
35
36
36-pin header on backside for connection to main PMAC/PMAC2 board.
Front View
`
1
2
J2 (JEXP)
49
50
Front View
50-pin IDC header for connection to expansion port accessory boards.
J3
35
36
36-pin header on backside for connection to main PMAC/PMAC2 board.
Front View
J4 (JEXP)
9
10
Front View
1
2
`
1
2
1
2
10-pin IDC header for connection to DPRAM on accessory board (PMAC PC) or main PMAC board
(PMAC VME or PMAC2 VME).
J5 (JTAG/OnCE)
9
10
Front View
1
2
10-pin header for factory use only.
J6
8 1
Front View
8-pin SIP header for factory use only.
J7
8 1
Front View
8-pin SIP header for factory use only.
PMAC2 VME CPU 35
PMAC2 VME CPU Board
PMAC VME Hardware Reference Manual
P/N 602405
36
P/N 602705
PMAC2 VME CPU
PMAC2 VME Hardware Reference Manual
PMAC2 VME CPU Piggyback Board Jumpers
See the PMAC PC CPU Piggyback Board layout diagram for jumper locations.
E Point and
Physical Layout
E1
E2
E3
E4
E5
1
2
3
Location Description
D1 (602398)
A1 (602405)
B1 (602705)
A2 (602398)
N/A (602405)
D5 (602705)
C1 (602398)
N/A (602405)
D4 (602705)
A5 (602398)
N/A (602405)
B1 (602705)
N/A (602398)
N/A (602405)
B3 (602705)
Remove jumper to enable watchdog timer operation.
Jump pins 1 to 2 to disable watchdog timer operation
(for test purposes only).
Remove jumper to disable extended channel addressing (Channels 9-16).
Jump pins 1 to 2 to enable extended channel addressing (Channels 9-16).
Remove jumper (or no jumper present) to disable extended channel addressing (Channels 9-16).
Jump pins 1 to 2 to enable extended channel addressing (Channels 9-16).
Boot Enable Jumper.
Remove jumper for normal use.
Jump pins 1 and 2 for external firmware load (with
MAIN board E3 on).
Battery-backed RAM Size Select.
Jump pins 2 and 3 for supple-mental battery-backed memory (Option 16 only).
No Jumper if no battery-backed memory.
Default
No Jumper
No Jumper
No Jumper
No Jumper
No Jumper
PMAC2 VME CPU 37
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Table of contents
- 5 INTRODUCTION
- 5 Features
- 5 PMAC2 VME Configuration
- 5 PMAC2 VME ASICs
- 5 DSPGATE1 Servo ASIC
- 6 DSPGATE2 I/O ASIC
- 6 PMAC2 VME Board Configuration
- 7 PMAC2 VME Setup
- 7 PMAC2 CPUs
- 8 Configurations
- 8 Firmware
- 8 Option 16 Supplemental Memory
- 9 Related Technical Documentation
- 11 CONNECTORS
- 11 PMAC2 VME Connector Summary
- 12 J1/JANA (20-Pin Header)
- 13 J2/JTHW (26-Pin Header)
- 14 J3/JIO (40-Pin Header)
- 15 J4 (JMACRO) 26-Pin Header
- 15 J5/JRS232 (10-Pin Header)
- 16 J5A/JRS422 (26-Pin Header)
- 17 J6/JDISP (14-Pin Header)
- 17 J7/JHW (20-Pin Header)
- 18 J8/JEQU (10-Pin Header)
- 18 J9/JMACH1 (100-Pin Header)
- 21 J10/JMACH2 (100-Pin Header)
- 24 P1 JMACH (96-Pin Header)
- 25 P2/JMACHA (96-Pin Header)
- 26 TB1 (2/4-Pin Terminal Block)
- 26 TB2 (3-Pin Terminal Block)
- 27 JUMPER SUMMARY
- 27 E1: Card 0 Select
- 27 E2: 40 MHz/60 MHz CPU Operation
- 27 E3: Re-Initialization on Reset Control
- 27 E4 - E6: (Reserved for future use)
- 28 E7A-H through E10A-H: P2 Connector B-Row Use Select
- 28 E11-E12: JEQU Port Sink/Source Select
- 28 E13: SCLK Direction Control
- 29 E17 - E18: Serial Connector Select
- 29 E20A-I: DPRAM Byte Order Control
- 29 E39: Reset-From-Bus Enable
- 30 Option 1V Piggyback Connector Description
- 30 J11/JMACH3 (100-Pin Header)
- 33 J12/JMACH4 (100-Pin Header)
- 36 P2A/JMACHB (96-Pin Header)
- 37 OPTION 1V PIGGYBACK JUMPER SUMMARY
- 37 E14: SCLK Direction Control
- 39 PMAC2 VME CPU
- 39 Connector Summary
- 39 J2 (JEXP)