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PMAC VME Hardware Reference Manual
P2A/JMACHB (96-Pin Header)
Pin# Row A Row B (Format A)
Front View
Row B (Format B) Row C
01 +5V No CHU5
02 GND No CHU7
03 CHA5 No CHV5
04 CHB5 No CHV7
05 CHC5 No CHW5
06 PLIM5 No CHW7
07 MLIM5
08 HOME5
No
No
CHT5
CHT7
+5V
GND
CHA7
CHB7
CHC7
PLIM7
MLIM7
HOME7
09 AENA5 No USER5
10 FAULT5 No
11 PWMATOP5/
DAC_CLK5
No Connect
USER7
ADC_DAA5
12 PWMABOT5/ DAC5A
13 PWMBTOP5/
DAC_STB5
No Connect
No Connect
ADC_DAA7
ADC_DAB5
AENA7
FAULT7
PWMATOP7/
DAC_CLK7
PWMABOT7/ DAC7A
PWMBTOP7/
DAC_STB7
14 PWMBBOT5/ DAC5B
15 PWMCTOP5/ DIR5
No Connect
No Connect
16 PWMCBOT5/ Connect
ADC_DAB7
ADC_CLK5678
PWMBBOT7/ DAC7B
PWMCTOP7/ DIR7
17 CHA6 No CHA8
18 CHB6 No WD0/
19 CHC6 No CHU6
CHB8
CHC8
20 PLIM6 No CHU8
21 MLIM6 No
22 HOME6 No
CHV6
CHV8
PLIM8
MLIM8
HOME8
AENA8 23 AENA6 No CHW6
24 FAULT6 No
25 PWMATOP6/
DAC_CLK6
No Connect
CHW8
CHT6
FAULT8
PWMATOP8/
DAC_CLK8
26 PWMABOT6/ DAC6A
27 PWMBTOP6/
No Connect
No Connect
CHT8
USER6
PWMABOT8/ DAC8A
PWMBTOP8/
28
29
30
DAC_STB6
PWMBBOT6/ DAC6B
PWMCTOP6/ DIR6
PWMCBOT6/ PULSE6
No Connect
No Connect
No Connect
USER8
ADC_DAA6
ADC_DAA8
DAC_STB8
PWMBBOT8/ DAC8B
PWMCTOP8/ DIR8
PWMCBOT8/ PULSE8
31 GND No GND
32 +5V No +5V
The P2A connector provides an alternate path to J11 and J12 for the machine interface connections for channels 5-
8. Only the positive signals of complementary pairs are brought out on this connector. For the inputs, the complementary lines are tied to 2.5V on PMAC2. Refer to the J11 and J12 pin descriptions for more detailed information on each pin.
Note: Format A for the B-row will be used if jumpers JP1-1 to JP1-32 are removed. This format should be used in a 32-bit VME system. Format B for the B-row will be used if these jumpers connect pins 1 and 2. This format is not compatible with a 32-bit VME system.
32 Jumper Summary
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