ST7LITEU05 ST7LITEU09 Supply, reset and clock management
7.3.2
Reset value: 0000 0000 (00h)
7
0 0 0 0
Read/write
0 0 MCO
0
SMS
Bits 7:2 = Reserved, must be kept cleared.
Bit 1 = MCO Main Clock Out enable bit
This bit is read/write by software and cleared by hardware after a reset. This bit allows to enable the MCO output clock.
0: MCO clock disabled, I/O port free for general purpose I/O.
1: MCO clock enabled.
Bit 0 = SMS Slow mode selection bit
This bit is read/write by software and cleared by hardware after a reset. This bit selects the input clock f
OSC
or f
OSC
/32.
0: Normal mode (f
CPU = f
OSC
)
1: Slow mode (f
CPU = f
OSC
/32)
RC control register (RCCR)
Reset value: 1111 1111 (FFh)
7
CR9 CR8 CR7 CR6 CR5
Read/write
CR4 CR3
0
CR2
Bits 7:0 = CR[9:2] RC oscillator frequency adjustment bits
These bits, as well as CR[1:0] bits in the SICSR register must be written immediately after reset to adjust the RC oscillator frequency and to obtain the required accuracy.
The application can store the correct value for each voltage range in Flash memory and write it to this register at start-up.
Note: To tune the oscillator, write a series of different values in the register until the correct frequency is reached. The fastest method is to use a dichotomy starting with 80h.
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