Instruction groups. STMicroelectronics ST7LITEU09, ST7LITEU05

ST7LITEU05 ST7LITEU09 Instruction set

The ST 7 family devices use an Instruction Set consisting of 63 instructions. The instructions may be subdivided into 13 main groups as illustrated in the following table:

Group

Load and Transfer

Stack operation

Increment/Decrement

Compare and tests

Logical operations

Bit operation

Conditional bit test and branch

Arithmetic operations

Shift and rotates

Unconditional jump or call

Conditional branch

Interruption management

Condition code flag modification

Table 42. ST7 instruction set

Instructions

LD CLR -

PUSH POP RSP

INC DEC -

-

-

CP

AND

TNZ BCP

OR XOR

-

CPL

-

NEG

BSET BRES

BTJT BTJF

ADC

-

-

-

-

-

-

ADD SUB SBC MUL

-

-

-

-

-

-

-

-

-

-

-

SLL

JRA

JRxx

SRL

JRT

-

SRA

JRF

-

RLC

JP

-

TRAP WFI HALT IRET

SIM RIM SCF RCF

RRC

-

-

-

SWAP

-

-

-

SLA

-

-

-

-

-

-

-

CALL CALLR NOP RET

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

Using a prebyte

The instructions are described with 1 to 4 bytes.

In order to extend the number of available opcodes for an 8-bit CPU (256 opcodes), three different prebyte opcodes are defined. These prebytes modify the meaning of the instruction they precede.

The whole instruction becomes:

PC-2 End of previous instruction

PC-1 Prebyte

PC Opcode

PC+1 Additional word (0 to 2) according to the number of bytes required to compute the effective address Obsolete Product(s) - Obsolete Product(s) implemented. They precede the opcode of the instruction in X or the instruction using direct addressing mode. The prebytes are:

PDY 90 Replace an X based instruction using immediate, direct, indexed, or inherent addressing mode by a Y one.

PIX 92 Replace an instruction using direct, direct bit or direct relative addressing mode to an instruction using the corresponding indirect addressing mode.

It also changes an instruction using X indexed addressing mode to an instruction using indirect X indexed addressing mode.

PIY 91 Replace an instruction using X indirect indexed addressing mode by a Y one.

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Instruction set ST7LITEU05 ST7LITEU09

Note:

In order to provide enhanced robustness to the device against unexpected behavior, a system of illegal opcode detection is implemented. If a code to be executed does not correspond to any opcode or prebyte value, a reset is generated. This, combined with the

Watchdog, allows the detection and recovery from an unexpected fault or interference.

A valid prebyte associated with a valid opcode forming an unauthorized combination does not generate a reset.

Mnemo Description

Table 43. Illegal opcode detection

Function/example Dst Src H I N Z

CPL

DEC

HALT

IRET

INC

JP

ADC

ADD

AND

BCP

BRES

BSET

BTJF

BTJT

CALL

Add with carry

Addition

Logical and

Bit compare A, Memory

Bit Reset

Bit Set

Jump if bit is false (0)

Jump if bit is true (1)

Call subroutine

CALLR Call subroutine relative

CLR Clear

CP Arithmetic compare

One Complement

Decrement

Halt

Interrupt routine return

Increment

Absolute jump

A = A + M + C

A = A + M

A = A . M tst (A . M) bres Byte, #3 bset Byte, #3 btjf Byte, #3, Jmp1 btjt Byte, #3, Jmp1

-

-

tst(Reg - M)

A = FFH-A dec Y

-

Pop CC, A, X, PC inc X jp [TBL.w]

M

M

M

M

-

A

A

A

A

reg, M reg reg, M reg, M

-

-

-

-

-

-

-

-

-

-

-

-

-

-

M

M

M

M

M

-

-

-

H

-

-

-

-

-

-

-

-

-

-

-

-

H

H

-

-

0

-

-

I

-

-

-

-

-

-

-

-

-

-

-

-

N

N

-

N

N

-

-

-

-

-

-

-

0

N

N

N

N

N reg, M

-

JRA Jump relative always -

JRT

JRF

Jump relative

Never jump

jrf *

-

-

-

-

-

-

-

-

-

-

-

-

-

-

JRIH Jump if ext. interrupt = 1 -

-

JRIL

JRH

Jump if ext. interrupt = 0

Jump if H = 1

-

H = 1 ?

-

-

-

-

-

-

-

-

-

-

-

Z

Z

-

Z

Z

-

-

-

-

-

-

-

1

Z

Z

Z

Z

Z

1

-

-

C

-

-

C

C

-

-

-

-

-

C

-

-

C

C

JRNH

JRM

JRNM

JRMI

Jump if H = 0

Jump if I = 1

Jump if I = 0

Jump if N = 1 (minus)

H = 0 ?

I = 1 ?

I = 0 ?

N = 1 ?

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

C

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ST7LITEU05 ST7LITEU09 Instruction set

Mnemo Description

Table 43. Illegal opcode detection (continued)

Function/example Dst Src H I N Z

JRULE

LD

MUL

NEG

NOP

OR

POP

-

PUSH

RCF

JRPL

JREQ

JRNE

JRC

JRNC

JRULT

JRUGE

JRUGT

RET

RIM

RLC

RRC

RSP

SBC

SCF

SIM

Jump if N = 0 (plus)

Jump if Z = 1 (equal)

Jump if Z = 0 (not equal)

Jump if C = 1

Jump if C = 0

Jump if C = 1

Jump if C = 0

Jump if (C + Z = 0)

Jump if (C + Z = 1)

Load

Multiply

Negate (2's compl)

No operation

OR operation

Pop from the stack

-

Push onto the stack

Reset carry flag

Subroutine return

Enable Interrupts

Rotate left true C

Rotate right true C

Reset Stack Pointer

Subtract with carry

Set carry flag

Disable interrupts

N = 0 ?

Z = 1 ?

Z = 0 ?

C = 1 ?

C = 0 ?

Unsigned <

Jmp if unsigned >=

Unsigned >

Unsigned <= dst <= src

X,A = X * A neg $10

-

A = A + M pop reg pop CC push Y

C = 0

-

I = 0

C <= Dst <= C

C => Dst => C

S = Max allowed

A = A - M - C

C = 1

I = 1

-

reg, M reg, M

-

A

-

-

-

-

-

-

-

-

-

-

reg, M

-

M, reg

A, X, Y X, Y, A reg, M -

-

A reg

CC

M

-

-

M

M

M reg, CC

-

-

-

-

-

-

-

-

-

-

-

M

-

-

-

-

-

-

N

-

N

-

-

-

N

-

N

-

-

-

-

-

-

-

-

N

-

N

-

-

-

-

N

-

Z

-

Z

-

-

-

Z

-

Z

-

-

-

-

-

-

-

-

Z

-

Z

-

-

-

-

Z

-

-

1

SLA

SLL

Shift left arithmetic

Shift left logic

C <= Dst <= 0

C <= Dst <= 0 reg, M reg, M

-

-

-

-

-

-

N

N

Z

Z

C

C

SRL Shift right logic 0 => Dst => C reg, M 0 Z C

SRA Shift right arithmetic Dst7 => Dst => C reg, M N Z C

-

-

-

C

-

0

0

C

-

-

-

-

-

-

-

-

-

-

C

-

C

1

-

-

-

C

-

-

-

H

-

-

0

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

I

-

-

-

-

-

-

-

-

-

-

-

-

-

0

-

-

-

SUB

SWAP

TNZ

TRAP

Subtraction

SWAP nibbles

Test for Neg & Zero

S/W trap

A = A - M A

Dst[7..4]<=>Dst[3..0] reg, M tnz lbl1

S/W interrupt

-

-

-

M

-

-

-

-

-

-

1

-

-

N

-

N

N

Z

-

Z

Z

-

-

C

-

C

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Instruction set

Mnemo

WFI

XOR

ST7LITEU05 ST7LITEU09

Description

Table 43. Illegal opcode detection (continued)

Function/example Dst Src H

Wait for interrupt

Exclusive OR

-

A = A XOR M

-

A

-

M -

-

I

0

-

N

-

N

Z

-

Z

C

-

-

Obsolete Product(s) - Obsolete Product(s)

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