Instruction set ST7LITEU05 ST7LITEU09
The ST7 Core features 17 different addressing modes which can be classified in seven main groups:
Table 36. Description of addressing modes
Addressing mode Example
Inherent
Immediate
Direct
Indexed
Indirect
Relative
Bit operation nop ld A,#$55 ld A,$55 ld A,($55,X) ld A,([$55],X) jrne loop bset byte,#5
The ST7 instruction set is designed to minimize the number of bytes required per instruction: To do so, most of the addressing modes may be subdivided in two submodes called long and short:
• Long addressing mode is more powerful because it can use the full 64 Kbyte address space, however it uses more bytes and more CPU cycles.
• Short addressing mode is less powerful because it can generally only access page zero (0000h - 00FFh range), but the instruction size is more compact, and faster. All memory to memory instructions use short addressing modes only (CLR, CPL, NEG,
BSET, BRES, BTJT, BTJF, INC, DEC, RLC, RRC, SLL, SRL, SRA, SWAP)
The ST7 Assembler optimizes the use of long and short addressing modes.
Mode
Table 37. ST7 addressing mode overview nop
Syntax
Destination/ source
-
Pointer address
-
Pointe r
-
Length
(Bytes)
Inherent + 0
Immediate
Short
-
Direct
-
ld A,#$55 ld A,$10 00..FF
-
-
-
-
+ 1
+ 1
Long Direct ld A,$1000 0000..FFFF
+ 2
No Offset Direct Indexed ld A,(X) 00..FF
-
+ 0 (with X register)
+ 1 (with Y register)
+ 1 Short Direct Indexed ld A,($10,X) 00..1FE
-
Long
Short
Long
Direct
Indirect
Indirect
Indexed ld A,($1000,X) 0000..FFFF
ld A,[$10] 00..FF
ld A,[$10.w] 0000..FFFF
-
00..FF
00..FF
byte
word
+ 2
+ 2
+ 2
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