TextIO implementation issues
Using STD_INPUT and STD_OUTPUT within ModelSim
The standard VHDL’87 TextIO package contains the following file declarations:
file
input: TEXT
is in
"STD_INPUT";
file
output: TEXT
is out
"STD_OUTPUT";
The standard VHDL’93 TextIO package contains these file declarations:
file
input: TEXT
open
read_mode
is
"STD_INPUT";
file
output: TEXT
open
write_mode
is
"STD_OUTPUT";
STD_INPUT is a file_logical_name that refers to characters that are entered interactively from the keyboard, and STD_OUTPUT refers to text that is displayed on the screen.
In ModelSim reading from the STD_INPUT file brings up a dialog box that allows you to enter text into the current buffer. The last line written to the STD_OUTPUT file appears as a prompt in this dialog box. Any text that is written to the
STD_OUTPUT file is also echoed in the Transcript window.
TextIO implementation issues
Writing strings and aggregates
A common error in VHDL source code occurs when a call to a WRITE procedure does not specify whether the argument is of type STRING or BIT_VECTOR. For example, the VHDL procedure:
WRITE (L, "hello"); will cause the following error:
ERROR: Subprogram "WRITE" is ambiguous.
In the TextIO package, the WRITE procedure is overloaded for the types STRING and BIT_VECTOR. These lines are reproduced here: procedure WRITE(L: inout LINE; VALUE: in BIT_VECTOR;
JUSTIFIED: in SIDE:= RIGHT; FIELD: in WIDTH := 0); procedure WRITE(L: inout LINE; VALUE: in STRING;
JUSTIFIED: in SIDE:= RIGHT; FIELD: in WIDTH := 0);
The error occurs because the argument "hello" could be interpreted as a string or a bit vector, but the compiler is not allowed to determine the argument type until it knows which function is being called.
The following procedure call also generates an error:
WRITE (L, "010101");
4-56
VHDL Simulation ModelSim EE/SE User’s Manual
TextIO implementation issues
This call is even more ambiguous, because the compiler could not determine, even if allowed to, whether the argument "010101" should be interpreted as a string or a bit vector.
There are two possible solutions to this problem:
• Use a qualified expression to specify the type, as in:
WRITE (L, string’("hello"));
• Call a procedure that is not overloaded, as in:
WRITE_STRING (L, "hello");
The WRITE_STRING procedure simply defines the value to be a STRING and calls the WRITE procedure, but it serves as a shell around the WRITE procedure that solves the overloading problem. For further details, refer to the
WRITE_STRING procedure in the io_utils package, which is located in the file
io_utils.vhd.
Reading and writing hexadecimal numbers
The reading and writing of hexadecimal numbers is not specified in standard
VHDL. The Issues Screening and Analysis Committee of the VHDL Analysis and
Standardization Group (ISAC-VASG) has specified that the TextIO package reads and writes only decimal numbers.
To expand this functionality, ModelSim supplies hexadecimal routines in the package io_utils, which is located in the file io_utils.vhd. To use these routines, compile the io_utils package and then include the following use clauses in your
VHDL source code: use std.textio.all; use work.io_utils.all;
Dangling pointers
Dangling pointers are easily incurred when using the TextIO package, because
WRITELINE deallocates the access type (pointer) that is passed to it. Following are examples of good and bad VHDL coding styles:
Bad VHDL (because L1 and L2 both point to the same buffer):
READLINE (infile, L1);
L2 := L1;
-- Read and allocate buffer
-- Copy pointers
WRITELINE (outfile, L1); -- Deallocate buffer
Good VHDL (because L1 and L2 point to different buffers):
READLINE (infile, L1); -- Read and allocate buffer
L2 := new string’(L1.all); -- Copy contents
WRITELINE (outfile, L1); -- Deallocate buffer
ModelSim EE/SE User’s Manual VHDL Simulation
4-57
TextIO implementation issues
The ENDLINE function
The ENDLINE function described in the IEEE Standard VHDL Language
Reference Manual, IEEE Std 1076-1987 contains invalid VHDL syntax and cannot be implemented in VHDL. This is because access types must be passed as variables, but functions only allow constant parameters.
Based on an ISAC-VASG recommendation the ENDLINE function has been removed from the TextIO package. The following test may be substituted for this function:
(L = NULL) OR (L’LENGTH = 0)
The ENDFILE function
In the VHDL Language Reference Manuals, IEEE Std 1076-1987 and IEEE Std
1076-1993, the ENDFILE function is listed as:
-- function ENDFILE (L: in TEXT) return BOOLEAN;
As you can see, this function is commented out of the standard TextIO package.
This is because the ENDFILE function is implicitly declared, so it can be used with files of any type, not just files of type TEXT.
Using alternative input/output files
You can use the TextIO package to read and write to your own files. To do this, just declare an input or output file of type TEXT.
The VHDL’87 declaration is:
file
myinput : TEXT
is in
"pathname.dat";
For VHDL’93 the declaration is:
file
myinput : TEXT
open
read_mode
is
"pathname.dat";
Then include the identifier for this file ("myinput" in this example) in the
READLINE or WRITELINE procedure call.
Providing stimulus
You can create batch files containing
force
(CR-87)
commands that provide stimulus for simulation. A VHDL test bench has been included with the ModelSim install files as an example; it illustrates how results can be generated by reading vectors from a file. Check for this file:
<install_dir>/modeltech/examples/stimulus.vhd
4-58
VHDL Simulation ModelSim EE/SE User’s Manual
