Window overview
Window overview
The ModelSim simulation and debugging environment consists of nine window types. Multiple windows of each type may be used during simulation (with the exception of the Main window). Make an additional window with the View > New menu selection in the Main window. A brief description of each window follows:
•
Main window
(10-158)
The main window from which all subsequent VSIM windows are available.
•
Dataflow window
(10-170)
Lets you trace signals and nets through your design by showing related processes.
•
List window
(10-174)
Shows the simulation values of selected VHDL signals, and Verilog nets and register variables in tabular format.
•
Process window
(10-189)
Displays a list of processes that are scheduled to run during the current simulation cycle.
•
Signals window
(10-192)
Shows the names and current values of VHDL signals, and Verilog nets and register variables in the region currently selected in the Structure window.
•
Source window
(10-200)
Displays the HDL source code for the design. (Your source code can remain
hidden if you wish, see "Source code security and -nodebug"
(E-443)
.)
•
Structure window
(10-206)
Displays the hierarchy of structural elements such as VHDL component instances, packages, blocks, generate statements, and Verilog model instances, named blocks, tasks and functions.
•
Variables window
(10-209)
Displays VHDL constants, generics, variables, and Verilog register variables in the current process and their current values.
•
Wave window
(10-212)
Displays waveforms, and current values for the VHDL signals, and Verilog nets and register variables you have selected. Current and past simulations can be compared side-by-side in one Wave window.
10-150
ModelSim EE Graphic Interface ModelSim EE/SE User’s Manual
