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X64-CL iPro Acquisition Timing
DATA first 7 last
8
PCLK 2
LVAL 3
(Hsync)
Pixel Clock Range: 20 MHz up to 85 MHz
LVAL/FVAL setup time 1 : Minimum 15ns
Min/Max 9 HB 5
FVAL
(Vsync)
Min/Max 4,9 VB 6
1
The setup times for LVAL and FVAL are the same. Both must be high and stable before the rising edge of the Pixel Clock.
2
Pixel Clock must always be present.
3
LVAL must be active high to acquire camera data.
4
Minimum of 1.
5
HB - Horizontal Blanking:
6
VB - Vertical Blanking:
7
First Active Pixel (unless otherwise specified in the CCA file – "Horizontal Back invalid = x" where ‘x’ defines the number of pixels to be skipped).
8
Last Active Pixel – defined in the CCA file under "Horizontal active = y" – where ‘y’ is the total number of active pixels per tap.
9
Maximum Valid Data:
8-bits/pixel x 256K Pixels/line (LVAL)
16-bits/pixel x 128K Pixels/line (LVAL)
32-bits/pixel x 64K Pixels/line (LVAL)
64-bits/pixel x 32K Pixels/line (LVAL)
16,000,000 lines (FVAL)
58 • X64-CL iPro Reference
X64-CL iPro Series User's Manual
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