Chapter 2: Hardware/Software Co-Design
Hardware/Software Co-Design in System Generator
System Generator provides three ways for processors to be brought into a model; processors can be imported through a Black Box block, a PicoBlaze Microcontroller block and an EDK Processor block.
Black Box Block
The Black Box approach provides the largest degree of flexibility, at the cost of design complexity. You can interface any processor HDL into a System Generator design in this manner. All ports and buses on the processor can be exposed to the System Generator diagram, and you are free to engineer the required connectivity between the processor and other System Generator blocks. You also have complete control over software compilation
issues. Please refer to the topic Importing HDL Modules for more information.
PicoBlaze Block
The PicoBlaze™ block provides the smallest degree of flexibility but is the least complex to use. The Xilinx PicoBlaze Microcontroller block implements an embedded 8-bit microcontroller using the PicoBlaze macro, and exposes a fixed interface to System
Generator. Ordinarily, a single block ROM containing 1024 or fewer 8 bit words serves as the program store. You can program the PicoBlaze using the PicoBlaze Assembler language. This flow is documented in the topic
Designing PicoBlaze Microcontroller
Applications
.
EDK Processor Block
The EDK Processor block provides an interface to MicroBlaze™ processors created using the Xilinx Platform Studio (XPS). The EDK Processor block allows System Generator
Shared Memory blocks (i.e., "From/To Register"s, "From/To FIFOs", and "Shared Memory" blocks) to be associated with a processor through an automatically generated memory map interface. Once associated, that memory can be read or written in software running on the
MicroBlaze processor. This flow is documented in the topic Integrating a Processor with
Custom Logic .
The EDK Processor block can import a MicroBlaze processor specified through an EDK project created using Xilinx Platform Studio and Base System Builder. Alternatively, a
System Generator design with an EDK Processor block can also be exported into an EDK project.
The export process creates a PLB-based or FSL-based pcore, which can be added to any
XPS project and communicate with the MicroBlaze or PowerPC® processor.
Integrating a Processor with Custom Logic
Integrating a processor with a piece of user-defined logic is typically a fairly involved process. The communications between a processor and a custom piece of hardware often occurs over a shared bus. Additionally, the information conveyed frequently consists of different types of data; for example data for processing, data denoting the status of the hardware or data affecting the mode of operation. Organizing how this data is transferred between the processor and custom logic is a tedious and error prone process that would benefit from automation. Furthermore, connectivity is only half of the problem, writing software to communicate with custom logic can also be challenging.
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System Generator for DSP User Guide
UG640 (v11.4) December 2, 2009
