Simulating Several Black Boxes Simultaneously. Xilinx DSP
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Black Box Examples
4.
The black box is able to adjust to changes in input width because of its configuration
M-function. To make this work, the M-function must be augmented by hand. Open the
M-function file transpose_fir_parametric.m. The important points are described below.
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Obtaining data input width: input_bitwidth = this_block.port('din').width;
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Calculating output width: output_bitwidth = ceil(log2(2^(input_bitwidth-1)*2^(coef_bitwidth-1) * number_of_coef));
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Setting output data type: dout_port.makeSigned; dout_port.width = output_bitwidth; dout_port.binpt = 12;
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Passing input and output bit widths to VHDL as generics: this_block.addGeneric('input_bitwidth',this_block.port('din').width); this_block.addGeneric('output_bitwidth',output_bitwidth);
For details concerning the black box configuration M-function, seethe topic Black Box
If you examine the black box VHDL file transpose_fir_parametric.vhd you see generics input_bitwidth
and output_bitwidth that specify input and output width. These are passed to lower-level VHDL components.
Simulating Several Black Boxes Simultaneously
Several System Generator black boxes can co-simulate simultaneously, using only one
ModelSim license while doing so. The example shown below illustrates this. The files for the example are contained in the directory
<sysgen_tree>/examples/black_box/example2.
The files contained in this directory are:
• black_box_ex2.mdl
: A Simulink model containing two black boxes.
• parity_block.vhd
: VHDL for a simple state machine that tracks the running parity of an 8-bit input word.
• parity_block_config.m
: The configuration M-function for the black boxes. The code has barely been changed from what was produced by the Configuration Wizard: the line that tagged the block as having a combinational feed-through path
(this_block.tagAsCombinational) has been removed.
Black Box Tutorial Example 6: Simulating Several Black Boxes
Simultaneously
Navigate into the example2 directory and open the example model. This is a simple model with two identical black boxes, each implementing a state machine. The state machines compute the running parity of their inputs. One black box is fed the input stream of the model and the other is fed the input stream after it has been serialized and deserialized. Notice that no simulation model is provided for either state machine. Instead,
HDL co-simulation is used to produce simulation results. The ModelSim block provides
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Chapter 4: Importing HDL Modules the connection between the black boxes and ModelSim. The example model is shown in the figure below.
If you run the simulation, you will see a Simulink scope and ModelSim waveform window that look like the figures below. The scope shows that the black boxes produce matching parity results (as expected), but with one delayed from the other by one clock cycle. The waveform window shows the same results, but viewed in ModelSim and expressed in binary. System Generator automatically configures the waveform viewer to display the input and output signals of each black box. You can also browse the design structure in
ModelSim to see how System Generator has elaborated the design to combine the two black boxes.
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System Generator for DSP User Guide
UG640 (v11.4) December 2, 2009
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