4 Pinouts. Infineon CY8C4045LQI-S412, CY8C4045LQI-S413, CY8C4025AZI-S413T, CY8C4024LQI-S412, CY8C4025AZQ-S403, CY8C4024LQI-S403T, CY8C4025LQI-S412, CY8C4025LQI-S402T, CY8C4045LQI-S411, CY8C4024AXI-S412

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4 Pinouts. Infineon CY8C4045LQI-S412, CY8C4045LQI-S413, CY8C4025AZI-S413T, CY8C4024LQI-S412, CY8C4025AZQ-S403, CY8C4024LQI-S403T, CY8C4025LQI-S412, CY8C4025LQI-S402T, CY8C4045LQI-S411, CY8C4024AXI-S412 | Manualzz

PSoC™ 4 MCU: PSoC™ 4000S

Based on Arm® Cortex®-M0+ CPU

Pinouts

4 Pinouts

The following table provides the pin list for PSoC™ 4000S for the 48-pin TQFP, 40-pin QFN, 32-pin QFN,

24-pin QFN, 32-pin TQFP, and 25-ball CSP packages. All port pins support GPIO. Pin 11 is a No-Connect in the

48-TQFP.

9

10

12

13

7

8

3

4

5

6

47

48

1

2

43

44

45

46

39

40

41

42

35

36

37

38

Table 1

48-pin TQFP

PSoC™ 4000S pin list

32-pin QFN 24-pin QFN 25-ball CSP 40-pin QFN 32-pin TQFP

Pin Name Pin Name Pin Name Pin Name Pin Name Pin Name

28

29

30

P0.0

P0.1

P0.2

17

18

19

P0.0

P0.1

P0.2

13

14

P0.0

P0.1

D1

C3

P0.0

P0.1

22

23

24

P0.0

P0.1

P0.2

17

18

19

P0.0

P0.1

P0.2

31

32

33

34

P0.3

P0.4

P0.5

P0.6

20

21

22

23

P0.3

P0.4

P0.5

P0.6

15

16

17

P0.4

P0.5

P0.6

C2

C1

B1

P0.4

P0.5

P0.6

25

26

27

28

P0.3

P0.4

P0.5

P0.6

20

21

22

23

P0.3

P0.4

P0.5

P0.6

P0.7

XRES

VCCD

VSSD

VDDD

VDDA

VSSA

P1.0

P1.1

P1.2

P1.3

P1.4

P1.5

P1.6

P1.7

P2.0

P2.1

P2.2

P2.3

P2.4

P2.5

P2.6

P2.7

VSSD

P3.0

P3.1

24

25

26

27

27

28

29

30

31

32

1

2

3

4

5

6

7

8

9

10

XRES

VCCD

VSSD

VDD

VDD

VSSA

P1.0

P1.1

P1.2

P1.3

P1.7

P2.0

P2.1

P2.2

P2.3

P2.5

P2.6

P2.7

P3.0

P3.1

18

19

20

21

21

22

23

24

1

2

3

4

5

6

XRES

VCCD

VSSD

VDD

VDD

VSSA

P1.2

P1.3

P1.7

P2.0

P2.1

P2.6

P2.7

P3.0

B2

B3

A1

A2

A3

A3

A2

A4

B4

A5

B5

C5

D5

C4

A2

E5

D4

P0.7

XRES

VCCD

VSS

VDD

VDD

VSS

P1.2

P1.3

P1.7

P2.0

P2.1

P2.6

P2.7

VSS

P3.0

P3.1

29

30

31

32

33

34

35

36

37

38

39

40

1

2

3

4

5

8

9

10

11

6

7

P0.7

XRES

VCCD

VDDD

VDDA

VSSA

P1.0

P1.1

P1.2

P1.3

P1.4

P1.7

P2.0

P2.1

P2.2

P2.3

P2.4

P2.5

P2.6

P2.7

VSSD

P3.0

P3.1

24

25

26

27

27

28

29

30

31

32

1

2

3

4

5

6

7

8

9

10

XRES

VCCD

VSSD

VDD

VDD

VSSA

P1.0

P1.1

P1.2

P1.3

P1.7

P2.0

P2.1

P2.2

P2.3

P2.5

P2.6

P2.7

P3.0

P3.1

Datasheet 15 002-00123 Rev. *O

2022-07-28

PSoC™ 4 MCU: PSoC™ 4000S

Based on Arm® Cortex®-M0+ CPU

Pinouts

Table 1

48-pin TQFP

14

16

17

P3.2

P3.3

P3.4

PSoC™ 4000S pin list

(continued)

32-pin QFN

11

12

P3.2

P3.3

24-pin QFN

7

8

P3.2

P3.3

25-ball CSP

E4

D3

P3.2

P3.3

40-pin QFN

12

13

14

P3.2

P3.3

P3.4

32-pin TQFP

Pin Name Pin Name Pin Name Pin Name Pin Name Pin Name

11

12

P3.2

P3.3

18

19

20

21

P3.5

P3.6

P3.7

VDDD

15

16

17

P3.5

P3.6

P3.7

22

23

24

25

P4.0

P4.1

P4.2

P4.3

13

14

15

16

P4.0

P4.1

P4.2

P4.3

9

10

11

12

P4.0

P4.1

P4.2

P4.3

E3

D2

E2

E1

P4.0

P4.1

P4.2

P4.3

18

19

20

21

P4.0

P4.1

P4.2

P4.3

13

14

15

16

P4.0

P4.1

P4.2

P4.3

Note: Pins 11, 15, 26, and 27 are No connects (NC) on the 48-pin TQFP.

Descriptions of the pin functions are as follows:

VDDD : Power supply for the digital section.

VDDA : Power supply for the analog section.

VSSD, VSSA : Ground pins for the digital and analog sections respectively.

VCCD : Regulated digital supply (1.8 V ± 5%)

VDD: Power supply to all sections of the chip

VSS: Ground for all sections of the chip

Datasheet 16 002-00123 Rev. *O

2022-07-28

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